From debf1d2237185a26503d737d54db730f62cf5ea5 Mon Sep 17 00:00:00 2001 From: zwl Date: Tue, 24 Jun 2014 14:15:09 +0800 Subject: [PATCH] rk3288 dts: modify lcdc0 as prmry(LCD) and lcdc1 as extend(HDMI) that just used for MID --- arch/arm/boot/dts/rk3288-chrome.dts | 7 ++++--- arch/arm/boot/dts/rk3288-p977.dts | 7 ++++--- arch/arm/boot/dts/rk3288-p977_8846.dts | 7 ++++--- arch/arm/boot/dts/rk3288-tb.dts | 7 ++++--- arch/arm/boot/dts/rk3288-tesco.dts | 9 +++++---- arch/arm/boot/dts/rk3288.dtsi | 23 ++++++++++------------- 6 files changed, 31 insertions(+), 29 deletions(-) diff --git a/arch/arm/boot/dts/rk3288-chrome.dts b/arch/arm/boot/dts/rk3288-chrome.dts index 2ca87dbcbab8..fb6326c40652 100755 --- a/arch/arm/boot/dts/rk3288-chrome.dts +++ b/arch/arm/boot/dts/rk3288-chrome.dts @@ -476,8 +476,8 @@ display-timings = <&disp_timings>; }; -/*lcdc1 as PRMRY(LCD),lcdc0 as EXTEND(HDMI)*/ -&lcdc1 { +/*lcdc0 as PRMRY(LCD),lcdc1 as EXTEND(HDMI)*/ +&lcdc0 { status = "okay"; rockchip,mirror = ; rockchip,cabc_mode = <0>; @@ -504,8 +504,9 @@ }; }; -&lcdc0 { +&lcdc1 { status = "okay"; + rockchip,mirror = ; }; &hdmi { diff --git a/arch/arm/boot/dts/rk3288-p977.dts b/arch/arm/boot/dts/rk3288-p977.dts index 9fb25cfeaa8a..aea86f790bb3 100755 --- a/arch/arm/boot/dts/rk3288-p977.dts +++ b/arch/arm/boot/dts/rk3288-p977.dts @@ -446,8 +446,8 @@ display-timings = <&disp_timings>; }; -/*lcdc1 as PRMRY(LCD),lcdc0 as EXTEND(HDMI)*/ -&lcdc1 { +/*lcdc0 as PRMRY(LCD),lcdc1 as EXTEND(HDMI)*/ +&lcdc0 { status = "okay"; rockchip,mirror = ; rockchip,cabc_mode = <0>; @@ -474,8 +474,9 @@ }; }; -&lcdc0 { +&lcdc1 { status = "okay"; + rockchip,mirror = ; }; &hdmi { diff --git a/arch/arm/boot/dts/rk3288-p977_8846.dts b/arch/arm/boot/dts/rk3288-p977_8846.dts index b1dd447b7c60..26a26576d8c0 100755 --- a/arch/arm/boot/dts/rk3288-p977_8846.dts +++ b/arch/arm/boot/dts/rk3288-p977_8846.dts @@ -505,8 +505,8 @@ display-timings = <&disp_timings>; }; -/*lcdc1 as PRMRY(LCD),lcdc0 as EXTEND(HDMI)*/ -&lcdc1 { +/*lcdc0 as PRMRY(LCD),lcdc1 as EXTEND(HDMI)*/ +&lcdc0 { status = "okay"; rockchip,mirror = ; rockchip,cabc_mode = <0>; @@ -533,8 +533,9 @@ }; }; -&lcdc0 { +&lcdc1 { status = "okay"; + rockchip,mirror = ; }; &hdmi { diff --git a/arch/arm/boot/dts/rk3288-tb.dts b/arch/arm/boot/dts/rk3288-tb.dts index 87f1eb498a10..53799123cc60 100755 --- a/arch/arm/boot/dts/rk3288-tb.dts +++ b/arch/arm/boot/dts/rk3288-tb.dts @@ -587,8 +587,8 @@ display-timings = <&disp_timings>; }; -/*lcdc1 as PRMRY(LCD),lcdc0 as EXTEND(HDMI)*/ -&lcdc1 { +/*lcdc0 as PRMRY(LCD),lcdc1 as EXTEND(HDMI)*/ +&lcdc0 { status = "okay"; rockchip,mirror = ; rockchip,cabc_mode = <0>; @@ -615,8 +615,9 @@ }; }; -&lcdc0 { +&lcdc1 { status = "okay"; + rockchip,mirror = ; }; &hdmi { diff --git a/arch/arm/boot/dts/rk3288-tesco.dts b/arch/arm/boot/dts/rk3288-tesco.dts index 69d7db985b99..21e5ecf4bda7 100755 --- a/arch/arm/boot/dts/rk3288-tesco.dts +++ b/arch/arm/boot/dts/rk3288-tesco.dts @@ -442,8 +442,8 @@ display-timings = <&disp_timings>; }; -/*lcdc1 as PRMRY(LCD),lcdc0 as EXTEND(HDMI)*/ -&lcdc1 { +/*lcdc0 as PRMRY(LCD),lcdc1 as EXTEND(HDMI)*/ +&lcdc0 { status = "okay"; rockchip,mirror = ; rockchip,cabc_mode = <0>; @@ -457,7 +457,7 @@ }; lcd_cs:lcd_cs { -rockchip,power_type = ; + rockchip,power_type = ; gpios = <&gpio7 GPIO_A4 GPIO_ACTIVE_HIGH>; rockchip,delay = <10>; }; @@ -471,8 +471,9 @@ rockchip,power_type = ; }; }; -&lcdc0 { +&lcdc1 { status = "okay"; + rockchip,mirror = ; }; &hdmi { diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index 7921181153b3..d597faabddd0 100755 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -745,33 +745,30 @@ status = "disabled"; }; - lcdc1: lcdc@ff940000 { + lcdc0: lcdc@ff930000 { compatible = "rockchip,rk3288-lcdc"; rockchip,prop = ; - rochchip,pwr18 = <0>; + rockchip,pwr18 = <0>; rockchip,iommu-enabled = <1>; - reg = <0xff940000 0x10000>; - interrupts = ; + reg = <0xff930000 0x10000>; + interrupts = ; pinctrl-names = "default", "gpio"; pinctrl-0 = <&lcdc0_lcdc>; pinctrl-1 = <&lcdc0_gpio>; status = "disabled"; - clocks = <&clk_gates15 7>, <&dclk_lcdc1>, <&clk_gates15 8>, <&pd_vop1>; + clocks = <&clk_gates15 5>, <&dclk_lcdc0>, <&clk_gates15 6>, <&pd_vop0>; clock-names = "aclk_lcdc", "dclk_lcdc", "hclk_lcdc", "pd_lcdc"; }; - lcdc0: lcdc@ff930000 { + lcdc1: lcdc@ff940000 { compatible = "rockchip,rk3288-lcdc"; rockchip,prop = ; - rockchip,pwr18 = <0>; + rochchip,pwr18 = <0>; rockchip,iommu-enabled = <1>; - reg = <0xff930000 0x10000>; - interrupts = ; - //pinctrl-names = "default", "gpio"; - //pinctrl-0 = <&lcdc0_lcdc>; - //pinctrl-1 = <&lcdc0_gpio>; + reg = <0xff940000 0x10000>; + interrupts = ; status = "disabled"; - clocks = <&clk_gates15 5>, <&dclk_lcdc0>, <&clk_gates15 6>, <&pd_vop0>; + clocks = <&clk_gates15 7>, <&dclk_lcdc1>, <&clk_gates15 8>, <&pd_vop1>; clock-names = "aclk_lcdc", "dclk_lcdc", "hclk_lcdc", "pd_lcdc"; }; -- 2.34.1