From df7e0f8d5de7feb82923f627062c774e31e74e48 Mon Sep 17 00:00:00 2001 From: Jim Grosbach Date: Sat, 13 Nov 2010 01:28:30 +0000 Subject: [PATCH] Swap multiclass operand order for consistency with other patterns. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118965 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/ARM/ARMInstrInfo.td | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td index 379ed912869..a0c7c9c5fc2 100644 --- a/lib/Target/ARM/ARMInstrInfo.td +++ b/lib/Target/ARM/ARMInstrInfo.td @@ -1546,7 +1546,7 @@ def LDRD : AI3ldd<(outs GPR:$dst1, GPR:$dst2), (ins addrmode3:$addr), LdMiscFrm, []>, Requires<[IsARM, HasV5TE]>; // Indexed loads -multiclass AI2_ldridx { +multiclass AI2_ldridx { def _PRE : AI2ldstidx<1, isByte, 1, (outs GPR:$Rt, GPR:$Rn_wb), (ins addrmode2:$addr), IndexModePre, LdFrm, itin, opc, "\t$Rt, $addr!", "$addr.base = $Rn_wb", []> { @@ -1558,8 +1558,8 @@ multiclass AI2_ldridx { opc, "\t$Rt, [$Rn], $offset", "$Rn = $Rn_wb", []>; } -defm LDR : AI2_ldridx<0, IIC_iLoad_ru, "ldr">; -defm LDRB : AI2_ldridx<1, IIC_iLoad_bh_ru, "ldrb">; +defm LDR : AI2_ldridx<0, "ldr", IIC_iLoad_ru>; +defm LDRB : AI2_ldridx<1, "ldrb", IIC_iLoad_bh_ru>; def LDRH_PRE : AI3ldhpr<(outs GPR:$Rt, GPR:$Rn_wb), (ins addrmode3:$addr), LdMiscFrm, IIC_iLoad_bh_ru, -- 2.34.1