From e1703660c4a1fecd4c2a13d4e7da7f9fd669446c Mon Sep 17 00:00:00 2001 From: Jim Grosbach Date: Thu, 3 Apr 2014 23:43:22 +0000 Subject: [PATCH] Tidy up. 80 columns. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205584 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/ARM/ARMFeatures.h | 2 +- lib/Target/ARM/ARMTargetMachine.h | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/lib/Target/ARM/ARMFeatures.h b/lib/Target/ARM/ARMFeatures.h index a30f4cdb37f..2c5a8c5164c 100644 --- a/lib/Target/ARM/ARMFeatures.h +++ b/lib/Target/ARM/ARMFeatures.h @@ -1,4 +1,4 @@ -//===-- ARMFeatures.h - Checks for ARM instruction features ------*- C++ -*-===// +//===-- ARMFeatures.h - Checks for ARM instruction features -----*- C++ -*-===// // // The LLVM Compiler Infrastructure // diff --git a/lib/Target/ARM/ARMTargetMachine.h b/lib/Target/ARM/ARMTargetMachine.h index 0c80a9529d1..b77effc9c43 100644 --- a/lib/Target/ARM/ARMTargetMachine.h +++ b/lib/Target/ARM/ARMTargetMachine.h @@ -182,8 +182,8 @@ public: class ThumbBETargetMachine : public ThumbTargetMachine { virtual void anchor(); public: - ThumbBETargetMachine(const Target &T, StringRef TT, - StringRef CPU, StringRef FS, const TargetOptions &Options, + ThumbBETargetMachine(const Target &T, StringRef TT, StringRef CPU, + StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL); }; -- 2.34.1