From e2849a9de0a142696a14cbcef984c2953fb2cb79 Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Tue, 3 Nov 2015 22:50:27 +0000 Subject: [PATCH] AMDGPU: Fix off by one error in register parsing If trying to use one past the end, this would assert. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252008 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | 9 +++++---- test/MC/AMDGPU/out-of-range-registers.s | 14 ++++++++++++++ 2 files changed, 19 insertions(+), 4 deletions(-) create mode 100644 test/MC/AMDGPU/out-of-range-registers.s diff --git a/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp b/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp index f6e8df402a3..a2420ad2070 100644 --- a/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp +++ b/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp @@ -545,11 +545,12 @@ bool AMDGPUAsmParser::ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &End } } - const MCRegisterInfo *TRC = getContext().getRegisterInfo(); - unsigned RC = getRegClass(IsVgpr, RegWidth); - if (RegIndexInClass > TRC->getRegClass(RC).getNumRegs()) + const MCRegisterInfo *TRI = getContext().getRegisterInfo(); + const MCRegisterClass RC = TRI->getRegClass(getRegClass(IsVgpr, RegWidth)); + if (RegIndexInClass >= RC.getNumRegs()) return true; - RegNo = TRC->getRegClass(RC).getRegister(RegIndexInClass); + + RegNo = RC.getRegister(RegIndexInClass); return false; } diff --git a/test/MC/AMDGPU/out-of-range-registers.s b/test/MC/AMDGPU/out-of-range-registers.s new file mode 100644 index 00000000000..312c78e73ef --- /dev/null +++ b/test/MC/AMDGPU/out-of-range-registers.s @@ -0,0 +1,14 @@ +// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck %s +// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga %s 2>&1 | FileCheck %s + +s_add_i32 s104, s0, s1 +// CHECK: error: invalid operand for instruction + +s_add_i32 s105, s0, s1 +// CHECK: error: invalid operand for instruction + +v_add_i32 v256, v0, v1 +// CHECK: error: invalid operand for instruction + +v_add_i32 v257, v0, v1 +// CHECK: error: invalid operand for instruction -- 2.34.1