From e36152aa84cf68bd7f09acffd480cd2b6aa5480d Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Wed, 16 Jul 2014 00:45:13 +0200 Subject: [PATCH] mmc: sh_mmcif: Configure DMA slave bus width The data register is 4 bytes wide, hardcode the DMA transfer size to 4 bytes in both directions. Signed-off-by: Laurent Pinchart Signed-off-by: Ulf Hansson --- drivers/mmc/host/sh_mmcif.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/mmc/host/sh_mmcif.c b/drivers/mmc/host/sh_mmcif.c index 863d21ee4a2f..d11708c815d7 100644 --- a/drivers/mmc/host/sh_mmcif.c +++ b/drivers/mmc/host/sh_mmcif.c @@ -418,10 +418,13 @@ sh_mmcif_request_dma_one(struct sh_mmcif_host *host, cfg.slave_id = slave_id; cfg.direction = direction; - if (direction == DMA_DEV_TO_MEM) + if (direction == DMA_DEV_TO_MEM) { cfg.src_addr = res->start + MMCIF_CE_DATA; - else + cfg.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; + } else { cfg.dst_addr = res->start + MMCIF_CE_DATA; + cfg.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; + } ret = dmaengine_slave_config(chan, &cfg); if (ret < 0) { -- 2.34.1