From e403255a8ccf3201739700b7901beca280756d14 Mon Sep 17 00:00:00 2001 From: William wu Date: Mon, 21 Nov 2016 15:32:26 +0800 Subject: [PATCH] CHROMIUM: usb: dwc3: add usb3_warm_reset_on_resume_quirk This patch add a quirk for some special platforms (e.g. rk3399 platform) which need to do warm reset for USB3 device on resume. BUG=chrome-os-partner:58347 TEST=Plug an USB3 flash drive in rk3399 Kevin board Type-C port, then set system enter S3. Wakeup system, check if USB3 device can be detected after resume. Change-Id: I19acc0560001481e5a952175433e82d17dfb3a40 Signed-off-by: William wu Reviewed-on: https://chromium-review.googlesource.com/412488 Commit-Ready: Guenter Roeck Tested-by: Guenter Roeck Tested-by: Inno Park Reviewed-by: Guenter Roeck Signed-off-by: Meng Dongyang --- Documentation/devicetree/bindings/usb/dwc3.txt | 1 + drivers/usb/dwc3/core.c | 2 ++ drivers/usb/dwc3/core.h | 2 ++ drivers/usb/dwc3/host.c | 1 + 4 files changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt b/Documentation/devicetree/bindings/usb/dwc3.txt index 23633568cfcc..408639c20c8c 100644 --- a/Documentation/devicetree/bindings/usb/dwc3.txt +++ b/Documentation/devicetree/bindings/usb/dwc3.txt @@ -59,6 +59,7 @@ Optional properties: - snps,quirk-frame-length-adjustment: Value for GFLADJ_30MHZ field of GFLADJ register for post-silicon frame length adjustment when the fladj_30mhz_sdbnd signal is invalid or incorrect. + - snps,usb3-warm-reset-on-resume-quirk: when set, need warm reset on resume. - tx-fifo-resize: determines if the FIFO *has* to be reallocated. diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c index acc6831eaf95..3efc7d896ac9 100644 --- a/drivers/usb/dwc3/core.c +++ b/drivers/usb/dwc3/core.c @@ -999,6 +999,8 @@ static int dwc3_probe(struct platform_device *pdev) "snps,tx-ipgap-linecheck-dis-quirk"); dwc->xhci_slow_suspend_quirk = device_property_read_bool(dev, "snps,xhci-slow-suspend-quirk"); + dwc->usb3_warm_reset_on_resume_quirk = device_property_read_bool(dev, + "snps,usb3-warm-reset-on-resume-quirk"); dwc->tx_de_emphasis_quirk = device_property_read_bool(dev, "snps,tx_de_emphasis_quirk"); diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h index 1e56b9b62b9a..2a38687ae99d 100644 --- a/drivers/usb/dwc3/core.h +++ b/drivers/usb/dwc3/core.h @@ -821,6 +821,7 @@ struct dwc3_scratchpad_array { * @xhci_slow_suspend_quirk: set if need an extraordinary delay to wait * for xHC enter the Halted state after the Run/Stop * (R/S) bit is cleared to '0'. + * @usb3_warm_reset_on_resume_quirk: set if need a warm reset on resume * @tx_de_emphasis_quirk: set if we enable Tx de-emphasis quirk * @tx_de_emphasis: Tx de-emphasis value * 0 - -6dB de-emphasis @@ -971,6 +972,7 @@ struct dwc3 { unsigned dis_del_phy_power_chg_quirk:1; unsigned tx_ipgap_linecheck_dis_quirk:1; unsigned xhci_slow_suspend_quirk:1; + unsigned usb3_warm_reset_on_resume_quirk:1; unsigned tx_de_emphasis_quirk:1; unsigned tx_de_emphasis:2; diff --git a/drivers/usb/dwc3/host.c b/drivers/usb/dwc3/host.c index 489ab425e177..f92971cccd86 100644 --- a/drivers/usb/dwc3/host.c +++ b/drivers/usb/dwc3/host.c @@ -94,6 +94,7 @@ int dwc3_host_init(struct dwc3 *dwc) pdata.usb3_disable_autosuspend = dwc->dis_u3_autosuspend_quirk; pdata.usb3_lpm_capable = dwc->usb3_lpm_capable; pdata.xhci_slow_suspend = dwc->xhci_slow_suspend_quirk; + pdata.usb3_warm_reset_on_resume = dwc->usb3_warm_reset_on_resume_quirk; ret = platform_device_add_data(xhci, &pdata, sizeof(pdata)); if (ret) { -- 2.34.1