From e7a31c98db05a955ef558d4c685b143c48063b68 Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Fri, 7 May 2004 21:18:15 +0000 Subject: [PATCH] Codegen floating point stores of constants into integer instructions. This allows us to compile: store float 10.0, float* %P into: mov DWORD PTR [%EAX], 1092616192 instead of: .CPItest_0: # float 0x4024000000000000 .long 1092616192 # float 10 ... fld DWORD PTR [.CPItest_0] fstp DWORD PTR [%EAX] git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@13409 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/InstSelectSimple.cpp | 52 ++++++++++++++++++++--------- lib/Target/X86/X86ISelSimple.cpp | 52 ++++++++++++++++++++--------- 2 files changed, 74 insertions(+), 30 deletions(-) diff --git a/lib/Target/X86/InstSelectSimple.cpp b/lib/Target/X86/InstSelectSimple.cpp index 4597a824738..eb41077dc53 100644 --- a/lib/Target/X86/InstSelectSimple.cpp +++ b/lib/Target/X86/InstSelectSimple.cpp @@ -2879,23 +2879,45 @@ void ISel::visitStoreInst(StoreInst &I) { } else if (ConstantBool *CB = dyn_cast(I.getOperand(0))) { addFullAddress(BuildMI(BB, X86::MOV8mi, 5), BaseReg, Scale, IndexReg, Disp).addImm(CB->getValue()); - } else { - if (Class == cLong) { - unsigned ValReg = getReg(I.getOperand(0)); - addFullAddress(BuildMI(BB, X86::MOV32mr, 5), - BaseReg, Scale, IndexReg, Disp).addReg(ValReg); - addFullAddress(BuildMI(BB, X86::MOV32mr, 5), - BaseReg, Scale, IndexReg, Disp+4).addReg(ValReg+1); + } else if (ConstantFP *CFP = dyn_cast(I.getOperand(0))) { + // Store constant FP values with integer instructions to avoid having to + // load the constants from the constant pool then do a store. + if (CFP->getType() == Type::FloatTy) { + union { + unsigned I; + float F; + } V; + V.F = CFP->getValue(); + addFullAddress(BuildMI(BB, X86::MOV32mi, 5), + BaseReg, Scale, IndexReg, Disp).addImm(V.I); } else { - unsigned ValReg = getReg(I.getOperand(0)); - static const unsigned Opcodes[] = { - X86::MOV8mr, X86::MOV16mr, X86::MOV32mr, X86::FST32m - }; - unsigned Opcode = Opcodes[Class]; - if (ValTy == Type::DoubleTy) Opcode = X86::FST64m; - addFullAddress(BuildMI(BB, Opcode, 1+4), - BaseReg, Scale, IndexReg, Disp).addReg(ValReg); + union { + uint64_t I; + double F; + } V; + V.F = CFP->getValue(); + addFullAddress(BuildMI(BB, X86::MOV32mi, 5), + BaseReg, Scale, IndexReg, Disp).addImm((unsigned)V.I); + addFullAddress(BuildMI(BB, X86::MOV32mi, 5), + BaseReg, Scale, IndexReg, Disp+4).addImm( + unsigned(V.I >> 32)); } + + } else if (Class == cLong) { + unsigned ValReg = getReg(I.getOperand(0)); + addFullAddress(BuildMI(BB, X86::MOV32mr, 5), + BaseReg, Scale, IndexReg, Disp).addReg(ValReg); + addFullAddress(BuildMI(BB, X86::MOV32mr, 5), + BaseReg, Scale, IndexReg, Disp+4).addReg(ValReg+1); + } else { + unsigned ValReg = getReg(I.getOperand(0)); + static const unsigned Opcodes[] = { + X86::MOV8mr, X86::MOV16mr, X86::MOV32mr, X86::FST32m + }; + unsigned Opcode = Opcodes[Class]; + if (ValTy == Type::DoubleTy) Opcode = X86::FST64m; + addFullAddress(BuildMI(BB, Opcode, 1+4), + BaseReg, Scale, IndexReg, Disp).addReg(ValReg); } } diff --git a/lib/Target/X86/X86ISelSimple.cpp b/lib/Target/X86/X86ISelSimple.cpp index 4597a824738..eb41077dc53 100644 --- a/lib/Target/X86/X86ISelSimple.cpp +++ b/lib/Target/X86/X86ISelSimple.cpp @@ -2879,23 +2879,45 @@ void ISel::visitStoreInst(StoreInst &I) { } else if (ConstantBool *CB = dyn_cast(I.getOperand(0))) { addFullAddress(BuildMI(BB, X86::MOV8mi, 5), BaseReg, Scale, IndexReg, Disp).addImm(CB->getValue()); - } else { - if (Class == cLong) { - unsigned ValReg = getReg(I.getOperand(0)); - addFullAddress(BuildMI(BB, X86::MOV32mr, 5), - BaseReg, Scale, IndexReg, Disp).addReg(ValReg); - addFullAddress(BuildMI(BB, X86::MOV32mr, 5), - BaseReg, Scale, IndexReg, Disp+4).addReg(ValReg+1); + } else if (ConstantFP *CFP = dyn_cast(I.getOperand(0))) { + // Store constant FP values with integer instructions to avoid having to + // load the constants from the constant pool then do a store. + if (CFP->getType() == Type::FloatTy) { + union { + unsigned I; + float F; + } V; + V.F = CFP->getValue(); + addFullAddress(BuildMI(BB, X86::MOV32mi, 5), + BaseReg, Scale, IndexReg, Disp).addImm(V.I); } else { - unsigned ValReg = getReg(I.getOperand(0)); - static const unsigned Opcodes[] = { - X86::MOV8mr, X86::MOV16mr, X86::MOV32mr, X86::FST32m - }; - unsigned Opcode = Opcodes[Class]; - if (ValTy == Type::DoubleTy) Opcode = X86::FST64m; - addFullAddress(BuildMI(BB, Opcode, 1+4), - BaseReg, Scale, IndexReg, Disp).addReg(ValReg); + union { + uint64_t I; + double F; + } V; + V.F = CFP->getValue(); + addFullAddress(BuildMI(BB, X86::MOV32mi, 5), + BaseReg, Scale, IndexReg, Disp).addImm((unsigned)V.I); + addFullAddress(BuildMI(BB, X86::MOV32mi, 5), + BaseReg, Scale, IndexReg, Disp+4).addImm( + unsigned(V.I >> 32)); } + + } else if (Class == cLong) { + unsigned ValReg = getReg(I.getOperand(0)); + addFullAddress(BuildMI(BB, X86::MOV32mr, 5), + BaseReg, Scale, IndexReg, Disp).addReg(ValReg); + addFullAddress(BuildMI(BB, X86::MOV32mr, 5), + BaseReg, Scale, IndexReg, Disp+4).addReg(ValReg+1); + } else { + unsigned ValReg = getReg(I.getOperand(0)); + static const unsigned Opcodes[] = { + X86::MOV8mr, X86::MOV16mr, X86::MOV32mr, X86::FST32m + }; + unsigned Opcode = Opcodes[Class]; + if (ValTy == Type::DoubleTy) Opcode = X86::FST64m; + addFullAddress(BuildMI(BB, Opcode, 1+4), + BaseReg, Scale, IndexReg, Disp).addReg(ValReg); } } -- 2.34.1