From e812d4c604ce6b6b019f7e51a694ca7e158f5139 Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Sun, 4 Apr 2010 05:21:31 +0000 Subject: [PATCH] use predicates in DBG_VALUE printing code to simplify it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100312 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/AsmPrinter/X86MCInstLower.cpp | 19 +++++++++---------- 1 file changed, 9 insertions(+), 10 deletions(-) diff --git a/lib/Target/X86/AsmPrinter/X86MCInstLower.cpp b/lib/Target/X86/AsmPrinter/X86MCInstLower.cpp index f38471038b5..4732b2f4aa9 100644 --- a/lib/Target/X86/AsmPrinter/X86MCInstLower.cpp +++ b/lib/Target/X86/AsmPrinter/X86MCInstLower.cpp @@ -344,16 +344,17 @@ void X86AsmPrinter::EmitInstruction(const MachineInstr *MI) { O << " <- "; if (NOps==3) { // Register or immediate value. Register 0 means undef. - assert(MI->getOperand(0).getType()==MachineOperand::MO_Register || - MI->getOperand(0).getType()==MachineOperand::MO_Immediate || - MI->getOperand(0).getType()==MachineOperand::MO_FPImmediate); - if (MI->getOperand(0).getType()==MachineOperand::MO_Register && - MI->getOperand(0).getReg()==0) { + assert(MI->getOperand(0).isReg() || + MI->getOperand(0).isImm() || + MI->getOperand(0).isFPImm()); + if (MI->getOperand(0).isReg() && MI->getOperand(0).getReg() == 0) { // Suppress offset in this case, it is not meaningful. O << "undef"; OutStreamer.AddBlankLine(); return; - } else if (MI->getOperand(0).getType()==MachineOperand::MO_FPImmediate) { + } + + if (MI->getOperand(0).isFPImm()) { // This is more naturally done in printOperand, but since the only use // of such an operand is in this comment and that is temporary (and it's // ugly), we prefer to keep this localized. @@ -373,16 +374,14 @@ void X86AsmPrinter::EmitInstruction(const MachineInstr *MI) { } else printOperand(MI, 0, O); } else { - if (MI->getOperand(0).getType()==MachineOperand::MO_Register && - MI->getOperand(0).getReg()==0) { + if (MI->getOperand(0).isReg() && MI->getOperand(0).getReg() == 0) { // Suppress offset in this case, it is not meaningful. O << "undef"; OutStreamer.AddBlankLine(); return; } // Frame address. Currently handles register +- offset only. - assert(MI->getOperand(0).getType()==MachineOperand::MO_Register); - assert(MI->getOperand(3).getType()==MachineOperand::MO_Immediate); + assert(MI->getOperand(0).isReg() && MI->getOperand(3).isImm()); O << '['; printOperand(MI, 0, O); O << '+'; printOperand(MI, 3, O); O << ']'; } -- 2.34.1