From e9ef4ed13ba84ef27da831afa27b7955c8f09530 Mon Sep 17 00:00:00 2001 From: Andrew Trick Date: Sat, 14 Jan 2012 02:17:09 +0000 Subject: [PATCH] misched: Invoke the DAG builder on each sequence of schedulable instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148171 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/MachineScheduler.cpp | 37 ++++++++++++++++++++++++++------ 1 file changed, 31 insertions(+), 6 deletions(-) diff --git a/lib/CodeGen/MachineScheduler.cpp b/lib/CodeGen/MachineScheduler.cpp index 9985be6ba97..ea0153ecf96 100644 --- a/lib/CodeGen/MachineScheduler.cpp +++ b/lib/CodeGen/MachineScheduler.cpp @@ -20,6 +20,7 @@ #include "llvm/CodeGen/MachinePassRegistry.h" #include "llvm/CodeGen/Passes.h" #include "llvm/Analysis/AliasAnalysis.h" +#include "llvm/Target/TargetInstrInfo.h" #include "llvm/Support/CommandLine.h" #include "llvm/Support/Debug.h" #include "llvm/Support/ErrorHandling.h" @@ -175,9 +176,12 @@ SchedDefaultRegistry("default", "Activate the scheduler pass, " /// Schedule - This is called back from ScheduleDAGInstrs::Run() when it's /// time to do some work. void MachineScheduler::Schedule() { + BuildSchedGraph(&Pass->getAnalysis()); + DEBUG(dbgs() << "********** MI Scheduling **********\n"); DEBUG(for (unsigned su = 0, e = SUnits.size(); su != e; ++su) SUnits[su].dumpAll(this)); + // TODO: Put interesting things here. } @@ -202,12 +206,33 @@ bool MachineSchedulerPass::runOnMachineFunction(MachineFunction &mf) { for (MachineFunction::iterator MBB = MF->begin(), MBBEnd = MF->end(); MBB != MBBEnd; ++MBB) { - DEBUG(dbgs() << "MachineScheduling " << MF->getFunction()->getName() - << ":BB#" << MBB->getNumber() << "\n"); - - // Inform ScheduleDAGInstrs of the region being scheduler. It calls back - // to our Schedule() method. - Scheduler->Run(MBB, MBB->begin(), MBB->end(), MBB->size()); + // Break the block into scheduling regions [I, RegionEnd), and schedule each + // region as soon as it is discovered. + unsigned RemainingCount = MBB->size(); + for(MachineBasicBlock::iterator RegionEnd = MBB->end(); + RegionEnd != MBB->begin();) { + // The next region starts above the previous region. Look backward in the + // instruction stream until we find the nearest boundary. + MachineBasicBlock::iterator I = RegionEnd; + for(;I != MBB->begin(); --I) { + if (TII->isSchedulingBoundary(llvm::prior(I), MBB, *MF)) + break; + } + if (I == RegionEnd || I == llvm::prior(RegionEnd)) { + // Skip empty or single instruction scheduling regions. + RegionEnd = llvm::prior(RegionEnd); + continue; + } + DEBUG(dbgs() << "MachineScheduling " << MF->getFunction()->getName() + << ":BB#" << MBB->getNumber() << "\n From: " << *I << " To: " + << *RegionEnd << " Remaining: " << RemainingCount << "\n"); + + // Inform ScheduleDAGInstrs of the region being scheduler. It calls back + // to our Schedule() method. + Scheduler->Run(MBB, I, RegionEnd, MBB->size()); + RegionEnd = I; + } + assert(RemainingCount == 0 && "Instruction count mismatch!"); } return true; } -- 2.34.1