From ea3f8f2347268b452fd92f4e87dce76a1e699cda Mon Sep 17 00:00:00 2001 From: Gary King Date: Wed, 15 Sep 2010 09:24:35 -0700 Subject: [PATCH] [ARM] tegra: remove inner-writeback memory type from SMP startup the memory remapping (NMRR) registers were configured differently by the SMP and LP2 startup code from the standard kernel. temporarily reverting the inner-writeback change for now. Change-Id: Ib9c4fc75580d1cc705a5dd83377c0703669bcabc Signed-off-by: Gary King --- arch/arm/mach-tegra/cortex-a9.S | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-tegra/cortex-a9.S b/arch/arm/mach-tegra/cortex-a9.S index 92851d8a4c46..7434366aa461 100644 --- a/arch/arm/mach-tegra/cortex-a9.S +++ b/arch/arm/mach-tegra/cortex-a9.S @@ -665,8 +665,8 @@ ENTRY(__return_to_virtual) mov r0, #0x1f mcr p15, 0, r0, c3, c0, 0 @ domain access register - mov32 r0, 0xff0a89a8 - mov32 r1, 0x40e044e0 + mov32 r0, 0xff0a81a8 + mov32 r1, 0x40e040e0 mcr p15, 0, r0, c10, c2, 0 @ PRRR mcr p15, 0, r1, c10, c2, 1 @ NMRR mrc p15, 0, r0, c1, c0, 0 -- 2.34.1