From ea93f138a3c4866ffbda45fdaaebc1b6dfe54178 Mon Sep 17 00:00:00 2001 From: khizmax Date: Sat, 18 Oct 2014 13:29:00 +0400 Subject: [PATCH] TsigasCycleQueue bugfix --- cds/intrusive/tsigas_cycle_queue.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/cds/intrusive/tsigas_cycle_queue.h b/cds/intrusive/tsigas_cycle_queue.h index 71220e90..4c618a70 100644 --- a/cds/intrusive/tsigas_cycle_queue.h +++ b/cds/intrusive/tsigas_cycle_queue.h @@ -256,7 +256,7 @@ namespace cds { namespace intrusive { ate = ( temp + 1 ) & nModulo; tt = m_buffer[ ate ].load(memory_model::memory_order_relaxed); if ( !is_free( tt ) ) { - return false ; // Queue is full + return false; // Queue is full } // help the dequeue to update head @@ -329,7 +329,7 @@ namespace cds { namespace intrusive { continue; // Get the actual head, null means empty - if ( m_buffer[temp].compare_exchange_strong( tt, pNull, memory_model::memory_order_release, atomics::memory_order_relaxed )) { + if ( m_buffer[temp].compare_exchange_strong( tt, pNull, memory_model::memory_order_acquire, atomics::memory_order_relaxed )) { if ( temp % 2 == 0 ) m_nHead.compare_exchange_strong( th, temp, memory_model::memory_order_release, atomics::memory_order_relaxed ); --m_ItemCounter; -- 2.34.1