From eb09839d7cf6793077ec4f5cdf342f95037176da Mon Sep 17 00:00:00 2001 From: =?utf8?q?=E8=AE=B8=E7=9B=9B=E9=A3=9E?= Date: Tue, 2 Sep 2014 15:07:26 +0800 Subject: [PATCH] rk312x: not gating gpios clock MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Signed-off-by: 许盛飞 --- arch/arm/mach-rockchip/pm-rk312x.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-rockchip/pm-rk312x.c b/arch/arm/mach-rockchip/pm-rk312x.c index d0c51dea90fe..b5842f512368 100644 --- a/arch/arm/mach-rockchip/pm-rk312x.c +++ b/arch/arm/mach-rockchip/pm-rk312x.c @@ -910,7 +910,7 @@ void PIE_FUNC(pwm_regulator_suspend)(void) int clk_gates8; clk_gates8 = cru_readl(0xf0); - cru_writel(0x1e001e00, 0xf0); + cru_writel(0x1e000000, 0xf0); if (rkpm_chk_sram_ctrbit(RKPM_CTR_VOL_PWM0)) { grf_writel(0x00100000, 0xb4);/*iomux gpio0d2*/ gpio0_inout = readl_relaxed(RK_GPIO_VIRT(0) + 0x04); @@ -950,7 +950,7 @@ void PIE_FUNC(pwm_regulator_resume)(void) int clk_gates8; clk_gates8 = cru_readl(0xf0); - cru_writel(0x1e001e00, 0xf0); + cru_writel(0x1e000000, 0xf0); if (rkpm_chk_sram_ctrbit(RKPM_CTR_VOL_PWM0)) { gpio0_inout = readl_relaxed(RK_GPIO_VIRT(0) + 0x04); gpio0_ddr = readl_relaxed(RK_GPIO_VIRT(0)); -- 2.34.1