From eb2f969a4ddfb0bc8fdcb5bce3b52e53abff321d Mon Sep 17 00:00:00 2001 From: Evan Cheng Date: Tue, 27 Oct 2009 19:56:55 +0000 Subject: [PATCH] Do away with addLegalFPImmediate. Add a target hook isFPImmLegal which returns true if the fp immediate can be natively codegened by target. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85281 91177308-0d34-0410-b5e6-96231b3b80d8 --- include/llvm/Target/TargetLowering.h | 19 +++++-------------- lib/CodeGen/SelectionDAG/LegalizeDAG.cpp | 10 +--------- lib/CodeGen/SelectionDAG/TargetLowering.cpp | 2 +- lib/Target/Alpha/AlphaISelLowering.cpp | 13 ++++++++----- lib/Target/Alpha/AlphaISelLowering.h | 5 +++++ lib/Target/Mips/MipsISelLowering.cpp | 7 ++++--- lib/Target/Mips/MipsISelLowering.h | 5 +++++ lib/Target/SystemZ/SystemZISelLowering.cpp | 16 +++++++++++----- lib/Target/SystemZ/SystemZISelLowering.h | 5 +++++ lib/Target/X86/X86ISelLowering.cpp | 11 +++++++++++ lib/Target/X86/X86ISelLowering.h | 14 ++++++++++++++ 11 files changed, 70 insertions(+), 37 deletions(-) diff --git a/include/llvm/Target/TargetLowering.h b/include/llvm/Target/TargetLowering.h index 4f567b0b203..286651e9900 100644 --- a/include/llvm/Target/TargetLowering.h +++ b/include/llvm/Target/TargetLowering.h @@ -325,12 +325,11 @@ public: /// scalarizing vs using the wider vector type. virtual EVT getWidenVectorType(EVT VT) const; - typedef std::vector::const_iterator legal_fpimm_iterator; - legal_fpimm_iterator legal_fpimm_begin() const { - return LegalFPImmediates.begin(); - } - legal_fpimm_iterator legal_fpimm_end() const { - return LegalFPImmediates.end(); + /// isFPImmLegal - Returns true if the target can instruction select the + /// specified FP immediate natively. If false, the legalizer will materialize + /// the FP immediate as a load from a constant pool. + virtual bool isFPImmLegal(const APFloat &Imm) const { + return false; } /// isShuffleMaskLegal - Targets can use this to indicate that they only @@ -1051,12 +1050,6 @@ protected: PromoteToType[std::make_pair(Opc, OrigVT.SimpleTy)] = DestVT.SimpleTy; } - /// addLegalFPImmediate - Indicate that this target can instruction select - /// the specified FP immediate natively. - void addLegalFPImmediate(const APFloat& Imm) { - LegalFPImmediates.push_back(Imm); - } - /// setTargetDAGCombine - Targets should invoke this method for each target /// independent node that they want to provide a custom DAG combiner for by /// implementing the PerformDAGCombine virtual method. @@ -1696,8 +1689,6 @@ private: ValueTypeActionImpl ValueTypeActions; - std::vector LegalFPImmediates; - std::vector > AvailableRegClasses; /// TargetDAGCombineArray - Targets can specify ISD nodes that they would diff --git a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp index e04231074d2..e41175623ae 100644 --- a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp +++ b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp @@ -2573,16 +2573,8 @@ void SelectionDAGLegalize::ExpandNode(SDNode *Node, case ISD::ConstantFP: { ConstantFPSDNode *CFP = cast(Node); // Check to see if this FP immediate is already legal. - bool isLegal = false; - for (TargetLowering::legal_fpimm_iterator I = TLI.legal_fpimm_begin(), - E = TLI.legal_fpimm_end(); I != E; ++I) { - if (CFP->isExactlyValue(*I)) { - isLegal = true; - break; - } - } // If this is a legal constant, turn it into a TargetConstantFP node. - if (isLegal) + if (TLI.isFPImmLegal(CFP->getValueAPF())) Results.push_back(SDValue(Node, 0)); else Results.push_back(ExpandConstantFP(CFP, true, DAG, TLI)); diff --git a/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/lib/CodeGen/SelectionDAG/TargetLowering.cpp index a2baee42310..9f36b679f3b 100644 --- a/lib/CodeGen/SelectionDAG/TargetLowering.cpp +++ b/lib/CodeGen/SelectionDAG/TargetLowering.cpp @@ -481,7 +481,7 @@ TargetLowering::TargetLowering(TargetMachine &tm,TargetLoweringObjectFile *tlof) setOperationAction(ISD::PREFETCH, MVT::Other, Expand); // ConstantFP nodes default to expand. Targets can either change this to - // Legal, in which case all fp constants are legal, or use addLegalFPImmediate + // Legal, in which case all fp constants are legal, or use isFPImmLegal() // to optimize expansions for certain constants. setOperationAction(ISD::ConstantFP, MVT::f32, Expand); setOperationAction(ISD::ConstantFP, MVT::f64, Expand); diff --git a/lib/Target/Alpha/AlphaISelLowering.cpp b/lib/Target/Alpha/AlphaISelLowering.cpp index b3f865cf4a8..b2b738db2eb 100644 --- a/lib/Target/Alpha/AlphaISelLowering.cpp +++ b/lib/Target/Alpha/AlphaISelLowering.cpp @@ -157,11 +157,6 @@ AlphaTargetLowering::AlphaTargetLowering(TargetMachine &TM) setStackPointerRegisterToSaveRestore(Alpha::R30); - addLegalFPImmediate(APFloat(+0.0)); //F31 - addLegalFPImmediate(APFloat(+0.0f)); //F31 - addLegalFPImmediate(APFloat(-0.0)); //-F31 - addLegalFPImmediate(APFloat(-0.0f)); //-F31 - setJumpBufSize(272); setJumpBufAlignment(16); @@ -919,3 +914,11 @@ AlphaTargetLowering::isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const { // The Alpha target isn't yet aware of offsets. return false; } + +bool AlphaTargetLowering::isFPImmLegal(const APFloat &Imm) const { + // +0.0 F31 + // +0.0f F31 + // -0.0 -F31 + // -0.0f -F31 + return Imm.isZero() || Imm.isNegZero(); +} diff --git a/lib/Target/Alpha/AlphaISelLowering.h b/lib/Target/Alpha/AlphaISelLowering.h index b580c9d7126..fbffbed939a 100644 --- a/lib/Target/Alpha/AlphaISelLowering.h +++ b/lib/Target/Alpha/AlphaISelLowering.h @@ -102,6 +102,11 @@ namespace llvm { /// getFunctionAlignment - Return the Log2 alignment of this function. virtual unsigned getFunctionAlignment(const Function *F) const; + /// isFPImmLegal - Returns true if the target can instruction select the + /// specified FP immediate natively. If false, the legalizer will + /// materialize the FP immediate as a load from a constant pool. + virtual bool isFPImmLegal(const APFloat &Imm) const; + private: // Helpers for custom lowering. void LowerVAARG(SDNode *N, SDValue &Chain, SDValue &DataPtr, diff --git a/lib/Target/Mips/MipsISelLowering.cpp b/lib/Target/Mips/MipsISelLowering.cpp index ab8790ad7db..48d1cdc08af 100644 --- a/lib/Target/Mips/MipsISelLowering.cpp +++ b/lib/Target/Mips/MipsISelLowering.cpp @@ -72,9 +72,6 @@ MipsTargetLowering(MipsTargetMachine &TM) if (!Subtarget->isFP64bit()) addRegisterClass(MVT::f64, Mips::AFGR64RegisterClass); - // Legal fp constants - addLegalFPImmediate(APFloat(+0.0f)); - // Load extented operations for i1 types must be promoted setLoadExtAction(ISD::EXTLOAD, MVT::i1, Promote); setLoadExtAction(ISD::ZEXTLOAD, MVT::i1, Promote); @@ -1224,3 +1221,7 @@ MipsTargetLowering::isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const { // The Mips target isn't yet aware of offsets. return false; } + +bool MipsTargetLowering::isFPImmLegal(const APFloat &Imm) const { + return Imm.isZero(); +} diff --git a/lib/Target/Mips/MipsISelLowering.h b/lib/Target/Mips/MipsISelLowering.h index dddba4291d2..2765295528f 100644 --- a/lib/Target/Mips/MipsISelLowering.h +++ b/lib/Target/Mips/MipsISelLowering.h @@ -146,6 +146,11 @@ namespace llvm { EVT VT) const; virtual bool isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const; + + /// isFPImmLegal - Returns true if the target can instruction select the + /// specified FP immediate natively. If false, the legalizer will + /// materialize the FP immediate as a load from a constant pool. + virtual bool isFPImmLegal(const APFloat &Imm) const; }; } diff --git a/lib/Target/SystemZ/SystemZISelLowering.cpp b/lib/Target/SystemZ/SystemZISelLowering.cpp index 07e0d830580..eb4d250504d 100644 --- a/lib/Target/SystemZ/SystemZISelLowering.cpp +++ b/lib/Target/SystemZ/SystemZISelLowering.cpp @@ -53,11 +53,6 @@ SystemZTargetLowering::SystemZTargetLowering(SystemZTargetMachine &tm) : if (!UseSoftFloat) { addRegisterClass(MVT::f32, SystemZ::FP32RegisterClass); addRegisterClass(MVT::f64, SystemZ::FP64RegisterClass); - - addLegalFPImmediate(APFloat(+0.0)); // lzer - addLegalFPImmediate(APFloat(+0.0f)); // lzdr - addLegalFPImmediate(APFloat(-0.0)); // lzer + lner - addLegalFPImmediate(APFloat(-0.0f)); // lzdr + lndr } // Compute derived properties from the register classes @@ -169,6 +164,17 @@ SDValue SystemZTargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) { } } +bool SystemZTargetLowering::isFPImmLegal(const APFloat &Imm) const { + if (UseSoftFloat) + return false; + + // +0.0 lzer + // +0.0f lzdr + // -0.0 lzer + lner + // -0.0f lzdr + lndr + return Imm.isZero() || Imm.isNegZero(); +} + //===----------------------------------------------------------------------===// // SystemZ Inline Assembly Support //===----------------------------------------------------------------------===// diff --git a/lib/Target/SystemZ/SystemZISelLowering.h b/lib/Target/SystemZ/SystemZISelLowering.h index c2c24bc1f3a..76af03de0ad 100644 --- a/lib/Target/SystemZ/SystemZISelLowering.h +++ b/lib/Target/SystemZ/SystemZISelLowering.h @@ -89,6 +89,11 @@ namespace llvm { MachineBasicBlock *BB, DenseMap *EM) const; + /// isFPImmLegal - Returns true if the target can instruction select the + /// specified FP immediate natively. If false, the legalizer will + /// materialize the FP immediate as a load from a constant pool. + virtual bool isFPImmLegal(const APFloat &Imm) const; + private: SDValue LowerCCCCallTo(SDValue Chain, SDValue Callee, CallingConv::ID CallConv, bool isVarArg, diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index e5e7bc8bb75..83ede5dd4aa 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -2310,6 +2310,17 @@ static bool hasFPCMov(unsigned X86CC) { } } +/// isFPImmLegal - Returns true if the target can instruction select the +/// specified FP immediate natively. If false, the legalizer will +/// materialize the FP immediate as a load from a constant pool. +bool X86TargetLowering::isFPImmLegal(const APFloat &Imm) const { + for (unsigned i = 0, e = LegalFPImmediates.size(); i != e; ++i) { + if (Imm.bitwiseIsEqual(LegalFPImmediates[i])) + return true; + } + return false; +} + /// isUndefOrInRange - Return true if Val is undef or if its value falls within /// the specified range (L, H]. static bool isUndefOrInRange(int Val, int Low, int Hi) { diff --git a/lib/Target/X86/X86ISelLowering.h b/lib/Target/X86/X86ISelLowering.h index 66a9107f945..3d334a064b2 100644 --- a/lib/Target/X86/X86ISelLowering.h +++ b/lib/Target/X86/X86ISelLowering.h @@ -499,6 +499,11 @@ namespace llvm { /// from i32 to i8 but not from i32 to i16. virtual bool isNarrowingProfitable(EVT VT1, EVT VT2) const; + /// isFPImmLegal - Returns true if the target can instruction select the + /// specified FP immediate natively. If false, the legalizer will + /// materialize the FP immediate as a load from a constant pool. + virtual bool isFPImmLegal(const APFloat &Imm) const; + /// isShuffleMaskLegal - Targets can use this to indicate that they only /// support *some* VECTOR_SHUFFLE operations, those with specific masks. /// By default, if a target supports the VECTOR_SHUFFLE node, all mask @@ -584,6 +589,15 @@ namespace llvm { bool X86ScalarSSEf32; bool X86ScalarSSEf64; + /// LegalFPImmediates - A list of legal fp immediates. + std::vector LegalFPImmediates; + + /// addLegalFPImmediate - Indicate that this x86 target can instruction + /// select the specified FP immediate natively. + void addLegalFPImmediate(const APFloat& Imm) { + LegalFPImmediates.push_back(Imm); + } + SDValue LowerCallResult(SDValue Chain, SDValue InFlag, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl &Ins, -- 2.34.1