From eb7e9ccad879026176d4731001540d88a6869611 Mon Sep 17 00:00:00 2001 From: Daniel Sanders Date: Mon, 23 Mar 2015 11:33:15 +0000 Subject: [PATCH] [aarch64] Distinguish the 'Q' and 'm' inline assembly memory constraints. Summary: But still handle them the same way since I don't know how they differ on this target. Clang also has code for 'Ump', 'Utf', 'Usa', and 'Ush' but calls llvm_unreachable() on this code path so they are not converted to a constraint id at the moment. No functional change intended. Reviewers: t.p.northover Subscribers: aemerson, llvm-commits Differential Revision: http://reviews.llvm.org/D8177 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232941 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/AArch64/AArch64ISelDAGToDAG.cpp | 20 +++++++++++++------- lib/Target/AArch64/AArch64ISelLowering.h | 8 ++++++-- 2 files changed, 19 insertions(+), 9 deletions(-) diff --git a/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp b/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp index f401b70e0f8..44d20fcfd84 100644 --- a/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp +++ b/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp @@ -212,13 +212,19 @@ static bool isOpcWithIntImmediate(const SDNode *N, unsigned Opc, bool AArch64DAGToDAGISel::SelectInlineAsmMemoryOperand( const SDValue &Op, unsigned ConstraintID, std::vector &OutOps) { - assert(ConstraintID == InlineAsm::Constraint_m && - "unexpected asm memory constraint"); - // Require the address to be in a register. That is safe for all AArch64 - // variants and it is hard to do anything much smarter without knowing - // how the operand is used. - OutOps.push_back(Op); - return false; + switch(ConstraintID) { + default: + llvm_unreachable("Unexpected asm memory constraint"); + case InlineAsm::Constraint_i: + case InlineAsm::Constraint_m: + case InlineAsm::Constraint_Q: + // Require the address to be in a register. That is safe for all AArch64 + // variants and it is hard to do anything much smarter without knowing + // how the operand is used. + OutOps.push_back(Op); + return false; + } + return true; } /// SelectArithImmed - Select an immediate value that can be represented as diff --git a/lib/Target/AArch64/AArch64ISelLowering.h b/lib/Target/AArch64/AArch64ISelLowering.h index 4d5b619e752..5ff11e86eb9 100644 --- a/lib/Target/AArch64/AArch64ISelLowering.h +++ b/lib/Target/AArch64/AArch64ISelLowering.h @@ -475,8 +475,12 @@ private: unsigned getInlineAsmMemConstraint( const std::string &ConstraintCode) const override { - // FIXME: Map different constraints differently. - return InlineAsm::Constraint_m; + if (ConstraintCode == "Q") + return InlineAsm::Constraint_Q; + // FIXME: clang has code for 'Ump', 'Utf', 'Usa', and 'Ush' but these are + // followed by llvm_unreachable so we'll leave them unimplemented in + // the backend for now. + return TargetLowering::getInlineAsmMemConstraint(ConstraintCode); } bool isUsedByReturnOnly(SDNode *N, SDValue &Chain) const override; -- 2.34.1