From ed09502a0b8c3556d3f144bc867e82ef729e4fd0 Mon Sep 17 00:00:00 2001 From: Duraid Madina Date: Wed, 13 Apr 2005 06:12:04 +0000 Subject: [PATCH] * add the shladd instruction * fold left shifts of 1, 2, 3 or 4 bits into adds This doesn't save much now, but should get a serious workout once multiplies by constants get converted to shift/add/sub sequences. Hold on! :) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21282 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/IA64/IA64ISelPattern.cpp | 20 ++++++++++++++++++++ lib/Target/IA64/IA64InstrInfo.td | 3 +++ 2 files changed, 23 insertions(+) diff --git a/lib/Target/IA64/IA64ISelPattern.cpp b/lib/Target/IA64/IA64ISelPattern.cpp index c501fa1c331..7ca220bda1e 100644 --- a/lib/Target/IA64/IA64ISelPattern.cpp +++ b/lib/Target/IA64/IA64ISelPattern.cpp @@ -873,6 +873,26 @@ assert(0 && "hmm, ISD::SIGN_EXTEND: shouldn't ever be reached. bad luck!\n"); BuildMI(BB, IA64::FMA, 3, Result).addReg(Tmp1).addReg(Tmp2).addReg(Tmp3); return Result; // early exit } + + if(DestType != MVT::f64 && N.getOperand(0).getOpcode() == ISD::SHL && + N.getOperand(0).Val->hasOneUse()) { // if we might be able to fold + // this add into a shladd, try: + ConstantSDNode *CSD = NULL; + if((CSD = dyn_cast(N.getOperand(0).getOperand(1))) && + (CSD->getValue() >= 1) && (CSD->getValue() <= 4) ) { // we can: + + // ++FusedSHLADD; // Statistic + Tmp1 = SelectExpr(N.getOperand(0).getOperand(0)); + int shl_amt = CSD->getValue(); + Tmp3 = SelectExpr(N.getOperand(1)); + + BuildMI(BB, IA64::SHLADD, 3, Result) + .addReg(Tmp1).addImm(shl_amt).addReg(Tmp3); + return Result; // early exit + } + } + + //else, fallthrough: Tmp1 = SelectExpr(N.getOperand(0)); if(DestType != MVT::f64) { // integer addition: switch (ponderIntegerAdditionWith(N.getOperand(1), Tmp3)) { diff --git a/lib/Target/IA64/IA64InstrInfo.td b/lib/Target/IA64/IA64InstrInfo.td index 0dc4cb29bff..5cc33120838 100644 --- a/lib/Target/IA64/IA64InstrInfo.td +++ b/lib/Target/IA64/IA64InstrInfo.td @@ -111,6 +111,9 @@ def SHRS : AForm<0x03, 0x0b, (ops GR:$dst, GR:$src1, GR:$src2), def SHRSI : AForm<0x03, 0x0b, (ops GR:$dst, GR:$src1, u6imm:$imm), "shr $dst = $src1, $imm;;">; +def SHLADD : AForm<0x03, 0x0b, (ops GR:$dst, GR:$src1, u6imm:$imm, GR:$src2), + "shladd $dst = $src1, $imm, $src2;;">; + def EXTRU : AForm<0x03, 0x0b, (ops GR:$dst, GR:$src1, u6imm:$imm1, u6imm:$imm2), "extr.u $dst = $src1, $imm1, $imm2;;">; -- 2.34.1