From efeaed8fb4092365b6bd161d424bb33b0ffc3a97 Mon Sep 17 00:00:00 2001 From: Evan Cheng Date: Tue, 30 May 2006 23:34:30 +0000 Subject: [PATCH] Commute shufps / shufpd. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28577 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/X86InstrInfo.cpp | 18 ++++++++++++++++++ lib/Target/X86/X86InstrSSE.td | 3 ++- 2 files changed, 20 insertions(+), 1 deletion(-) diff --git a/lib/Target/X86/X86InstrInfo.cpp b/lib/Target/X86/X86InstrInfo.cpp index 47388eae483..c566b48aae5 100644 --- a/lib/Target/X86/X86InstrInfo.cpp +++ b/lib/Target/X86/X86InstrInfo.cpp @@ -207,6 +207,24 @@ MachineInstr *X86InstrInfo::convertToThreeAddress(MachineInstr *MI) const { /// MachineInstr *X86InstrInfo::commuteInstruction(MachineInstr *MI) const { switch (MI->getOpcode()) { + case X86::SHUFPSrri: { // A = SHUFPSrri B,C, M -> A = SHUFPSrri C,B, rotl(M,4) + unsigned A = MI->getOperand(0).getReg(); + unsigned B = MI->getOperand(1).getReg(); + unsigned C = MI->getOperand(2).getReg(); + unsigned M = MI->getOperand(3).getImmedValue(); + if (B == C) return 0; + return BuildMI(X86::SHUFPSrri, 3, A).addReg(C).addReg(B). + addImm(((M & 0xF) << 4) | ((M & 0xF0) >> 4)); + } + case X86::SHUFPDrri: { // A = SHUFPDrri B,C, M -> A = SHUFPDrri C,B, rotl(M,1) + unsigned A = MI->getOperand(0).getReg(); + unsigned B = MI->getOperand(1).getReg(); + unsigned C = MI->getOperand(2).getReg(); + unsigned M = MI->getOperand(3).getImmedValue(); + if (B == C) return 0; + return BuildMI(X86::SHUFPDrri, 3, A).addReg(C).addReg(B). + addImm(((M & 0x1) << 1) | ((M & 0x2) >> 1)); + } case X86::SHRD16rri8: // A = SHRD16rri8 B, C, I -> A = SHLD16rri8 C, B, (16-I) case X86::SHLD16rri8: // A = SHLD16rri8 B, C, I -> A = SHRD16rri8 C, B, (16-I) case X86::SHRD32rri8: // A = SHRD32rri8 B, C, I -> A = SHLD32rri8 C, B, (32-I) diff --git a/lib/Target/X86/X86InstrSSE.td b/lib/Target/X86/X86InstrSSE.td index ca6ed88bdc2..5ea6d92ac48 100644 --- a/lib/Target/X86/X86InstrSSE.td +++ b/lib/Target/X86/X86InstrSSE.td @@ -1218,7 +1218,7 @@ def CMPPDrmi : PDIi8<0xC2, MRMSrcMem, // Shuffle and unpack instructions let isTwoAddress = 1 in { -let isConvertibleToThreeAddress = 1 in // Convert to pshufd +let isCommutable = 1, isConvertibleToThreeAddress = 1 in // Convert to pshufd def SHUFPSrri : PSIi8<0xC6, MRMSrcReg, (ops VR128:$dst, VR128:$src1, VR128:$src2, i32i8imm:$src3), "shufps {$src3, $src2, $dst|$dst, $src2, $src3}", @@ -1231,6 +1231,7 @@ def SHUFPSrmi : PSIi8<0xC6, MRMSrcMem, [(set VR128:$dst, (v4f32 (vector_shuffle VR128:$src1, (load addr:$src2), SHUFP_shuffle_mask:$src3)))]>; +let isCommutable = 1 in def SHUFPDrri : PDIi8<0xC6, MRMSrcReg, (ops VR128:$dst, VR128:$src1, VR128:$src2, i8imm:$src3), "shufpd {$src3, $src2, $dst|$dst, $src2, $src3}", -- 2.34.1