From f090ea20358ac2f328527accfac848ad83bfc4a9 Mon Sep 17 00:00:00 2001 From: Yakir Yang Date: Thu, 11 Aug 2016 14:42:14 +0800 Subject: [PATCH] arm64: dts: rockchip: resort RK3399 Excavator boards by alpha Resort the RK3399 Excavator and Sapphire dts files by alpha. Change-Id: I1942144c20d25c6776c5a28132a3ea961cf4ac0f Signed-off-by: Yakir Yang --- .../rk3399-excavator-sapphire-box.dts | 38 +- .../rk3399-excavator-sapphire-edp.dts | 36 +- .../boot/dts/rockchip/rk3399-sapphire.dtsi | 333 +++++++++--------- 3 files changed, 205 insertions(+), 202 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3399-excavator-sapphire-box.dts b/arch/arm64/boot/dts/rockchip/rk3399-excavator-sapphire-box.dts index ed5e9ebcdde0..20796db55780 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-excavator-sapphire-box.dts +++ b/arch/arm64/boot/dts/rockchip/rk3399-excavator-sapphire-box.dts @@ -42,14 +42,32 @@ /dts-v1/; -#include "rk3399-excavator-sapphire.dtsi" #include +#include "rk3399-excavator-sapphire.dtsi" #include "rk3399-android.dtsi" / { compatible = "rockchip,rk3399-excavator-box", "rockchip,rk3399"; }; +&rk_screen { + #include +}; + +&disp_timings { + native-mode = <&timing1>; /* 1080p */ +}; + +&fb { + rockchip,disp-mode = ; + rockchip,disp-policy = ; +}; + +&hdmi_rk_fb { + status = "okay"; + rockchip,hdmi_video_source = ; +}; + &pwm3 { status = "okay"; interrupts = ; @@ -151,24 +169,6 @@ }; }; -&rk_screen { - #include -}; - -&disp_timings { - native-mode = <&timing1>; /* 1080p */ -}; - &vopb_rk_fb { status = "okay"; }; - -&fb { - rockchip,disp-mode = ; - rockchip,disp-policy = ; -}; - -&hdmi_rk_fb { - status = "okay"; - rockchip,hdmi_video_source = ; -}; diff --git a/arch/arm64/boot/dts/rockchip/rk3399-excavator-sapphire-edp.dts b/arch/arm64/boot/dts/rockchip/rk3399-excavator-sapphire-edp.dts index 8babc7e8d297..4094d32484f8 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-excavator-sapphire-edp.dts +++ b/arch/arm64/boot/dts/rockchip/rk3399-excavator-sapphire-edp.dts @@ -42,8 +42,8 @@ /dts-v1/; -#include "rk3399-excavator-sapphire.dtsi" #include +#include "rk3399-excavator-sapphire.dtsi" #include "rk3399-android.dtsi" / { @@ -89,6 +89,15 @@ }; }; +&edp_rk_fb { + status = "okay"; +}; + +&hdmi_rk_fb { + status = "okay"; + rockchip,hdmi_video_source = ; +}; + &i2c1 { status = "okay"; @@ -102,6 +111,10 @@ }; }; +&pwm0 { + status = "okay"; +}; + &rk_screen { #include }; @@ -116,11 +129,13 @@ rockchip,delay = <10>; }; - /*lcd_cs: lcd-cs { + /* + lcd_cs: lcd-cs { rockchip,power_type = ; - gpios = <&gpio0 21 GPIO_ACTIVE_HIGH>;//GPIO_C5 = 21 + gpios = <&gpio0 21 GPIO_ACTIVE_HIGH>; rockchip,delay = <10>; - };*/ + }; + */ lcd_rst: lcd-rst { rockchip,power_type = ; @@ -133,16 +148,3 @@ &vopl_rk_fb { status = "okay"; }; - -&edp_rk_fb { - status = "okay"; -}; - -&hdmi_rk_fb { - status = "okay"; - rockchip,hdmi_video_source = ; -}; - -&pwm0 { - status = "okay"; -}; diff --git a/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi index 720db270c62b..076ba1ea35ef 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi @@ -46,47 +46,6 @@ / { compatible = "rockchip,rk3399-sapphire", "rockchip,rk3399"; - vcc5v0_sys: vcc5v0-sys { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - }; - - vcc3v3_sys: vcc3v3-sys { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; - - vcc5v0_host: vcc5v0-host-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&host_vbus_drv>; - regulator-name = "vcc5v0_host"; - }; - - vdd_log: vdd-log { - compatible = "pwm-regulator"; - pwms = <&pwm2 0 25000 0>; - regulator-name = "vdd_log"; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1400000>; - regulator-always-on; - regulator-boot-on; - - /* for rockchip boot on */ - rockchip,pwm_id= <2>; - rockchip,pwm_voltage = <1000000>; - }; - clkin_gmac: external-gmac-clock { compatible = "fixed-clock"; clock-frequency = <125000000>; @@ -94,27 +53,10 @@ #clock-cells = <0>; }; - vcc_phy: vcc-phy-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc_phy"; - regulator-always-on; - regulator-boot-on; - }; - - io-domains { - compatible = "rockchip,rk3399-io-voltage-domain"; - rockchip,grf = <&grf>; - - bt656-supply = <&vcc_3v0>; /* bt656_gpio2ab_ms */ - audio-supply = <&vcca1v8_codec>; /* audio_gpio3d4a_ms */ - sdmmc-supply = <&vcc_sd>; /* sdmmc_gpio4b_ms */ - gpio1830-supply = <&vcc_3v0>; /* gpio1833_gpio4cd_ms */ - }; - - pmu-io-domains { - compatible = "rockchip,rk3399-pmu-io-voltage-domain"; - rockchip,grf = <&pmugrf>; - pmu1830-supply = <&vcc_3v0>; + dw_hdmi_audio: dw-hdmi-audio { + status = "okay"; + compatible = "rockchip,dw-hdmi-audio"; + #sound-dai-cells = <0>; }; hdmi_sound: hdmi-sound { @@ -123,6 +65,7 @@ simple-audio-card,format = "i2s"; simple-audio-card,mclk-fs = <256>; simple-audio-card,name = "rockchip,hdmi"; + simple-audio-card,cpu { sound-dai = <&i2s2>; }; @@ -131,10 +74,20 @@ }; }; - dw_hdmi_audio: dw-hdmi-audio { - status = "okay"; - compatible = "rockchip,dw-hdmi-audio"; - #sound-dai-cells = <0>; + io-domains { + compatible = "rockchip,rk3399-io-voltage-domain"; + rockchip,grf = <&grf>; + + bt656-supply = <&vcc_3v0>; /* bt656_gpio2ab_ms */ + audio-supply = <&vcca1v8_codec>; /* audio_gpio3d4a_ms */ + sdmmc-supply = <&vcc_sd>; /* sdmmc_gpio4b_ms */ + gpio1830-supply = <&vcc_3v0>; /* gpio1833_gpio4cd_ms */ + }; + + pmu-io-domains { + compatible = "rockchip,rk3399-pmu-io-voltage-domain"; + rockchip,grf = <&pmugrf>; + pmu1830-supply = <&vcc_3v0>; }; sdio_pwrseq: sdio-pwrseq { @@ -152,6 +105,54 @@ */ reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; /* GPIO0_B2 */ }; + + vcc3v3_sys: vcc3v3-sys { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + vcc5v0_host: vcc5v0-host-regulator { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&host_vbus_drv>; + regulator-name = "vcc5v0_host"; + }; + + vcc5v0_sys: vcc5v0-sys { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; + + vcc_phy: vcc-phy-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc_phy"; + regulator-always-on; + regulator-boot-on; + }; + + vdd_log: vdd-log { + compatible = "pwm-regulator"; + pwms = <&pwm2 0 25000 0>; + regulator-name = "vdd_log"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1400000>; + regulator-always-on; + regulator-boot-on; + + /* for rockchip boot on */ + rockchip,pwm_id= <2>; + rockchip,pwm_voltage = <1000000>; + }; }; &cpu_l0 { @@ -178,45 +179,6 @@ cpu-supply = <&vdd_cpu_b>; }; -&gpu { - status = "okay"; - mali-supply = <&vdd_gpu>; -}; - -&sdmmc { - clock-frequency = <150000000>; - clock-freq-min-max = <100000 150000000>; - supports-sd; - bus-width = <4>; - cap-mmc-highspeed; - cap-sd-highspeed; - disable-wp; - num-slots = <1>; - //sd-uhs-sdr104; - vqmmc-supply = <&vcc_sd>; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>; - status = "okay"; -}; - -&sdio0 { - clock-frequency = <50000000>; - clock-freq-min-max = <200000 50000000>; - supports-sdio; - bus-width = <4>; - disable-wp; - cap-sd-highspeed; - cap-sdio-irq; - keep-power-in-suspend; - mmc-pwrseq = <&sdio_pwrseq>; - non-removable; - num-slots = <1>; - pinctrl-names = "default"; - pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>; - sd-uhs-sdr104; - status = "okay"; -}; - &emmc_phy { freq-sel = <200000000>; dr-sel = <50>; @@ -224,27 +186,25 @@ status = "okay"; }; -&sdhci { - bus-width = <8>; - mmc-hs400-1_8v; - supports-emmc; - non-removable; - keep-power-in-suspend; - mmc-hs400-enhanced-strobe; - status = "okay"; -}; - -&i2s0 { +&gmac { + phy-supply = <&vcc_phy>; + phy-mode = "rgmii"; + clock_in_out = "input"; + snps,reset-gpio = <&gpio3 15 GPIO_ACTIVE_LOW>; + snps,reset-active-low; + snps,reset-delays-us = <0 10000 50000>; + assigned-clocks = <&cru SCLK_RMII_SRC>; + assigned-clock-parents = <&clkin_gmac>; + pinctrl-names = "default"; + pinctrl-0 = <&rgmii_pins>; + tx_delay = <0x28>; + rx_delay = <0x11>; status = "okay"; - rockchip,i2s-broken-burst-len; - rockchip,playback-channels = <8>; - rockchip,capture-channels = <8>; - #sound-dai-cells = <0>; }; -&i2s2 { - #sound-dai-cells = <0>; +&gpu { status = "okay"; + mali-supply = <&vdd_gpu>; }; &i2c0 { @@ -471,6 +431,19 @@ }; }; +&i2s0 { + status = "okay"; + rockchip,i2s-broken-burst-len; + rockchip,playback-channels = <8>; + rockchip,capture-channels = <8>; + #sound-dai-cells = <0>; +}; + +&i2s2 { + #sound-dai-cells = <0>; + status = "okay"; +}; + &pcie0 { assigned-clocks = <&cru SCLK_PCIEPHY_REF>; assigned-clock-parents = <&cru SCLK_PCIEPHY_REF100M>; @@ -482,6 +455,62 @@ status = "okay"; }; +&pwm0 { + status = "okay"; +}; + +&pwm2 { + status = "okay"; +}; + +&sdhci { + bus-width = <8>; + mmc-hs400-1_8v; + supports-emmc; + non-removable; + keep-power-in-suspend; + mmc-hs400-enhanced-strobe; + status = "okay"; +}; + +&sdio0 { + clock-frequency = <50000000>; + clock-freq-min-max = <200000 50000000>; + supports-sdio; + bus-width = <4>; + disable-wp; + cap-sd-highspeed; + cap-sdio-irq; + keep-power-in-suspend; + mmc-pwrseq = <&sdio_pwrseq>; + non-removable; + num-slots = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>; + sd-uhs-sdr104; + status = "okay"; +}; + +&sdmmc { + clock-frequency = <150000000>; + clock-freq-min-max = <100000 150000000>; + supports-sd; + bus-width = <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + disable-wp; + num-slots = <1>; + //sd-uhs-sdr104; + vqmmc-supply = <&vcc_sd>; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>; + status = "okay"; +}; + +&saradc { + status = "okay"; +}; + &tsadc { /* tshut mode 0:CRU 1:GPIO */ rockchip,hw-tshut-mode = <1>; @@ -516,19 +545,7 @@ }; }; -&usb_host0_ehci { - status = "okay"; -}; - -&usb_host0_ohci { - status = "okay"; -}; - -&usb_host1_ehci { - status = "okay"; -}; - -&usb_host1_ohci { +&uart2 { status = "okay"; }; @@ -536,11 +553,11 @@ status = "okay"; }; -&usbdrd_dwc3_0 { +&usbdrd3_1 { status = "okay"; }; -&usbdrd3_1 { +&usbdrd_dwc3_0 { status = "okay"; }; @@ -549,35 +566,19 @@ dr_mode = "host"; }; -&uart2 { - status = "okay"; -}; - -&pwm0 { +&usb_host0_ehci { status = "okay"; }; -&pwm2 { +&usb_host0_ohci { status = "okay"; }; -&saradc { +&usb_host1_ehci { status = "okay"; }; -&gmac { - phy-supply = <&vcc_phy>; - phy-mode = "rgmii"; - clock_in_out = "input"; - snps,reset-gpio = <&gpio3 15 GPIO_ACTIVE_LOW>; - snps,reset-active-low; - snps,reset-delays-us = <0 10000 50000>; - assigned-clocks = <&cru SCLK_RMII_SRC>; - assigned-clock-parents = <&clkin_gmac>; - pinctrl-names = "default"; - pinctrl-0 = <&rgmii_pins>; - tx_delay = <0x28>; - rx_delay = <0x11>; +&usb_host1_ohci { status = "okay"; }; @@ -666,9 +667,9 @@ 1024 1108 /* 1992MHz */ >; idle-cost-data = < - 15 - 15 - 0 + 15 + 15 + 0 >; }; @@ -683,9 +684,9 @@ 401 222 /* 1512M */ >; idle-cost-data = < - 6 - 6 - 0 + 6 + 6 + 0 >; }; @@ -702,9 +703,9 @@ 1024 1108 /* 1992MHz */ >; idle-cost-data = < - 65 - 65 - 65 + 65 + 65 + 65 >; }; -- 2.34.1