From f0924551e6b27c6b65e61a7235fd1bafb79ab171 Mon Sep 17 00:00:00 2001 From: Tom Stellard Date: Thu, 23 Apr 2015 19:33:52 +0000 Subject: [PATCH] R600/SI: v_mov_fed_b32 does not exist on VI git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235628 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/R600/SIInstructions.td | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/lib/Target/R600/SIInstructions.td b/lib/Target/R600/SIInstructions.td index 91e8c8c236b..dbd24d33a5f 100644 --- a/lib/Target/R600/SIInstructions.td +++ b/lib/Target/R600/SIInstructions.td @@ -1272,7 +1272,6 @@ defm V_CVT_U32_F32 : VOP1Inst , "v_cvt_u32_f32", defm V_CVT_I32_F32 : VOP1Inst , "v_cvt_i32_f32", VOP_I32_F32, fp_to_sint >; -defm V_MOV_FED_B32 : VOP1Inst , "v_mov_fed_b32", VOP_I32_I32>; defm V_CVT_F16_F32 : VOP1Inst , "v_cvt_f16_f32", VOP_I32_F32, fp_to_f16 >; @@ -1408,6 +1407,7 @@ let SubtargetPredicate = isSICI in { let SchedRW = [WriteQuarterRate32] in { +defm V_MOV_FED_B32 : VOP1InstSI , "v_mov_fed_b32", VOP_I32_I32>; defm V_LOG_CLAMP_F32 : VOP1InstSI , "v_log_clamp_f32", VOP_F32_F32>; defm V_RCP_CLAMP_F32 : VOP1InstSI , "v_rcp_clamp_f32", VOP_F32_F32>; defm V_RCP_LEGACY_F32 : VOP1InstSI , "v_rcp_legacy_f32", VOP_F32_F32>; -- 2.34.1