From f0cf19561eef0c050999a3b2c78d9e9fc612fa4e Mon Sep 17 00:00:00 2001 From: xxx Date: Wed, 5 Sep 2012 19:30:29 -0700 Subject: [PATCH] correct bugs for 'cpu hclk and pclk is 1:1 --- arch/arm/mach-rk30/clock_data.c | 4 ++++ 1 file changed, 4 insertions(+) mode change 100644 => 100755 arch/arm/mach-rk30/clock_data.c diff --git a/arch/arm/mach-rk30/clock_data.c b/arch/arm/mach-rk30/clock_data.c old mode 100644 new mode 100755 index 4f84d7f6ecab..fe432f068cee --- a/arch/arm/mach-rk30/clock_data.c +++ b/arch/arm/mach-rk30/clock_data.c @@ -981,6 +981,10 @@ static int arm_pll_clk_set_rate(struct clk *clk, unsigned long rate) { ps_clksel1=force_cpu_hpclk_11(ps->clksel1); } + else + { + ps_clksel1=ps->clksel1; + } //return form slow //cru_writel(PLL_MODE_NORM(APLL_ID), CRU_MODE_CON); //a/h/p clk sel -- 2.34.1