From f10802ddc8d414d0fa9f3e264bfd7e212c22d71b Mon Sep 17 00:00:00 2001 From: Reid Kleckner Date: Fri, 9 Oct 2015 00:15:13 +0000 Subject: [PATCH] [SEH] Fix llvm.eh.exceptioncode fast register allocation assertion I called the wrong MachineBasicBlock::addLiveIn() overload. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249786 91177308-0d34-0410-b5e6-96231b3b80d8 --- include/llvm/CodeGen/SelectionDAGISel.h | 1 - lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp | 2 +- test/CodeGen/X86/seh-exception-code.ll | 4 ++-- 3 files changed, 3 insertions(+), 4 deletions(-) diff --git a/include/llvm/CodeGen/SelectionDAGISel.h b/include/llvm/CodeGen/SelectionDAGISel.h index cae343debb6..a011e4c338c 100644 --- a/include/llvm/CodeGen/SelectionDAGISel.h +++ b/include/llvm/CodeGen/SelectionDAGISel.h @@ -264,7 +264,6 @@ private: /// personality specific tasks. Returns true if the block should be /// instruction selected, false if no code should be emitted for it. bool PrepareEHLandingPad(); - bool PrepareEHPad(); /// \brief Perform instruction selection on all basic blocks in the function. void SelectAllBasicBlocks(const Function &Fn); diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp index bd60bba318c..0df05683b4f 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp @@ -950,7 +950,7 @@ bool SelectionDAGISel::PrepareEHLandingPad() { // the live in physreg and copy into the vreg. MCPhysReg EHPhysReg = TLI->getExceptionPointerRegister(); assert(EHPhysReg && "target lacks exception pointer register"); - FuncInfo->ExceptionPointerVirtReg = MBB->addLiveIn(EHPhysReg, PtrRC); + MBB->addLiveIn(EHPhysReg); unsigned VReg = FuncInfo->getCatchPadExceptionPointerVReg(CPI, PtrRC); BuildMI(*MBB, FuncInfo->InsertPt, SDB->getCurDebugLoc(), TII->get(TargetOpcode::COPY), VReg) diff --git a/test/CodeGen/X86/seh-exception-code.ll b/test/CodeGen/X86/seh-exception-code.ll index 28e93617bba..52246907874 100644 --- a/test/CodeGen/X86/seh-exception-code.ll +++ b/test/CodeGen/X86/seh-exception-code.ll @@ -1,4 +1,5 @@ ; RUN: llc < %s | FileCheck %s +; RUN: llc -O0 < %s | FileCheck %s target datalayout = "e-m:w-i64:64-f80:128-n8:16:32:64-S128" target triple = "x86_64-pc-windows-msvc" @@ -34,8 +35,7 @@ catchendblock: ; preds = %catch.dispatch ; CHECK-LABEL: ehcode: ; CHECK: xorl %ecx, %ecx ; CHECK: callq f -; CHECK: retq ; CHECK: # %__except -; CHECK-NEXT: movl %eax, %ecx +; CHECK: movl %eax, %ecx ; CHECK-NEXT: callq f -- 2.34.1