From f3b0d1a555eaa46931e4ec1b11e434e8cba2b5d7 Mon Sep 17 00:00:00 2001 From: Bob Wilson Date: Tue, 27 Oct 2009 19:52:03 +0000 Subject: [PATCH] Do not clear the "S" bit for RSCri and RSCrs. They inherit from the "sI" instruction format that already takes care of setting this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85280 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/ARM/ARMInstrInfo.td | 2 -- 1 file changed, 2 deletions(-) diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td index 7ca9a64a8c4..69e63b2cfd7 100644 --- a/lib/Target/ARM/ARMInstrInfo.td +++ b/lib/Target/ARM/ARMInstrInfo.td @@ -1131,7 +1131,6 @@ def RSCri : AsI1<0b0111, (outs GPR:$dst), (ins GPR:$a, so_imm:$b), DPFrm, IIC_iALUi, "rsc", "\t$dst, $a, $b", [(set GPR:$dst, (sube so_imm:$b, GPR:$a))]>, Requires<[IsARM, CarryDefIsUnused]> { - let Inst{20} = 0; let Inst{25} = 1; } def RSCrs : AsI1<0b0111, (outs GPR:$dst), (ins GPR:$a, so_reg:$b), @@ -1140,7 +1139,6 @@ def RSCrs : AsI1<0b0111, (outs GPR:$dst), (ins GPR:$a, so_reg:$b), Requires<[IsARM, CarryDefIsUnused]> { let Inst{4} = 1; let Inst{7} = 0; - let Inst{20} = 0; let Inst{25} = 0; } } -- 2.34.1