From f440eb1354bc92855bbbff08d3ac4a93029c3097 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Ville=20Syrj=C3=A4l=C3=A4?= Date: Tue, 4 Jun 2013 13:49:01 +0300 Subject: [PATCH] drm/i915: Enable the overlay right after primary and cursor planes MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Again follow the same sequence for all generations, because doing otherwise just doesn't make sense. Signed-off-by: Ville Syrjälä Reviewed-by: Rodrigo Vivi Signed-off-by: Daniel Vetter --- drivers/gpu/drm/i915/intel_display.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 532a4fa67bb2..bf8fe819cfbd 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -3622,11 +3622,11 @@ static void valleyview_crtc_enable(struct drm_crtc *crtc) intel_enable_plane(dev_priv, plane, pipe); intel_crtc_update_cursor(crtc, true); - intel_update_fbc(dev); - /* Give the overlay scaler a chance to enable if it's on this pipe */ intel_crtc_dpms_overlay(intel_crtc, true); + intel_update_fbc(dev); + mutex_unlock(&dev_priv->dpio_lock); } @@ -3664,11 +3664,11 @@ static void i9xx_crtc_enable(struct drm_crtc *crtc) if (IS_G4X(dev)) g4x_fixup_plane(dev_priv, pipe); - intel_update_fbc(dev); - /* Give the overlay scaler a chance to enable if it's on this pipe */ intel_crtc_dpms_overlay(intel_crtc, true); + intel_update_fbc(dev); + for_each_encoder_on_crtc(dev, crtc, encoder) encoder->enable(encoder); } -- 2.34.1