From f5dcca1cf47a3a3167a9083788f109de680ea5c1 Mon Sep 17 00:00:00 2001 From: yzq Date: Sun, 1 Apr 2012 01:46:27 -0700 Subject: [PATCH] rk610 lvds screen 1024x768 1280x800 update --- drivers/video/display/screen/Kconfig | 6 + drivers/video/display/screen/Makefile | 1 + .../video/display/screen/lcd_hdmi_1024x768.c | 140 ++++++++- .../video/display/screen/lcd_hdmi_1280x800.c | 277 ++++++++++++++++++ drivers/video/display/screen/screen.h | 8 +- 5 files changed, 420 insertions(+), 12 deletions(-) create mode 100644 drivers/video/display/screen/lcd_hdmi_1280x800.c diff --git a/drivers/video/display/screen/Kconfig b/drivers/video/display/screen/Kconfig index a93e42cb9ef6..a2e91db7ba18 100644 --- a/drivers/video/display/screen/Kconfig +++ b/drivers/video/display/screen/Kconfig @@ -68,6 +68,12 @@ config LCD_A050VL01 bool "RGB A050VL01" config LCD_B101EW05 bool "RGB lcd panel B101EW05" + +config LCD_HDMI_1280x800 + depends on MFD_RK610 + bool "RGB Hannstar LCD_HDMI_1280X800" + ---help--- + if support RK610, this setting can support dual screen output config LCD_HDMI_1024x768 depends on MFD_RK610 bool "RGB Hannstar LCD_HDMI_1024X768" diff --git a/drivers/video/display/screen/Makefile b/drivers/video/display/screen/Makefile index fd03740b4aa5..e15857a86d76 100644 --- a/drivers/video/display/screen/Makefile +++ b/drivers/video/display/screen/Makefile @@ -22,6 +22,7 @@ obj-$(CONFIG_LCD_CPTCLAA038LA31XE) += lcd_CPTclaa038la31xe.o obj-$(CONFIG_LCD_HX8357) += lcd_hx8357.o obj-$(CONFIG_LCD_HSD100PXN) += lcd_hsd100pxn.o +obj-$(CONFIG_LCD_HDMI_1280x800) += lcd_hdmi_1280x800.o obj-$(CONFIG_LCD_HDMI_1024x768) += lcd_hdmi_1024x768.o obj-$(CONFIG_LCD_HDMI_800x480) += lcd_hdmi_800x480.o obj-$(CONFIG_LCD_HSD07PFW1) += lcd_hsd07pfw1.o diff --git a/drivers/video/display/screen/lcd_hdmi_1024x768.c b/drivers/video/display/screen/lcd_hdmi_1024x768.c index 821cc59b74c7..12d1ce1a456a 100644 --- a/drivers/video/display/screen/lcd_hdmi_1024x768.c +++ b/drivers/video/display/screen/lcd_hdmi_1024x768.c @@ -11,28 +11,28 @@ /* Base */ #define OUT_TYPE SCREEN_LVDS -#define OUT_FORMAT LVDS_8BIT_3 +#define OUT_FORMAT LVDS_8BIT_2 #define OUT_FACE OUT_D888_P666 #define OUT_CLK 65000000 #define LCDC_ACLK 500000000//312000000 //29 lcdc axi DMA ƵÂÊ /* Timing */ -#define H_PW 48 //10 -#define H_BP 88 //100 -#define H_VD 800 //1024 -#define H_FP 40 //210 +#define H_PW 10 +#define H_BP 100 +#define H_VD 1024 +#define H_FP 210 -#define V_PW 3 //10 -#define V_BP 32 //10 -#define V_VD 480 //768 -#define V_FP 13 //18 +#define V_PW 10 +#define V_BP 10 +#define V_VD 768 +#define V_FP 18 #define LCD_WIDTH 202 #define LCD_HEIGHT 152 /* scaler Timing */ //1920*1080*60 -#define S_OUT_CLK SCALE_RATE(148500000,66000000) +#define S_OUT_CLK SCALE_RATE(148500000,66000000) //m=16 n=9 no=4 #define S_H_PW 100 #define S_H_BP 100 #define S_H_VD 1024 @@ -47,7 +47,7 @@ #define S_V_ST 14 //1920*1080*50 -#define S1_OUT_CLK SCALE_RATE(148500000,54000000) +#define S1_OUT_CLK SCALE_RATE(148500000,54000000) //m=16 n=11 no=4 #define S1_H_PW 100 #define S1_H_BP 100 #define S1_H_VD 1024 @@ -60,6 +60,66 @@ #define S1_H_ST 1757 #define S1_V_ST 14 + +//1280*720*60 +#define S2_OUT_CLK SCALE_RATE(74250000,66000000) //m=32 n=9 no=4 +#define S2_H_PW 100 +#define S2_H_BP 100 +#define S2_H_VD 1024 +#define S2_H_FP 151 + +#define S2_V_PW 5 +#define S2_V_BP 15 +#define S2_V_VD 768 +#define S2_V_FP 12 + +#define S2_H_ST 0 +#define S2_V_ST 12 +//1280*720*50 + +#define S3_OUT_CLK SCALE_RATE(74250000,54000000) // m=32 n=11 no=4 +#define S3_H_PW 100 +#define S3_H_BP 100 +#define S3_H_VD 1024 +#define S3_H_FP 151 + +#define S3_V_PW 5 +#define S3_V_BP 15 +#define S3_V_VD 768 +#define S3_V_FP 12 + +#define S3_H_ST 0 +#define S3_V_ST 12 + +//720*576*50 +#define S4_OUT_CLK SCALE_RATE(27000000,54375000) //m=145 n=9 no=8 +#define S4_H_PW 100 +#define S4_H_BP 100 +#define S4_H_VD 1024 +#define S4_H_FP 81 + +#define S4_V_PW 5 +#define S4_V_BP 15 +#define S4_V_VD 768 +#define S4_V_FP 45 + + +#define S4_H_ST 435 +#define S4_V_ST 45 +//720*480*60 +#define S5_OUT_CLK SCALE_RATE(27000000,72000000) //m=32 n=3 no=4 +#define S5_H_PW 100 +#define S5_H_BP 100 +#define S5_H_VD 1024 +#define S5_H_FP 81 + +#define S5_V_PW 5 +#define S5_V_BP 15 +#define S5_V_VD 768 +#define S5_V_FP 51 + +#define S5_H_ST 858 +#define S5_V_ST 45 /* Other */ #define DCLK_POL 0 #define SWAP_RB 0 @@ -95,6 +155,64 @@ static int set_scaler_info(struct rk29fb_screen *screen, u8 hdmi_resolution) screen->s_hsync_st = S1_H_ST; screen->s_vsync_st = S1_V_ST; break; + case HDMI_1280x720p_60Hz: + /* Scaler Timing */ + screen->hdmi_resolution = hdmi_resolution; + screen->s_pixclock = S2_OUT_CLK; + screen->s_hsync_len = S2_H_PW; + screen->s_left_margin = S2_H_BP; + screen->s_right_margin = S2_H_FP; + screen->s_hsync_len = S2_H_PW; + screen->s_upper_margin = S2_V_BP; + screen->s_lower_margin = S2_V_FP; + screen->s_vsync_len = S2_V_PW; + screen->s_hsync_st = S2_H_ST; + screen->s_vsync_st = S2_V_ST; + break; + case HDMI_1280x720p_50Hz: + /* Scaler Timing */ + screen->hdmi_resolution = hdmi_resolution; + screen->s_pixclock = S3_OUT_CLK; + screen->s_hsync_len = S3_H_PW; + screen->s_left_margin = S3_H_BP; + screen->s_right_margin = S3_H_FP; + screen->s_hsync_len = S3_H_PW; + screen->s_upper_margin = S3_V_BP; + screen->s_lower_margin = S3_V_FP; + screen->s_vsync_len = S3_V_PW; + screen->s_hsync_st = S3_H_ST; + screen->s_vsync_st = S3_V_ST; + break; + case HDMI_720x576p_50Hz_4x3: + case HDMI_720x576p_50Hz_16x9: + /* Scaler Timing */ + screen->hdmi_resolution = hdmi_resolution; + screen->s_pixclock = S4_OUT_CLK; + screen->s_hsync_len = S4_H_PW; + screen->s_left_margin = S4_H_BP; + screen->s_right_margin = S4_H_FP; + screen->s_hsync_len = S4_H_PW; + screen->s_upper_margin = S4_V_BP; + screen->s_lower_margin = S4_V_FP; + screen->s_vsync_len = S4_V_PW; + screen->s_hsync_st = S4_H_ST; + screen->s_vsync_st = S4_V_ST; + break; + case HDMI_720x480p_60Hz_16x9: + case HDMI_720x480p_60Hz_4x3: + /* Scaler Timing */ + screen->hdmi_resolution = hdmi_resolution; + screen->s_pixclock = S5_OUT_CLK; + screen->s_hsync_len = S5_H_PW; + screen->s_left_margin = S5_H_BP; + screen->s_right_margin = S5_H_FP; + screen->s_hsync_len = S5_H_PW; + screen->s_upper_margin = S5_V_BP; + screen->s_lower_margin = S5_V_FP; + screen->s_vsync_len = S5_V_PW; + screen->s_hsync_st = S5_H_ST; + screen->s_vsync_st = S5_V_ST; + break; default : printk("%s lcd not support dual display at this hdmi resolution %d \n",__func__,hdmi_resolution); return -1; diff --git a/drivers/video/display/screen/lcd_hdmi_1280x800.c b/drivers/video/display/screen/lcd_hdmi_1280x800.c new file mode 100644 index 000000000000..7154f6a9b12d --- /dev/null +++ b/drivers/video/display/screen/lcd_hdmi_1280x800.c @@ -0,0 +1,277 @@ +#include +#include +#include +#include +#include +#include "screen.h" +#include +#include "../../rk29_fb.h" +#include "../lcd/rk610_lcd.h" + + +/* Base */ +#define OUT_TYPE SCREEN_LVDS + +#define OUT_FORMAT LVDS_8BIT_2 + +#define OUT_FACE OUT_D888_P666 +#define OUT_CLK 65000000 +#define LCDC_ACLK 500000000//312000000 //29 lcdc axi DMA ƵÂÊ + + +/* Timing */ +#define H_PW 10 +#define H_BP 10 +#define H_VD 1280 +#define H_FP 20 + +#define V_PW 10 +#define V_BP 10 +#define V_VD 800 +#define V_FP 13 + +#define LCD_WIDTH 202 +#define LCD_HEIGHT 152 + +/* scaler Timing */ +//1920*1080*60 + +#define S_OUT_CLK SCALE_RATE(148500000,66000000) //m=16 n=9 no=4 +#define S_H_PW 10 +#define S_H_BP 10 +#define S_H_VD 1280 +#define S_H_FP 20 + +#define S_V_PW 10 +#define S_V_BP 10 +#define S_V_VD 800 +#define S_V_FP 13 + +#define S_H_ST 440 +#define S_V_ST 13 + +//1920*1080*50 +#define S1_OUT_CLK SCALE_RATE(148500000,57375000) //m=17 n=11 no=4 +#define S1_H_PW 10 +#define S1_H_BP 10 +#define S1_H_VD 1280 +#define S1_H_FP 77 + +#define S1_V_PW 10 +#define S1_V_BP 10 +#define S1_V_VD 800 +#define S1_V_FP 13 + +#define S1_H_ST 459 +#define S1_V_ST 13 + +//1280*720*60 +#define S2_OUT_CLK SCALE_RATE(74250000,66000000) //m=32 n=9 no=4 +#define S2_H_PW 10 +#define S2_H_BP 10 +#define S2_H_VD 1280 +#define S2_H_FP 20 + +#define S2_V_PW 10 +#define S2_V_BP 10 +#define S2_V_VD 800 +#define S2_V_FP 13 + +#define S2_H_ST 440 +#define S2_V_ST 13 + +//1280*720*50 + +#define S3_OUT_CLK SCALE_RATE(74250000,57375000) // m=34 n=11 no=4 +#define S3_H_PW 10 +#define S3_H_BP 10 +#define S3_H_VD 1280 +#define S3_H_FP 77 + +#define S3_V_PW 10 +#define S3_V_BP 10 +#define S3_V_VD 800 +#define S3_V_FP 13 + +#define S3_H_ST 459 +#define S3_V_ST 13 + +//720*576*50 +#define S4_OUT_CLK SCALE_RATE(27000000,63281250) //m=75 n=4 no=8 +#define S4_H_PW 10 +#define S4_H_BP 10 +#define S4_H_VD 1280 +#define S4_H_FP 185 + +#define S4_V_PW 10 +#define S4_V_BP 10 +#define S4_V_VD 800 +#define S4_V_FP 48 + +#define S4_H_ST 81 +#define S4_V_ST 48 + +//720*480*60 +#define S5_OUT_CLK SCALE_RATE(27000000,75000000) //m=100 n=9 no=4 +#define S5_H_PW 10 +#define S5_H_BP 10 +#define S5_H_VD 1280 +#define S5_H_FP 130 + +#define S5_V_PW 10 +#define S5_V_BP 10 +#define S5_V_VD 800 +#define S5_V_FP 54 + +#define S5_H_ST 476 +#define S5_V_ST 48 +/* Other */ +#define DCLK_POL 0 +#define SWAP_RB 0 + +#ifdef CONFIG_HDMI_DUAL_DISP +static int set_scaler_info(struct rk29fb_screen *screen, u8 hdmi_resolution) +{ + switch(hdmi_resolution){ + case HDMI_1920x1080p_60Hz: + /* Scaler Timing */ + screen->hdmi_resolution = hdmi_resolution; + screen->s_pixclock = S_OUT_CLK; + screen->s_hsync_len = S_H_PW; + screen->s_left_margin = S_H_BP; + screen->s_right_margin = S_H_FP; + screen->s_hsync_len = S_H_PW; + screen->s_upper_margin = S_V_BP; + screen->s_lower_margin = S_V_FP; + screen->s_vsync_len = S_V_PW; + screen->s_hsync_st = S_H_ST; + screen->s_vsync_st = S_V_ST; + break; + case HDMI_1920x1080p_50Hz: + /* Scaler Timing */ + screen->hdmi_resolution = hdmi_resolution; + screen->s_pixclock = S1_OUT_CLK; + screen->s_hsync_len = S1_H_PW; + screen->s_left_margin = S1_H_BP; + screen->s_right_margin = S1_H_FP; + screen->s_hsync_len = S1_H_PW; + screen->s_upper_margin = S1_V_BP; + screen->s_lower_margin = S1_V_FP; + screen->s_vsync_len = S1_V_PW; + screen->s_hsync_st = S1_H_ST; + screen->s_vsync_st = S1_V_ST; + break; + case HDMI_1280x720p_60Hz: + /* Scaler Timing */ + screen->hdmi_resolution = hdmi_resolution; + screen->s_pixclock = S2_OUT_CLK; + screen->s_hsync_len = S2_H_PW; + screen->s_left_margin = S2_H_BP; + screen->s_right_margin = S2_H_FP; + screen->s_hsync_len = S2_H_PW; + screen->s_upper_margin = S2_V_BP; + screen->s_lower_margin = S2_V_FP; + screen->s_vsync_len = S2_V_PW; + screen->s_hsync_st = S2_H_ST; + screen->s_vsync_st = S2_V_ST; + break; + case HDMI_1280x720p_50Hz: + /* Scaler Timing */ + screen->hdmi_resolution = hdmi_resolution; + screen->s_pixclock = S3_OUT_CLK; + screen->s_hsync_len = S3_H_PW; + screen->s_left_margin = S3_H_BP; + screen->s_right_margin = S3_H_FP; + screen->s_hsync_len = S3_H_PW; + screen->s_upper_margin = S3_V_BP; + screen->s_lower_margin = S3_V_FP; + screen->s_vsync_len = S3_V_PW; + screen->s_hsync_st = S3_H_ST; + screen->s_vsync_st = S3_V_ST; + break; + case HDMI_720x576p_50Hz_4x3: + case HDMI_720x576p_50Hz_16x9: + /* Scaler Timing */ + screen->hdmi_resolution = hdmi_resolution; + screen->s_pixclock = S4_OUT_CLK; + screen->s_hsync_len = S4_H_PW; + screen->s_left_margin = S4_H_BP; + screen->s_right_margin = S4_H_FP; + screen->s_hsync_len = S4_H_PW; + screen->s_upper_margin = S4_V_BP; + screen->s_lower_margin = S4_V_FP; + screen->s_vsync_len = S4_V_PW; + screen->s_hsync_st = S4_H_ST; + screen->s_vsync_st = S4_V_ST; + break; + case HDMI_720x480p_60Hz_16x9: + case HDMI_720x480p_60Hz_4x3: + /* Scaler Timing */ + screen->hdmi_resolution = hdmi_resolution; + screen->s_pixclock = S5_OUT_CLK; + screen->s_hsync_len = S5_H_PW; + screen->s_left_margin = S5_H_BP; + screen->s_right_margin = S5_H_FP; + screen->s_hsync_len = S5_H_PW; + screen->s_upper_margin = S5_V_BP; + screen->s_lower_margin = S5_V_FP; + screen->s_vsync_len = S5_V_PW; + screen->s_hsync_st = S5_H_ST; + screen->s_vsync_st = S5_V_ST; + break; + default : + printk("%s lcd not support dual display at this hdmi resolution %d \n",__func__,hdmi_resolution); + return -1; + break; + } + + return 0; +} +#else +static int set_scaler_info(struct rk29fb_screen *screen, u8 hdmi_resolution){} +#endif +void set_lcd_info(struct rk29fb_screen *screen, struct rk29lcd_info *lcd_info ) +{ + /* screen type & face */ + screen->type = OUT_TYPE; + screen->face = OUT_FACE; + + /* Screen size */ + screen->x_res = H_VD; + screen->y_res = V_VD; + + screen->width = LCD_WIDTH; + screen->height = LCD_HEIGHT; + + /* Timing */ + screen->lcdc_aclk = LCDC_ACLK; + screen->pixclock = OUT_CLK; + screen->left_margin = H_BP; + screen->right_margin = H_FP; + screen->hsync_len = H_PW; + screen->upper_margin = V_BP; + screen->lower_margin = V_FP; + screen->vsync_len = V_PW; + + /* Pin polarity */ + screen->pin_hsync = 0; + screen->pin_vsync = 0; + screen->pin_den = 0; + screen->pin_dclk = DCLK_POL; + + /* Swap rule */ + screen->swap_rb = SWAP_RB; + screen->swap_rg = 0; + screen->swap_gb = 0; + screen->swap_delta = 0; + screen->swap_dumy = 0; + + /* Operation function*/ + screen->init = NULL; + screen->standby = NULL; + screen->sscreen_get = set_scaler_info; + screen->sscreen_set = rk610_lcd_scaler_set_param; +} + + + diff --git a/drivers/video/display/screen/screen.h b/drivers/video/display/screen/screen.h index 5096d7cda698..73bccaf6ca5a 100755 --- a/drivers/video/display/screen/screen.h +++ b/drivers/video/display/screen/screen.h @@ -26,18 +26,24 @@ enum{ enum{ SCALE_PLL(148500000, 66000000, 16, 9, 4), - SCALE_PLL(148500000, 54000000, 16, 11, 4), + SCALE_PLL(148500000, 57375000, 17, 11, 4), + SCALE_PLL(148500000, 54000000, 16, 11, 4), SCALE_PLL(148500000, 33000000, 16, 9, 8), SCALE_PLL(148500000, 30375000, 18, 11, 8), SCALE_PLL(148500000, 29700000, 16, 10, 8), SCALE_PLL(148500000, 25312500, 15, 11, 8), SCALE_PLL(74250000, 66000000, 32, 9, 4), + SCALE_PLL(74250000, 57375000, 34, 11, 4), SCALE_PLL(74250000, 54000000, 32, 11, 4), SCALE_PLL(74250000, 33000000, 32, 9, 8), SCALE_PLL(74250000, 30375000, 36, 11, 8), SCALE_PLL(74250000, 25312500, 30, 11, 8), + SCALE_PLL(27000000, 75000000, 100, 9, 4), + SCALE_PLL(27000000, 72000000, 32, 3, 4), + SCALE_PLL(27000000, 63281250, 75, 4, 8), + SCALE_PLL(27000000, 54375000, 145, 9, 8), SCALE_PLL(27000000, 31500000, 28, 3, 8), SCALE_PLL(27000000, 30000000, 80, 9, 8), }; -- 2.34.1