From f609bb8466e28ef63eb4db9de485583c6d5b8bc9 Mon Sep 17 00:00:00 2001
From: Evan Cheng <evan.cheng@apple.com>
Date: Tue, 19 Jan 2010 00:44:15 +0000
Subject: [PATCH] Fix r93758. Use isel patterns instead of c++ selection code
 to select rbit and make sure we pick different instructions for ARM vs.
 Thumb2.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93829 91177308-0d34-0410-b5e6-96231b3b80d8
---
 lib/Target/ARM/ARMISelDAGToDAG.cpp | 6 ------
 lib/Target/ARM/ARMInstrInfo.td     | 6 +++++-
 lib/Target/ARM/ARMInstrThumb2.td   | 3 ++-
 3 files changed, 7 insertions(+), 8 deletions(-)

diff --git a/lib/Target/ARM/ARMISelDAGToDAG.cpp b/lib/Target/ARM/ARMISelDAGToDAG.cpp
index 073cbffa4bd..a260050cf36 100644
--- a/lib/Target/ARM/ARMISelDAGToDAG.cpp
+++ b/lib/Target/ARM/ARMISelDAGToDAG.cpp
@@ -1680,12 +1680,6 @@ SDNode *ARMDAGToDAGISel::Select(SDNode *N) {
     return CurDAG->getMachineNode(ARM::VMOVRRD, dl, MVT::i32, MVT::i32,
                                   N->getOperand(0), getAL(CurDAG),
                                   CurDAG->getRegister(0, MVT::i32));
-  case ARMISD::RBIT: {
-    EVT VT = N->getValueType(0);
-    SDValue Ops[] = { N->getOperand(0),
-                      getAL(CurDAG), CurDAG->getRegister(0, MVT::i32) };
-    return CurDAG->getMachineNode(ARM::RBIT, dl, VT, Ops, 3);
-  }
   case ISD::UMUL_LOHI: {
     if (Subtarget->isThumb1Only())
       break;
diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td
index 6ea56753f31..b1efab1e2fd 100644
--- a/lib/Target/ARM/ARMInstrInfo.td
+++ b/lib/Target/ARM/ARMInstrInfo.td
@@ -107,6 +107,8 @@ def ARMMemBarrierV6  : SDNode<"ARMISD::MEMBARRIER", SDT_ARMMEMBARRIERV6,
 def ARMSyncBarrierV6 : SDNode<"ARMISD::SYNCBARRIER", SDT_ARMMEMBARRIERV6,
                               [SDNPHasChain]>;
 
+def ARMrbit          : SDNode<"ARMISD::RBIT", SDTIntUnaryOp>;
+
 //===----------------------------------------------------------------------===//
 // ARM Instruction Predicate Definitions.
 //
@@ -1456,7 +1458,9 @@ def CLZ  : AMiscA1I<0b000010110, (outs GPR:$dst), (ins GPR:$src), IIC_iUNAr,
 }
 
 def RBIT : AMiscA1I<0b01101111, (outs GPR:$dst), (ins GPR:$src), IIC_iUNAr,
-              "rbit", "\t$dst, $src", []>, Requires<[IsARM, HasV6T2]> {
+              "rbit", "\t$dst, $src",
+              [(set GPR:$dst, (ARMrbit GPR:$src))]>,
+           Requires<[IsARM, HasV6T2]> {
   let Inst{7-4}   = 0b0011;
   let Inst{11-8}  = 0b1111;
   let Inst{19-16} = 0b1111;
diff --git a/lib/Target/ARM/ARMInstrThumb2.td b/lib/Target/ARM/ARMInstrThumb2.td
index 3670d0fefd7..34a793cbbd2 100644
--- a/lib/Target/ARM/ARMInstrThumb2.td
+++ b/lib/Target/ARM/ARMInstrThumb2.td
@@ -1541,7 +1541,8 @@ def t2CLZ : T2I_misc<0b11, 0b00, (outs GPR:$dst), (ins GPR:$src), IIC_iUNAr,
                     "clz", "\t$dst, $src", [(set GPR:$dst, (ctlz GPR:$src))]>;
 
 def t2RBIT : T2I_misc<0b01, 0b10, (outs GPR:$dst), (ins GPR:$src), IIC_iUNAr,
-                      "rbit", "\t$dst, $src", []>;
+                      "rbit", "\t$dst, $src",
+                      [(set GPR:$dst, (ARMrbit GPR:$src))]>;
 
 def t2REV : T2I_misc<0b01, 0b00, (outs GPR:$dst), (ins GPR:$src), IIC_iUNAr,
                    "rev", ".w\t$dst, $src", [(set GPR:$dst, (bswap GPR:$src))]>;
-- 
2.34.1