From f7e24324baf3dc493279ce39cadd85f5e55a5a99 Mon Sep 17 00:00:00 2001
From: Richard Sandiford <rsandifo@linux.vnet.ibm.com>
Date: Tue, 24 Dec 2013 15:14:05 +0000
Subject: [PATCH] [SystemZ] Add MC support for interlocked-access 1
 instructions

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197984 91177308-0d34-0410-b5e6-96231b3b80d8
---
 lib/Target/SystemZ/SystemZInstrFormats.td |  13 +
 lib/Target/SystemZ/SystemZInstrInfo.td    |  13 +
 lib/Target/SystemZ/SystemZProcessors.td   |  11 +-
 lib/Target/SystemZ/SystemZSubtarget.cpp   |   3 +-
 lib/Target/SystemZ/SystemZSubtarget.h     |   4 +
 test/MC/Disassembler/SystemZ/insns.txt    | 330 ++++++++++++++++++++++
 test/MC/SystemZ/insn-bad-z196.s           | 110 ++++++++
 test/MC/SystemZ/insn-bad.s                |  40 +++
 test/MC/SystemZ/insn-good-z196.s          | 240 ++++++++++++++++
 9 files changed, 761 insertions(+), 3 deletions(-)

diff --git a/lib/Target/SystemZ/SystemZInstrFormats.td b/lib/Target/SystemZ/SystemZInstrFormats.td
index a8efe165e36..50badf82bc7 100644
--- a/lib/Target/SystemZ/SystemZInstrFormats.td
+++ b/lib/Target/SystemZ/SystemZInstrFormats.td
@@ -531,6 +531,10 @@ class InstSS<bits<8> op, dag outs, dag ins, string asmstr, list<dag> pattern>
 //   Ternary:
 //     One register output operand and three register input operands.
 //
+//   LoadAndOp:
+//     One output operand and two input operands.  The first input operand
+//     is a register and the second is an address.
+//
 //   CmpSwap:
 //     One output operand and three input operands.  The first two
 //     operands are registers and the third is an address.  The instruction
@@ -1267,6 +1271,15 @@ class TernaryRXF<string mnemonic, bits<16> opcode, SDPatternOperator operator,
   let AccessBytes = bytes;
 }
 
+class LoadAndOpRSY<string mnemonic, bits<16> opcode, SDPatternOperator operator,
+                  RegisterOperand cls, AddressingMode mode = bdaddr20only>
+  : InstRSY<opcode, (outs cls:$R1), (ins cls:$R3, mode:$BD2),
+            mnemonic#"\t$R1, $R3, $BD2",
+            [(set cls:$R1, (operator mode:$BD2, cls:$R3))]> {
+  let mayLoad = 1;
+  let mayStore = 1;
+}
+
 class CmpSwapRS<string mnemonic, bits<8> opcode, SDPatternOperator operator,
                 RegisterOperand cls, AddressingMode mode = bdaddr12only>
   : InstRS<opcode, (outs cls:$R1), (ins cls:$R1src, cls:$R3, mode:$BD2),
diff --git a/lib/Target/SystemZ/SystemZInstrInfo.td b/lib/Target/SystemZ/SystemZInstrInfo.td
index 587b170b5ac..91c3d3c3d0d 100644
--- a/lib/Target/SystemZ/SystemZInstrInfo.td
+++ b/lib/Target/SystemZ/SystemZInstrInfo.td
@@ -1203,6 +1203,19 @@ def PFDRL : PrefetchRILPC<"pfdrl", 0xC62, z_prefetch>;
 
 def Serialize : Alias<2, (outs), (ins), [(z_serialize)]>;
 
+let Predicates = [FeatureInterlockedAccess1], Defs = [CC] in {
+  def LAA   : LoadAndOpRSY<"laa",   0xEBF8, null_frag, GR32>;
+  def LAAG  : LoadAndOpRSY<"laag",  0xEBE8, null_frag, GR64>;
+  def LAAL  : LoadAndOpRSY<"laal",  0xEBFA, null_frag, GR32>;
+  def LAALG : LoadAndOpRSY<"laalg", 0xEBEA, null_frag, GR64>;
+  def LAN   : LoadAndOpRSY<"lan",   0xEBF4, null_frag, GR32>;
+  def LANG  : LoadAndOpRSY<"lang",  0xEBE4, null_frag, GR64>;
+  def LAO   : LoadAndOpRSY<"lao",   0xEBF6, null_frag, GR32>;
+  def LAOG  : LoadAndOpRSY<"laog",  0xEBE6, null_frag, GR64>;
+  def LAX   : LoadAndOpRSY<"lax",   0xEBF7, null_frag, GR32>;
+  def LAXG  : LoadAndOpRSY<"laxg",  0xEBE7, null_frag, GR64>;
+}
+
 def ATOMIC_SWAPW        : AtomicLoadWBinaryReg<z_atomic_swapw>;
 def ATOMIC_SWAP_32      : AtomicLoadBinaryReg32<atomic_swap_32>;
 def ATOMIC_SWAP_64      : AtomicLoadBinaryReg64<atomic_swap_64>;
diff --git a/lib/Target/SystemZ/SystemZProcessors.td b/lib/Target/SystemZ/SystemZProcessors.td
index 9aed4f9edff..b3df317bc84 100644
--- a/lib/Target/SystemZ/SystemZProcessors.td
+++ b/lib/Target/SystemZ/SystemZProcessors.td
@@ -41,11 +41,18 @@ def FeatureFastSerialization : SystemZFeature<
   "Assume that the fast-serialization facility is installed"
 >;
 
+def FeatureInterlockedAccess1 : SystemZFeature<
+  "interlocked-access1", "InterlockedAccess1",
+  "Assume that interlocked-access facility 1 is installed"
+>;
+
 def : Processor<"generic", NoItineraries, []>;
 def : Processor<"z10", NoItineraries, []>;
 def : Processor<"z196", NoItineraries,
                 [FeatureDistinctOps, FeatureLoadStoreOnCond, FeatureHighWord,
-                 FeatureFPExtension, FeatureFastSerialization]>;
+                 FeatureFPExtension, FeatureFastSerialization,
+                 FeatureInterlockedAccess1]>;
 def : Processor<"zEC12", NoItineraries,
                 [FeatureDistinctOps, FeatureLoadStoreOnCond, FeatureHighWord,
-                 FeatureFPExtension, FeatureFastSerialization]>;
+                 FeatureFPExtension, FeatureFastSerialization,
+                 FeatureInterlockedAccess1]>;
diff --git a/lib/Target/SystemZ/SystemZSubtarget.cpp b/lib/Target/SystemZ/SystemZSubtarget.cpp
index 333db2536e7..5a85a043be3 100644
--- a/lib/Target/SystemZ/SystemZSubtarget.cpp
+++ b/lib/Target/SystemZ/SystemZSubtarget.cpp
@@ -26,7 +26,8 @@ SystemZSubtarget::SystemZSubtarget(const std::string &TT,
                                    const std::string &FS)
   : SystemZGenSubtargetInfo(TT, CPU, FS), HasDistinctOps(false),
     HasLoadStoreOnCond(false), HasHighWord(false), HasFPExtension(false),
-    HasFastSerialization(false), TargetTriple(TT) {
+    HasFastSerialization(false), HasInterlockedAccess1(false),
+    TargetTriple(TT) {
   std::string CPUName = CPU;
   if (CPUName.empty())
     CPUName = "generic";
diff --git a/lib/Target/SystemZ/SystemZSubtarget.h b/lib/Target/SystemZ/SystemZSubtarget.h
index 6823c1432cd..f7c8f96c044 100644
--- a/lib/Target/SystemZ/SystemZSubtarget.h
+++ b/lib/Target/SystemZ/SystemZSubtarget.h
@@ -33,6 +33,7 @@ protected:
   bool HasHighWord;
   bool HasFPExtension;
   bool HasFastSerialization;
+  bool HasInterlockedAccess1;
 
 private:
   Triple TargetTriple;
@@ -62,6 +63,9 @@ public:
   // Return true if the target has the fast-serialization facility.
   bool hasFastSerialization() const { return HasFastSerialization; }
 
+  // Return true if the target has interlocked-access facility 1.
+  bool hasInterlockedAccess1() const { return HasInterlockedAccess1; }
+
   // Return true if GV can be accessed using LARL for reloc model RM
   // and code model CM.
   bool isPC32DBLSymbol(const GlobalValue *GV, Reloc::Model RM,
diff --git a/test/MC/Disassembler/SystemZ/insns.txt b/test/MC/Disassembler/SystemZ/insns.txt
index 78d348d7c19..ef9120dec1c 100644
--- a/test/MC/Disassembler/SystemZ/insns.txt
+++ b/test/MC/Disassembler/SystemZ/insns.txt
@@ -2545,6 +2545,336 @@
 # CHECK: la %r15, 0
 0x41 0xf0 0x00 0x00
 
+# CHECK: laa %r0, %r0, -524288
+0xeb 0x00 0x00 0x00 0x80 0xf8
+
+# CHECK: laa %r0, %r0, -1
+0xeb 0x00 0x0f 0xff 0xff 0xf8
+
+# CHECK: laa %r0, %r0, 0
+0xeb 0x00 0x00 0x00 0x00 0xf8
+
+# CHECK: laa %r0, %r0, 1
+0xeb 0x00 0x00 0x01 0x00 0xf8
+
+# CHECK: laa %r0, %r0, 524287
+0xeb 0x00 0x0f 0xff 0x7f 0xf8
+
+# CHECK: laa %r0, %r0, 0(%r1)
+0xeb 0x00 0x10 0x00 0x00 0xf8
+
+# CHECK: laa %r0, %r0, 0(%r15)
+0xeb 0x00 0xf0 0x00 0x00 0xf8
+
+# CHECK: laa %r0, %r0, 524287(%r1)
+0xeb 0x00 0x1f 0xff 0x7f 0xf8
+
+# CHECK: laa %r0, %r0, 524287(%r15)
+0xeb 0x00 0xff 0xff 0x7f 0xf8
+
+# CHECK: laa %r0, %r15, 0
+0xeb 0x0f 0x00 0x00 0x00 0xf8
+
+# CHECK: laa %r15, %r0, 0
+0xeb 0xf0 0x00 0x00 0x00 0xf8
+
+# CHECK: laag %r0, %r0, -524288
+0xeb 0x00 0x00 0x00 0x80 0xe8
+
+# CHECK: laag %r0, %r0, -1
+0xeb 0x00 0x0f 0xff 0xff 0xe8
+
+# CHECK: laag %r0, %r0, 0
+0xeb 0x00 0x00 0x00 0x00 0xe8
+
+# CHECK: laag %r0, %r0, 1
+0xeb 0x00 0x00 0x01 0x00 0xe8
+
+# CHECK: laag %r0, %r0, 524287
+0xeb 0x00 0x0f 0xff 0x7f 0xe8
+
+# CHECK: laag %r0, %r0, 0(%r1)
+0xeb 0x00 0x10 0x00 0x00 0xe8
+
+# CHECK: laag %r0, %r0, 0(%r15)
+0xeb 0x00 0xf0 0x00 0x00 0xe8
+
+# CHECK: laag %r0, %r0, 524287(%r1)
+0xeb 0x00 0x1f 0xff 0x7f 0xe8
+
+# CHECK: laag %r0, %r0, 524287(%r15)
+0xeb 0x00 0xff 0xff 0x7f 0xe8
+
+# CHECK: laag %r0, %r15, 0
+0xeb 0x0f 0x00 0x00 0x00 0xe8
+
+# CHECK: laag %r15, %r0, 0
+0xeb 0xf0 0x00 0x00 0x00 0xe8
+
+# CHECK: laal %r0, %r0, -524288
+0xeb 0x00 0x00 0x00 0x80 0xfa
+
+# CHECK: laal %r0, %r0, -1
+0xeb 0x00 0x0f 0xff 0xff 0xfa
+
+# CHECK: laal %r0, %r0, 0
+0xeb 0x00 0x00 0x00 0x00 0xfa
+
+# CHECK: laal %r0, %r0, 1
+0xeb 0x00 0x00 0x01 0x00 0xfa
+
+# CHECK: laal %r0, %r0, 524287
+0xeb 0x00 0x0f 0xff 0x7f 0xfa
+
+# CHECK: laal %r0, %r0, 0(%r1)
+0xeb 0x00 0x10 0x00 0x00 0xfa
+
+# CHECK: laal %r0, %r0, 0(%r15)
+0xeb 0x00 0xf0 0x00 0x00 0xfa
+
+# CHECK: laal %r0, %r0, 524287(%r1)
+0xeb 0x00 0x1f 0xff 0x7f 0xfa
+
+# CHECK: laal %r0, %r0, 524287(%r15)
+0xeb 0x00 0xff 0xff 0x7f 0xfa
+
+# CHECK: laal %r0, %r15, 0
+0xeb 0x0f 0x00 0x00 0x00 0xfa
+
+# CHECK: laal %r15, %r0, 0
+0xeb 0xf0 0x00 0x00 0x00 0xfa
+
+# CHECK: laalg %r0, %r0, -524288
+0xeb 0x00 0x00 0x00 0x80 0xea
+
+# CHECK: laalg %r0, %r0, -1
+0xeb 0x00 0x0f 0xff 0xff 0xea
+
+# CHECK: laalg %r0, %r0, 0
+0xeb 0x00 0x00 0x00 0x00 0xea
+
+# CHECK: laalg %r0, %r0, 1
+0xeb 0x00 0x00 0x01 0x00 0xea
+
+# CHECK: laalg %r0, %r0, 524287
+0xeb 0x00 0x0f 0xff 0x7f 0xea
+
+# CHECK: laalg %r0, %r0, 0(%r1)
+0xeb 0x00 0x10 0x00 0x00 0xea
+
+# CHECK: laalg %r0, %r0, 0(%r15)
+0xeb 0x00 0xf0 0x00 0x00 0xea
+
+# CHECK: laalg %r0, %r0, 524287(%r1)
+0xeb 0x00 0x1f 0xff 0x7f 0xea
+
+# CHECK: laalg %r0, %r0, 524287(%r15)
+0xeb 0x00 0xff 0xff 0x7f 0xea
+
+# CHECK: laalg %r0, %r15, 0
+0xeb 0x0f 0x00 0x00 0x00 0xea
+
+# CHECK: laalg %r15, %r0, 0
+0xeb 0xf0 0x00 0x00 0x00 0xea
+
+# CHECK: lan %r0, %r0, -524288
+0xeb 0x00 0x00 0x00 0x80 0xf4
+
+# CHECK: lan %r0, %r0, -1
+0xeb 0x00 0x0f 0xff 0xff 0xf4
+
+# CHECK: lan %r0, %r0, 0
+0xeb 0x00 0x00 0x00 0x00 0xf4
+
+# CHECK: lan %r0, %r0, 1
+0xeb 0x00 0x00 0x01 0x00 0xf4
+
+# CHECK: lan %r0, %r0, 524287
+0xeb 0x00 0x0f 0xff 0x7f 0xf4
+
+# CHECK: lan %r0, %r0, 0(%r1)
+0xeb 0x00 0x10 0x00 0x00 0xf4
+
+# CHECK: lan %r0, %r0, 0(%r15)
+0xeb 0x00 0xf0 0x00 0x00 0xf4
+
+# CHECK: lan %r0, %r0, 524287(%r1)
+0xeb 0x00 0x1f 0xff 0x7f 0xf4
+
+# CHECK: lan %r0, %r0, 524287(%r15)
+0xeb 0x00 0xff 0xff 0x7f 0xf4
+
+# CHECK: lan %r0, %r15, 0
+0xeb 0x0f 0x00 0x00 0x00 0xf4
+
+# CHECK: lan %r15, %r0, 0
+0xeb 0xf0 0x00 0x00 0x00 0xf4
+
+# CHECK: csy %r0, %r0, -524288
+0xeb 0x00 0x00 0x00 0x80 0x14
+
+# CHECK: lang %r0, %r0, -1
+0xeb 0x00 0x0f 0xff 0xff 0xe4
+
+# CHECK: lang %r0, %r0, 0
+0xeb 0x00 0x00 0x00 0x00 0xe4
+
+# CHECK: lang %r0, %r0, 1
+0xeb 0x00 0x00 0x01 0x00 0xe4
+
+# CHECK: lang %r0, %r0, 524287
+0xeb 0x00 0x0f 0xff 0x7f 0xe4
+
+# CHECK: lang %r0, %r0, 0(%r1)
+0xeb 0x00 0x10 0x00 0x00 0xe4
+
+# CHECK: lang %r0, %r0, 0(%r15)
+0xeb 0x00 0xf0 0x00 0x00 0xe4
+
+# CHECK: lang %r0, %r0, 524287(%r1)
+0xeb 0x00 0x1f 0xff 0x7f 0xe4
+
+# CHECK: lang %r0, %r0, 524287(%r15)
+0xeb 0x00 0xff 0xff 0x7f 0xe4
+
+# CHECK: lang %r0, %r15, 0
+0xeb 0x0f 0x00 0x00 0x00 0xe4
+
+# CHECK: lang %r15, %r0, 0
+0xeb 0xf0 0x00 0x00 0x00 0xe4
+
+# CHECK: lao %r0, %r0, -524288
+0xeb 0x00 0x00 0x00 0x80 0xf6
+
+# CHECK: lao %r0, %r0, -1
+0xeb 0x00 0x0f 0xff 0xff 0xf6
+
+# CHECK: lao %r0, %r0, 0
+0xeb 0x00 0x00 0x00 0x00 0xf6
+
+# CHECK: lao %r0, %r0, 1
+0xeb 0x00 0x00 0x01 0x00 0xf6
+
+# CHECK: lao %r0, %r0, 524287
+0xeb 0x00 0x0f 0xff 0x7f 0xf6
+
+# CHECK: lao %r0, %r0, 0(%r1)
+0xeb 0x00 0x10 0x00 0x00 0xf6
+
+# CHECK: lao %r0, %r0, 0(%r15)
+0xeb 0x00 0xf0 0x00 0x00 0xf6
+
+# CHECK: lao %r0, %r0, 524287(%r1)
+0xeb 0x00 0x1f 0xff 0x7f 0xf6
+
+# CHECK: lao %r0, %r0, 524287(%r15)
+0xeb 0x00 0xff 0xff 0x7f 0xf6
+
+# CHECK: lao %r0, %r15, 0
+0xeb 0x0f 0x00 0x00 0x00 0xf6
+
+# CHECK: lao %r15, %r0, 0
+0xeb 0xf0 0x00 0x00 0x00 0xf6
+
+# CHECK: laog %r0, %r0, -524288
+0xeb 0x00 0x00 0x00 0x80 0xe6
+
+# CHECK: laog %r0, %r0, -1
+0xeb 0x00 0x0f 0xff 0xff 0xe6
+
+# CHECK: laog %r0, %r0, 0
+0xeb 0x00 0x00 0x00 0x00 0xe6
+
+# CHECK: laog %r0, %r0, 1
+0xeb 0x00 0x00 0x01 0x00 0xe6
+
+# CHECK: laog %r0, %r0, 524287
+0xeb 0x00 0x0f 0xff 0x7f 0xe6
+
+# CHECK: laog %r0, %r0, 0(%r1)
+0xeb 0x00 0x10 0x00 0x00 0xe6
+
+# CHECK: laog %r0, %r0, 0(%r15)
+0xeb 0x00 0xf0 0x00 0x00 0xe6
+
+# CHECK: laog %r0, %r0, 524287(%r1)
+0xeb 0x00 0x1f 0xff 0x7f 0xe6
+
+# CHECK: laog %r0, %r0, 524287(%r15)
+0xeb 0x00 0xff 0xff 0x7f 0xe6
+
+# CHECK: laog %r0, %r15, 0
+0xeb 0x0f 0x00 0x00 0x00 0xe6
+
+# CHECK: laog %r15, %r0, 0
+0xeb 0xf0 0x00 0x00 0x00 0xe6
+
+# CHECK: lax %r0, %r0, -524288
+0xeb 0x00 0x00 0x00 0x80 0xf7
+
+# CHECK: lax %r0, %r0, -1
+0xeb 0x00 0x0f 0xff 0xff 0xf7
+
+# CHECK: lax %r0, %r0, 0
+0xeb 0x00 0x00 0x00 0x00 0xf7
+
+# CHECK: lax %r0, %r0, 1
+0xeb 0x00 0x00 0x01 0x00 0xf7
+
+# CHECK: lax %r0, %r0, 524287
+0xeb 0x00 0x0f 0xff 0x7f 0xf7
+
+# CHECK: lax %r0, %r0, 0(%r1)
+0xeb 0x00 0x10 0x00 0x00 0xf7
+
+# CHECK: lax %r0, %r0, 0(%r15)
+0xeb 0x00 0xf0 0x00 0x00 0xf7
+
+# CHECK: lax %r0, %r0, 524287(%r1)
+0xeb 0x00 0x1f 0xff 0x7f 0xf7
+
+# CHECK: lax %r0, %r0, 524287(%r15)
+0xeb 0x00 0xff 0xff 0x7f 0xf7
+
+# CHECK: lax %r0, %r15, 0
+0xeb 0x0f 0x00 0x00 0x00 0xf7
+
+# CHECK: lax %r15, %r0, 0
+0xeb 0xf0 0x00 0x00 0x00 0xf7
+
+# CHECK: laxg %r0, %r0, -524288
+0xeb 0x00 0x00 0x00 0x80 0xe7
+
+# CHECK: laxg %r0, %r0, -1
+0xeb 0x00 0x0f 0xff 0xff 0xe7
+
+# CHECK: laxg %r0, %r0, 0
+0xeb 0x00 0x00 0x00 0x00 0xe7
+
+# CHECK: laxg %r0, %r0, 1
+0xeb 0x00 0x00 0x01 0x00 0xe7
+
+# CHECK: laxg %r0, %r0, 524287
+0xeb 0x00 0x0f 0xff 0x7f 0xe7
+
+# CHECK: laxg %r0, %r0, 0(%r1)
+0xeb 0x00 0x10 0x00 0x00 0xe7
+
+# CHECK: laxg %r0, %r0, 0(%r15)
+0xeb 0x00 0xf0 0x00 0x00 0xe7
+
+# CHECK: laxg %r0, %r0, 524287(%r1)
+0xeb 0x00 0x1f 0xff 0x7f 0xe7
+
+# CHECK: laxg %r0, %r0, 524287(%r15)
+0xeb 0x00 0xff 0xff 0x7f 0xe7
+
+# CHECK: laxg %r0, %r15, 0
+0xeb 0x0f 0x00 0x00 0x00 0xe7
+
+# CHECK: laxg %r15, %r0, 0
+0xeb 0xf0 0x00 0x00 0x00 0xe7
+
 # CHECK: lay %r0, -524288
 0xe3 0x00 0x00 0x00 0x80 0x71
 
diff --git a/test/MC/SystemZ/insn-bad-z196.s b/test/MC/SystemZ/insn-bad-z196.s
index 089d9b5b3e1..11b66a0f4b0 100644
--- a/test/MC/SystemZ/insn-bad-z196.s
+++ b/test/MC/SystemZ/insn-bad-z196.s
@@ -112,6 +112,116 @@
 	fixbra	%f0, 0, %f2, 0
 	fixbra	%f2, 0, %f0, 0
 
+#CHECK: error: invalid operand
+#CHECK: laa	%r0, %r0, -524289
+#CHECK: error: invalid operand
+#CHECK: laa	%r0, %r0, 524288
+#CHECK: error: invalid use of indexed addressing
+#CHECK: laa	%r0, %r0, 0(%r1,%r2)
+
+	laa	%r0, %r0, -524289
+	laa	%r0, %r0, 524288
+	laa	%r0, %r0, 0(%r1,%r2)
+
+#CHECK: error: invalid operand
+#CHECK: laag	%r0, %r0, -524289
+#CHECK: error: invalid operand
+#CHECK: laag	%r0, %r0, 524288
+#CHECK: error: invalid use of indexed addressing
+#CHECK: laag	%r0, %r0, 0(%r1,%r2)
+
+	laag	%r0, %r0, -524289
+	laag	%r0, %r0, 524288
+	laag	%r0, %r0, 0(%r1,%r2)
+
+#CHECK: error: invalid operand
+#CHECK: laal	%r0, %r0, -524289
+#CHECK: error: invalid operand
+#CHECK: laal	%r0, %r0, 524288
+#CHECK: error: invalid use of indexed addressing
+#CHECK: laal	%r0, %r0, 0(%r1,%r2)
+
+	laal	%r0, %r0, -524289
+	laal	%r0, %r0, 524288
+	laal	%r0, %r0, 0(%r1,%r2)
+
+#CHECK: error: invalid operand
+#CHECK: laalg	%r0, %r0, -524289
+#CHECK: error: invalid operand
+#CHECK: laalg	%r0, %r0, 524288
+#CHECK: error: invalid use of indexed addressing
+#CHECK: laalg	%r0, %r0, 0(%r1,%r2)
+
+	laalg	%r0, %r0, -524289
+	laalg	%r0, %r0, 524288
+	laalg	%r0, %r0, 0(%r1,%r2)
+
+#CHECK: error: invalid operand
+#CHECK: lan	%r0, %r0, -524289
+#CHECK: error: invalid operand
+#CHECK: lan	%r0, %r0, 524288
+#CHECK: error: invalid use of indexed addressing
+#CHECK: lan	%r0, %r0, 0(%r1,%r2)
+
+	lan	%r0, %r0, -524289
+	lan	%r0, %r0, 524288
+	lan	%r0, %r0, 0(%r1,%r2)
+
+#CHECK: error: invalid operand
+#CHECK: lang	%r0, %r0, -524289
+#CHECK: error: invalid operand
+#CHECK: lang	%r0, %r0, 524288
+#CHECK: error: invalid use of indexed addressing
+#CHECK: lang	%r0, %r0, 0(%r1,%r2)
+
+	lang	%r0, %r0, -524289
+	lang	%r0, %r0, 524288
+	lang	%r0, %r0, 0(%r1,%r2)
+
+#CHECK: error: invalid operand
+#CHECK: lao	%r0, %r0, -524289
+#CHECK: error: invalid operand
+#CHECK: lao	%r0, %r0, 524288
+#CHECK: error: invalid use of indexed addressing
+#CHECK: lao	%r0, %r0, 0(%r1,%r2)
+
+	lao	%r0, %r0, -524289
+	lao	%r0, %r0, 524288
+	lao	%r0, %r0, 0(%r1,%r2)
+
+#CHECK: error: invalid operand
+#CHECK: laog	%r0, %r0, -524289
+#CHECK: error: invalid operand
+#CHECK: laog	%r0, %r0, 524288
+#CHECK: error: invalid use of indexed addressing
+#CHECK: laog	%r0, %r0, 0(%r1,%r2)
+
+	laog	%r0, %r0, -524289
+	laog	%r0, %r0, 524288
+	laog	%r0, %r0, 0(%r1,%r2)
+
+#CHECK: error: invalid operand
+#CHECK: lax	%r0, %r0, -524289
+#CHECK: error: invalid operand
+#CHECK: lax	%r0, %r0, 524288
+#CHECK: error: invalid use of indexed addressing
+#CHECK: lax	%r0, %r0, 0(%r1,%r2)
+
+	lax	%r0, %r0, -524289
+	lax	%r0, %r0, 524288
+	lax	%r0, %r0, 0(%r1,%r2)
+
+#CHECK: error: invalid operand
+#CHECK: laxg	%r0, %r0, -524289
+#CHECK: error: invalid operand
+#CHECK: laxg	%r0, %r0, 524288
+#CHECK: error: invalid use of indexed addressing
+#CHECK: laxg	%r0, %r0, 0(%r1,%r2)
+
+	laxg	%r0, %r0, -524289
+	laxg	%r0, %r0, 524288
+	laxg	%r0, %r0, 0(%r1,%r2)
+
 #CHECK: error: invalid operand
 #CHECK: lbh	%r0, -524289
 #CHECK: error: invalid operand
diff --git a/test/MC/SystemZ/insn-bad.s b/test/MC/SystemZ/insn-bad.s
index 2a3fb98c2b1..caff5b2ab3d 100644
--- a/test/MC/SystemZ/insn-bad.s
+++ b/test/MC/SystemZ/insn-bad.s
@@ -1393,6 +1393,46 @@
 	la	%r0, -1
 	la	%r0, 4096
 
+#CHECK: error: {{(instruction requires: interlocked-access1)?}}
+#CHECK: laa	%r1, %r2, 100(%r3)
+	laa	%r1, %r2, 100(%r3)
+
+#CHECK: error: {{(instruction requires: interlocked-access1)?}}
+#CHECK: laag	%r1, %r2, 100(%r3)
+	laag	%r1, %r2, 100(%r3)
+
+#CHECK: error: {{(instruction requires: interlocked-access1)?}}
+#CHECK: laal	%r1, %r2, 100(%r3)
+	laal	%r1, %r2, 100(%r3)
+
+#CHECK: error: {{(instruction requires: interlocked-access1)?}}
+#CHECK: laalg	%r1, %r2, 100(%r3)
+	laalg	%r1, %r2, 100(%r3)
+
+#CHECK: error: {{(instruction requires: interlocked-access1)?}}
+#CHECK: lan	%r1, %r2, 100(%r3)
+	lan	%r1, %r2, 100(%r3)
+
+#CHECK: error: {{(instruction requires: interlocked-access1)?}}
+#CHECK: lang	%r1, %r2, 100(%r3)
+	lang	%r1, %r2, 100(%r3)
+
+#CHECK: error: {{(instruction requires: interlocked-access1)?}}
+#CHECK: lao	%r1, %r2, 100(%r3)
+	lao	%r1, %r2, 100(%r3)
+
+#CHECK: error: {{(instruction requires: interlocked-access1)?}}
+#CHECK: laog	%r1, %r2, 100(%r3)
+	laog	%r1, %r2, 100(%r3)
+
+#CHECK: error: {{(instruction requires: interlocked-access1)?}}
+#CHECK: lax	%r1, %r2, 100(%r3)
+	lax	%r1, %r2, 100(%r3)
+
+#CHECK: error: {{(instruction requires: interlocked-access1)?}}
+#CHECK: laxg	%r1, %r2, 100(%r3)
+	laxg	%r1, %r2, 100(%r3)
+
 #CHECK: error: offset out of range
 #CHECK: larl	%r0, -0x1000000002
 #CHECK: error: offset out of range
diff --git a/test/MC/SystemZ/insn-good-z196.s b/test/MC/SystemZ/insn-good-z196.s
index 258e06f99dd..ce63c8d947b 100644
--- a/test/MC/SystemZ/insn-good-z196.s
+++ b/test/MC/SystemZ/insn-good-z196.s
@@ -245,6 +245,246 @@
 	fixbra	%f4, 5, %f8, 9
 	fixbra	%f13, 0, %f0, 0
 
+#CHECK: laa	%r0, %r0, -524288       # encoding: [0xeb,0x00,0x00,0x00,0x80,0xf8]
+#CHECK: laa	%r0, %r0, -1            # encoding: [0xeb,0x00,0x0f,0xff,0xff,0xf8]
+#CHECK: laa	%r0, %r0, 0             # encoding: [0xeb,0x00,0x00,0x00,0x00,0xf8]
+#CHECK: laa	%r0, %r0, 1             # encoding: [0xeb,0x00,0x00,0x01,0x00,0xf8]
+#CHECK: laa	%r0, %r0, 524287        # encoding: [0xeb,0x00,0x0f,0xff,0x7f,0xf8]
+#CHECK: laa	%r0, %r0, 0(%r1)        # encoding: [0xeb,0x00,0x10,0x00,0x00,0xf8]
+#CHECK: laa	%r0, %r0, 0(%r15)       # encoding: [0xeb,0x00,0xf0,0x00,0x00,0xf8]
+#CHECK: laa	%r0, %r0, 524287(%r1)   # encoding: [0xeb,0x00,0x1f,0xff,0x7f,0xf8]
+#CHECK: laa	%r0, %r0, 524287(%r15)  # encoding: [0xeb,0x00,0xff,0xff,0x7f,0xf8]
+#CHECK: laa	%r0, %r15, 0            # encoding: [0xeb,0x0f,0x00,0x00,0x00,0xf8]
+#CHECK: laa	%r15, %r0, 0            # encoding: [0xeb,0xf0,0x00,0x00,0x00,0xf8]
+
+	laa	%r0, %r0, -524288
+	laa	%r0, %r0, -1
+	laa	%r0, %r0, 0
+	laa	%r0, %r0, 1
+	laa	%r0, %r0, 524287
+	laa	%r0, %r0, 0(%r1)
+	laa	%r0, %r0, 0(%r15)
+	laa	%r0, %r0, 524287(%r1)
+	laa	%r0, %r0, 524287(%r15)
+	laa	%r0, %r15, 0
+	laa	%r15, %r0, 0
+
+#CHECK: laag	%r0, %r0, -524288       # encoding: [0xeb,0x00,0x00,0x00,0x80,0xe8]
+#CHECK: laag	%r0, %r0, -1            # encoding: [0xeb,0x00,0x0f,0xff,0xff,0xe8]
+#CHECK: laag	%r0, %r0, 0             # encoding: [0xeb,0x00,0x00,0x00,0x00,0xe8]
+#CHECK: laag	%r0, %r0, 1             # encoding: [0xeb,0x00,0x00,0x01,0x00,0xe8]
+#CHECK: laag	%r0, %r0, 524287        # encoding: [0xeb,0x00,0x0f,0xff,0x7f,0xe8]
+#CHECK: laag	%r0, %r0, 0(%r1)        # encoding: [0xeb,0x00,0x10,0x00,0x00,0xe8]
+#CHECK: laag	%r0, %r0, 0(%r15)       # encoding: [0xeb,0x00,0xf0,0x00,0x00,0xe8]
+#CHECK: laag	%r0, %r0, 524287(%r1)   # encoding: [0xeb,0x00,0x1f,0xff,0x7f,0xe8]
+#CHECK: laag	%r0, %r0, 524287(%r15)  # encoding: [0xeb,0x00,0xff,0xff,0x7f,0xe8]
+#CHECK: laag	%r0, %r15, 0            # encoding: [0xeb,0x0f,0x00,0x00,0x00,0xe8]
+#CHECK: laag	%r15, %r0, 0            # encoding: [0xeb,0xf0,0x00,0x00,0x00,0xe8]
+
+	laag	%r0, %r0, -524288
+	laag	%r0, %r0, -1
+	laag	%r0, %r0, 0
+	laag	%r0, %r0, 1
+	laag	%r0, %r0, 524287
+	laag	%r0, %r0, 0(%r1)
+	laag	%r0, %r0, 0(%r15)
+	laag	%r0, %r0, 524287(%r1)
+	laag	%r0, %r0, 524287(%r15)
+	laag	%r0, %r15, 0
+	laag	%r15, %r0, 0
+
+#CHECK: laal	%r0, %r0, -524288       # encoding: [0xeb,0x00,0x00,0x00,0x80,0xfa]
+#CHECK: laal	%r0, %r0, -1            # encoding: [0xeb,0x00,0x0f,0xff,0xff,0xfa]
+#CHECK: laal	%r0, %r0, 0             # encoding: [0xeb,0x00,0x00,0x00,0x00,0xfa]
+#CHECK: laal	%r0, %r0, 1             # encoding: [0xeb,0x00,0x00,0x01,0x00,0xfa]
+#CHECK: laal	%r0, %r0, 524287        # encoding: [0xeb,0x00,0x0f,0xff,0x7f,0xfa]
+#CHECK: laal	%r0, %r0, 0(%r1)        # encoding: [0xeb,0x00,0x10,0x00,0x00,0xfa]
+#CHECK: laal	%r0, %r0, 0(%r15)       # encoding: [0xeb,0x00,0xf0,0x00,0x00,0xfa]
+#CHECK: laal	%r0, %r0, 524287(%r1)   # encoding: [0xeb,0x00,0x1f,0xff,0x7f,0xfa]
+#CHECK: laal	%r0, %r0, 524287(%r15)  # encoding: [0xeb,0x00,0xff,0xff,0x7f,0xfa]
+#CHECK: laal	%r0, %r15, 0            # encoding: [0xeb,0x0f,0x00,0x00,0x00,0xfa]
+#CHECK: laal	%r15, %r0, 0            # encoding: [0xeb,0xf0,0x00,0x00,0x00,0xfa]
+
+	laal	%r0, %r0, -524288
+	laal	%r0, %r0, -1
+	laal	%r0, %r0, 0
+	laal	%r0, %r0, 1
+	laal	%r0, %r0, 524287
+	laal	%r0, %r0, 0(%r1)
+	laal	%r0, %r0, 0(%r15)
+	laal	%r0, %r0, 524287(%r1)
+	laal	%r0, %r0, 524287(%r15)
+	laal	%r0, %r15, 0
+	laal	%r15, %r0, 0
+
+#CHECK: laalg	%r0, %r0, -524288       # encoding: [0xeb,0x00,0x00,0x00,0x80,0xea]
+#CHECK: laalg	%r0, %r0, -1            # encoding: [0xeb,0x00,0x0f,0xff,0xff,0xea]
+#CHECK: laalg	%r0, %r0, 0             # encoding: [0xeb,0x00,0x00,0x00,0x00,0xea]
+#CHECK: laalg	%r0, %r0, 1             # encoding: [0xeb,0x00,0x00,0x01,0x00,0xea]
+#CHECK: laalg	%r0, %r0, 524287        # encoding: [0xeb,0x00,0x0f,0xff,0x7f,0xea]
+#CHECK: laalg	%r0, %r0, 0(%r1)        # encoding: [0xeb,0x00,0x10,0x00,0x00,0xea]
+#CHECK: laalg	%r0, %r0, 0(%r15)       # encoding: [0xeb,0x00,0xf0,0x00,0x00,0xea]
+#CHECK: laalg	%r0, %r0, 524287(%r1)   # encoding: [0xeb,0x00,0x1f,0xff,0x7f,0xea]
+#CHECK: laalg	%r0, %r0, 524287(%r15)  # encoding: [0xeb,0x00,0xff,0xff,0x7f,0xea]
+#CHECK: laalg	%r0, %r15, 0            # encoding: [0xeb,0x0f,0x00,0x00,0x00,0xea]
+#CHECK: laalg	%r15, %r0, 0            # encoding: [0xeb,0xf0,0x00,0x00,0x00,0xea]
+
+	laalg	%r0, %r0, -524288
+	laalg	%r0, %r0, -1
+	laalg	%r0, %r0, 0
+	laalg	%r0, %r0, 1
+	laalg	%r0, %r0, 524287
+	laalg	%r0, %r0, 0(%r1)
+	laalg	%r0, %r0, 0(%r15)
+	laalg	%r0, %r0, 524287(%r1)
+	laalg	%r0, %r0, 524287(%r15)
+	laalg	%r0, %r15, 0
+	laalg	%r15, %r0, 0
+
+#CHECK: lan	%r0, %r0, -524288       # encoding: [0xeb,0x00,0x00,0x00,0x80,0xf4]
+#CHECK: lan	%r0, %r0, -1            # encoding: [0xeb,0x00,0x0f,0xff,0xff,0xf4]
+#CHECK: lan	%r0, %r0, 0             # encoding: [0xeb,0x00,0x00,0x00,0x00,0xf4]
+#CHECK: lan	%r0, %r0, 1             # encoding: [0xeb,0x00,0x00,0x01,0x00,0xf4]
+#CHECK: lan	%r0, %r0, 524287        # encoding: [0xeb,0x00,0x0f,0xff,0x7f,0xf4]
+#CHECK: lan	%r0, %r0, 0(%r1)        # encoding: [0xeb,0x00,0x10,0x00,0x00,0xf4]
+#CHECK: lan	%r0, %r0, 0(%r15)       # encoding: [0xeb,0x00,0xf0,0x00,0x00,0xf4]
+#CHECK: lan	%r0, %r0, 524287(%r1)   # encoding: [0xeb,0x00,0x1f,0xff,0x7f,0xf4]
+#CHECK: lan	%r0, %r0, 524287(%r15)  # encoding: [0xeb,0x00,0xff,0xff,0x7f,0xf4]
+#CHECK: lan	%r0, %r15, 0            # encoding: [0xeb,0x0f,0x00,0x00,0x00,0xf4]
+#CHECK: lan	%r15, %r0, 0            # encoding: [0xeb,0xf0,0x00,0x00,0x00,0xf4]
+
+	lan	%r0, %r0, -524288
+	lan	%r0, %r0, -1
+	lan	%r0, %r0, 0
+	lan	%r0, %r0, 1
+	lan	%r0, %r0, 524287
+	lan	%r0, %r0, 0(%r1)
+	lan	%r0, %r0, 0(%r15)
+	lan	%r0, %r0, 524287(%r1)
+	lan	%r0, %r0, 524287(%r15)
+	lan	%r0, %r15, 0
+	lan	%r15, %r0, 0
+
+#CHECK: lang	%r0, %r0, -524288       # encoding: [0xeb,0x00,0x00,0x00,0x80,0xe4]
+#CHECK: lang	%r0, %r0, -1            # encoding: [0xeb,0x00,0x0f,0xff,0xff,0xe4]
+#CHECK: lang	%r0, %r0, 0             # encoding: [0xeb,0x00,0x00,0x00,0x00,0xe4]
+#CHECK: lang	%r0, %r0, 1             # encoding: [0xeb,0x00,0x00,0x01,0x00,0xe4]
+#CHECK: lang	%r0, %r0, 524287        # encoding: [0xeb,0x00,0x0f,0xff,0x7f,0xe4]
+#CHECK: lang	%r0, %r0, 0(%r1)        # encoding: [0xeb,0x00,0x10,0x00,0x00,0xe4]
+#CHECK: lang	%r0, %r0, 0(%r15)       # encoding: [0xeb,0x00,0xf0,0x00,0x00,0xe4]
+#CHECK: lang	%r0, %r0, 524287(%r1)   # encoding: [0xeb,0x00,0x1f,0xff,0x7f,0xe4]
+#CHECK: lang	%r0, %r0, 524287(%r15)  # encoding: [0xeb,0x00,0xff,0xff,0x7f,0xe4]
+#CHECK: lang	%r0, %r15, 0            # encoding: [0xeb,0x0f,0x00,0x00,0x00,0xe4]
+#CHECK: lang	%r15, %r0, 0            # encoding: [0xeb,0xf0,0x00,0x00,0x00,0xe4]
+
+	lang	%r0, %r0, -524288
+	lang	%r0, %r0, -1
+	lang	%r0, %r0, 0
+	lang	%r0, %r0, 1
+	lang	%r0, %r0, 524287
+	lang	%r0, %r0, 0(%r1)
+	lang	%r0, %r0, 0(%r15)
+	lang	%r0, %r0, 524287(%r1)
+	lang	%r0, %r0, 524287(%r15)
+	lang	%r0, %r15, 0
+	lang	%r15, %r0, 0
+
+#CHECK: lao	%r0, %r0, -524288       # encoding: [0xeb,0x00,0x00,0x00,0x80,0xf6]
+#CHECK: lao	%r0, %r0, -1            # encoding: [0xeb,0x00,0x0f,0xff,0xff,0xf6]
+#CHECK: lao	%r0, %r0, 0             # encoding: [0xeb,0x00,0x00,0x00,0x00,0xf6]
+#CHECK: lao	%r0, %r0, 1             # encoding: [0xeb,0x00,0x00,0x01,0x00,0xf6]
+#CHECK: lao	%r0, %r0, 524287        # encoding: [0xeb,0x00,0x0f,0xff,0x7f,0xf6]
+#CHECK: lao	%r0, %r0, 0(%r1)        # encoding: [0xeb,0x00,0x10,0x00,0x00,0xf6]
+#CHECK: lao	%r0, %r0, 0(%r15)       # encoding: [0xeb,0x00,0xf0,0x00,0x00,0xf6]
+#CHECK: lao	%r0, %r0, 524287(%r1)   # encoding: [0xeb,0x00,0x1f,0xff,0x7f,0xf6]
+#CHECK: lao	%r0, %r0, 524287(%r15)  # encoding: [0xeb,0x00,0xff,0xff,0x7f,0xf6]
+#CHECK: lao	%r0, %r15, 0            # encoding: [0xeb,0x0f,0x00,0x00,0x00,0xf6]
+#CHECK: lao	%r15, %r0, 0            # encoding: [0xeb,0xf0,0x00,0x00,0x00,0xf6]
+
+	lao	%r0, %r0, -524288
+	lao	%r0, %r0, -1
+	lao	%r0, %r0, 0
+	lao	%r0, %r0, 1
+	lao	%r0, %r0, 524287
+	lao	%r0, %r0, 0(%r1)
+	lao	%r0, %r0, 0(%r15)
+	lao	%r0, %r0, 524287(%r1)
+	lao	%r0, %r0, 524287(%r15)
+	lao	%r0, %r15, 0
+	lao	%r15, %r0, 0
+
+#CHECK: laog	%r0, %r0, -524288       # encoding: [0xeb,0x00,0x00,0x00,0x80,0xe6]
+#CHECK: laog	%r0, %r0, -1            # encoding: [0xeb,0x00,0x0f,0xff,0xff,0xe6]
+#CHECK: laog	%r0, %r0, 0             # encoding: [0xeb,0x00,0x00,0x00,0x00,0xe6]
+#CHECK: laog	%r0, %r0, 1             # encoding: [0xeb,0x00,0x00,0x01,0x00,0xe6]
+#CHECK: laog	%r0, %r0, 524287        # encoding: [0xeb,0x00,0x0f,0xff,0x7f,0xe6]
+#CHECK: laog	%r0, %r0, 0(%r1)        # encoding: [0xeb,0x00,0x10,0x00,0x00,0xe6]
+#CHECK: laog	%r0, %r0, 0(%r15)       # encoding: [0xeb,0x00,0xf0,0x00,0x00,0xe6]
+#CHECK: laog	%r0, %r0, 524287(%r1)   # encoding: [0xeb,0x00,0x1f,0xff,0x7f,0xe6]
+#CHECK: laog	%r0, %r0, 524287(%r15)  # encoding: [0xeb,0x00,0xff,0xff,0x7f,0xe6]
+#CHECK: laog	%r0, %r15, 0            # encoding: [0xeb,0x0f,0x00,0x00,0x00,0xe6]
+#CHECK: laog	%r15, %r0, 0            # encoding: [0xeb,0xf0,0x00,0x00,0x00,0xe6]
+
+	laog	%r0, %r0, -524288
+	laog	%r0, %r0, -1
+	laog	%r0, %r0, 0
+	laog	%r0, %r0, 1
+	laog	%r0, %r0, 524287
+	laog	%r0, %r0, 0(%r1)
+	laog	%r0, %r0, 0(%r15)
+	laog	%r0, %r0, 524287(%r1)
+	laog	%r0, %r0, 524287(%r15)
+	laog	%r0, %r15, 0
+	laog	%r15, %r0, 0
+
+#CHECK: lax	%r0, %r0, -524288       # encoding: [0xeb,0x00,0x00,0x00,0x80,0xf7]
+#CHECK: lax	%r0, %r0, -1            # encoding: [0xeb,0x00,0x0f,0xff,0xff,0xf7]
+#CHECK: lax	%r0, %r0, 0             # encoding: [0xeb,0x00,0x00,0x00,0x00,0xf7]
+#CHECK: lax	%r0, %r0, 1             # encoding: [0xeb,0x00,0x00,0x01,0x00,0xf7]
+#CHECK: lax	%r0, %r0, 524287        # encoding: [0xeb,0x00,0x0f,0xff,0x7f,0xf7]
+#CHECK: lax	%r0, %r0, 0(%r1)        # encoding: [0xeb,0x00,0x10,0x00,0x00,0xf7]
+#CHECK: lax	%r0, %r0, 0(%r15)       # encoding: [0xeb,0x00,0xf0,0x00,0x00,0xf7]
+#CHECK: lax	%r0, %r0, 524287(%r1)   # encoding: [0xeb,0x00,0x1f,0xff,0x7f,0xf7]
+#CHECK: lax	%r0, %r0, 524287(%r15)  # encoding: [0xeb,0x00,0xff,0xff,0x7f,0xf7]
+#CHECK: lax	%r0, %r15, 0            # encoding: [0xeb,0x0f,0x00,0x00,0x00,0xf7]
+#CHECK: lax	%r15, %r0, 0            # encoding: [0xeb,0xf0,0x00,0x00,0x00,0xf7]
+
+	lax	%r0, %r0, -524288
+	lax	%r0, %r0, -1
+	lax	%r0, %r0, 0
+	lax	%r0, %r0, 1
+	lax	%r0, %r0, 524287
+	lax	%r0, %r0, 0(%r1)
+	lax	%r0, %r0, 0(%r15)
+	lax	%r0, %r0, 524287(%r1)
+	lax	%r0, %r0, 524287(%r15)
+	lax	%r0, %r15, 0
+	lax	%r15, %r0, 0
+
+#CHECK: laxg	%r0, %r0, -524288       # encoding: [0xeb,0x00,0x00,0x00,0x80,0xe7]
+#CHECK: laxg	%r0, %r0, -1            # encoding: [0xeb,0x00,0x0f,0xff,0xff,0xe7]
+#CHECK: laxg	%r0, %r0, 0             # encoding: [0xeb,0x00,0x00,0x00,0x00,0xe7]
+#CHECK: laxg	%r0, %r0, 1             # encoding: [0xeb,0x00,0x00,0x01,0x00,0xe7]
+#CHECK: laxg	%r0, %r0, 524287        # encoding: [0xeb,0x00,0x0f,0xff,0x7f,0xe7]
+#CHECK: laxg	%r0, %r0, 0(%r1)        # encoding: [0xeb,0x00,0x10,0x00,0x00,0xe7]
+#CHECK: laxg	%r0, %r0, 0(%r15)       # encoding: [0xeb,0x00,0xf0,0x00,0x00,0xe7]
+#CHECK: laxg	%r0, %r0, 524287(%r1)   # encoding: [0xeb,0x00,0x1f,0xff,0x7f,0xe7]
+#CHECK: laxg	%r0, %r0, 524287(%r15)  # encoding: [0xeb,0x00,0xff,0xff,0x7f,0xe7]
+#CHECK: laxg	%r0, %r15, 0            # encoding: [0xeb,0x0f,0x00,0x00,0x00,0xe7]
+#CHECK: laxg	%r15, %r0, 0            # encoding: [0xeb,0xf0,0x00,0x00,0x00,0xe7]
+
+	laxg	%r0, %r0, -524288
+	laxg	%r0, %r0, -1
+	laxg	%r0, %r0, 0
+	laxg	%r0, %r0, 1
+	laxg	%r0, %r0, 524287
+	laxg	%r0, %r0, 0(%r1)
+	laxg	%r0, %r0, 0(%r15)
+	laxg	%r0, %r0, 524287(%r1)
+	laxg	%r0, %r0, 524287(%r15)
+	laxg	%r0, %r15, 0
+	laxg	%r15, %r0, 0
+
 #CHECK: lbh	%r0, -524288            # encoding: [0xe3,0x00,0x00,0x00,0x80,0xc0]
 #CHECK: lbh	%r0, -1                 # encoding: [0xe3,0x00,0x0f,0xff,0xff,0xc0]
 #CHECK: lbh	%r0, 0                  # encoding: [0xe3,0x00,0x00,0x00,0x00,0xc0]
-- 
2.34.1