From f96703e62f2302cfe2465fb0fddaf62259eee62c Mon Sep 17 00:00:00 2001 From: Evan Cheng Date: Wed, 11 Jan 2012 00:38:11 +0000 Subject: [PATCH] Avoid CSE of instructions which define physical registers across MBBs unless the physical registers are not allocatable. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147902 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/MachineCSE.cpp | 16 ++++++++++++---- 1 file changed, 12 insertions(+), 4 deletions(-) diff --git a/lib/CodeGen/MachineCSE.cpp b/lib/CodeGen/MachineCSE.cpp index 5dd51a7944c..0715f28ca13 100644 --- a/lib/CodeGen/MachineCSE.cpp +++ b/lib/CodeGen/MachineCSE.cpp @@ -87,6 +87,7 @@ namespace { SmallVector &PhysDefs) const; bool PhysRegDefsReach(MachineInstr *CSMI, MachineInstr *MI, SmallSet &PhysRefs, + SmallVector &PhysDefs, bool &NonLocal) const; bool isCSECandidate(MachineInstr *MI); bool isProfitableToCSE(unsigned CSReg, unsigned Reg, @@ -222,6 +223,7 @@ bool MachineCSE::hasLivePhysRegDefUses(const MachineInstr *MI, bool MachineCSE::PhysRegDefsReach(MachineInstr *CSMI, MachineInstr *MI, SmallSet &PhysRefs, + SmallVector &PhysDefs, bool &NonLocal) const { // For now conservatively returns false if the common subexpression is // not in the same basic block as the given instruction. The only exception @@ -231,10 +233,16 @@ bool MachineCSE::PhysRegDefsReach(MachineInstr *CSMI, MachineInstr *MI, bool CrossMBB = false; if (CSMBB != MBB) { - if (MBB->pred_size() == 1 && *MBB->pred_begin() == CSMBB) - CrossMBB = true; - else + if (MBB->pred_size() != 1 || *MBB->pred_begin() != CSMBB) return false; + + for (unsigned i = 0, e = PhysDefs.size(); i != e; ++i) { + if (TRI->isInAllocatableClass(PhysDefs[i])) + // Avoid extending live range of physical registers unless + // they are unallocatable. + return false; + } + CrossMBB = true; } MachineBasicBlock::const_iterator I = CSMI; I = llvm::next(I); MachineBasicBlock::const_iterator E = MI; @@ -429,7 +437,7 @@ bool MachineCSE::ProcessBlock(MachineBasicBlock *MBB) { // in between and the physical register uses were not clobbered. unsigned CSVN = VNT.lookup(MI); MachineInstr *CSMI = Exps[CSVN]; - if (PhysRegDefsReach(CSMI, MI, PhysRefs, CrossMBBPhysDef)) + if (PhysRegDefsReach(CSMI, MI, PhysRefs, PhysDefs, CrossMBBPhysDef)) FoundCSE = true; } -- 2.34.1