From f9bd22a79b57ac8d37b30100c4fc17fae5fc4467 Mon Sep 17 00:00:00 2001 From: ywj Date: Wed, 14 Aug 2013 10:21:46 +0800 Subject: [PATCH] support 3188 for factoryV4.0 --- arch/arm/configs/rk3188_rk618_fac_defconfig | 423 +++ arch/arm/mach-rk3188/Kconfig | 5 + arch/arm/mach-rk3188/Makefile | 2 + arch/arm/mach-rk3188/board-rk3188-fac.c | 2767 +++++++++++++++++++ 4 files changed, 3197 insertions(+) create mode 100644 arch/arm/configs/rk3188_rk618_fac_defconfig create mode 100755 arch/arm/mach-rk3188/board-rk3188-fac.c diff --git a/arch/arm/configs/rk3188_rk618_fac_defconfig b/arch/arm/configs/rk3188_rk618_fac_defconfig new file mode 100644 index 000000000000..f01e0b2f9ca8 --- /dev/null +++ b/arch/arm/configs/rk3188_rk618_fac_defconfig @@ -0,0 +1,423 @@ +CONFIG_EXPERIMENTAL=y +# CONFIG_LOCALVERSION_AUTO is not set +CONFIG_KERNEL_LZO=y +CONFIG_LOG_BUF_SHIFT=19 +CONFIG_CGROUPS=y +CONFIG_CGROUP_DEBUG=y +CONFIG_CGROUP_FREEZER=y +CONFIG_CGROUP_CPUACCT=y +CONFIG_RESOURCE_COUNTERS=y +CONFIG_CGROUP_SCHED=y +CONFIG_RT_GROUP_SCHED=y +CONFIG_BLK_DEV_INITRD=y +CONFIG_PANIC_TIMEOUT=1 +# CONFIG_SYSCTL_SYSCALL is not set +# CONFIG_ELF_CORE is not set +CONFIG_ASHMEM=y +# CONFIG_AIO is not set +CONFIG_EMBEDDED=y +# CONFIG_SLUB_DEBUG is not set +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +CONFIG_ARCH_RK3188=y +# CONFIG_DDR_TEST is not set +CONFIG_RK_CLOCK_PROC=y +CONFIG_MACH_RK3188_FAC=y +CONFIG_FIQ_DEBUGGER=y +CONFIG_FIQ_DEBUGGER_NO_SLEEP=y +CONFIG_FIQ_DEBUGGER_CONSOLE=y +CONFIG_FIQ_DEBUGGER_CONSOLE_DEFAULT_ENABLE=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_SMP=y +# CONFIG_SMP_ON_UP is not set +CONFIG_PREEMPT=y +CONFIG_AEABI=y +# CONFIG_OABI_COMPAT is not set +CONFIG_HIGHMEM=y +CONFIG_COMPACTION=y +CONFIG_DEFAULT_MMAP_MIN_ADDR=32768 +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_CMDLINE="console=ttyFIQ0 androidboot.console=ttyFIQ0 init=/init" +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_DEFAULT_GOV_INTERACTIVE=y +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y +CONFIG_CPU_FREQ_GOV_POWERSAVE=y +CONFIG_CPU_FREQ_GOV_USERSPACE=y +CONFIG_CPU_FREQ_GOV_ONDEMAND=y +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y +CONFIG_CPU_IDLE=y +CONFIG_VFP=y +CONFIG_NEON=y +CONFIG_WAKELOCK=y +CONFIG_PM_RUNTIME=y +CONFIG_PM_DEBUG=y +CONFIG_SUSPEND_TIME=y +CONFIG_NET=y +CONFIG_PACKET=y +CONFIG_UNIX=y +CONFIG_XFRM_USER=y +CONFIG_NET_KEY=y +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +CONFIG_IP_ADVANCED_ROUTER=y +CONFIG_IP_MULTIPLE_TABLES=y +CONFIG_INET_ESP=y +# CONFIG_INET_XFRM_MODE_BEET is not set +# CONFIG_INET_LRO is not set +CONFIG_IPV6=y +CONFIG_IPV6_PRIVACY=y +CONFIG_IPV6_ROUTER_PREF=y +CONFIG_IPV6_OPTIMISTIC_DAD=y +CONFIG_INET6_AH=y +CONFIG_INET6_ESP=y +CONFIG_INET6_IPCOMP=y +CONFIG_IPV6_MIP6=y +CONFIG_IPV6_TUNNEL=y +CONFIG_IPV6_MULTIPLE_TABLES=y +CONFIG_NETFILTER=y +# CONFIG_BRIDGE_NETFILTER is not set +CONFIG_NF_CONNTRACK=y +CONFIG_NF_CONNTRACK_EVENTS=y +CONFIG_NF_CT_PROTO_DCCP=y +CONFIG_NF_CT_PROTO_SCTP=y +CONFIG_NF_CT_PROTO_UDPLITE=y +CONFIG_NF_CONNTRACK_AMANDA=y +CONFIG_NF_CONNTRACK_FTP=y +CONFIG_NF_CONNTRACK_H323=y +CONFIG_NF_CONNTRACK_IRC=y +CONFIG_NF_CONNTRACK_NETBIOS_NS=y +CONFIG_NF_CONNTRACK_PPTP=y +CONFIG_NF_CONNTRACK_SANE=y +CONFIG_NF_CONNTRACK_SIP=y +CONFIG_NF_CONNTRACK_TFTP=y +CONFIG_NF_CT_NETLINK=y +CONFIG_NETFILTER_TPROXY=y +CONFIG_NETFILTER_XT_TARGET_CLASSIFY=y +CONFIG_NETFILTER_XT_TARGET_CONNMARK=y +CONFIG_NETFILTER_XT_TARGET_IDLETIMER=y +CONFIG_NETFILTER_XT_TARGET_MARK=y +CONFIG_NETFILTER_XT_TARGET_NFLOG=y +CONFIG_NETFILTER_XT_TARGET_NFQUEUE=y +CONFIG_NETFILTER_XT_TARGET_TPROXY=y +CONFIG_NETFILTER_XT_TARGET_TRACE=y +CONFIG_NETFILTER_XT_MATCH_COMMENT=y +CONFIG_NETFILTER_XT_MATCH_CONNBYTES=y +CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=y +CONFIG_NETFILTER_XT_MATCH_CONNMARK=y +CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y +CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=y +CONFIG_NETFILTER_XT_MATCH_HELPER=y +CONFIG_NETFILTER_XT_MATCH_IPRANGE=y +CONFIG_NETFILTER_XT_MATCH_LENGTH=y +CONFIG_NETFILTER_XT_MATCH_LIMIT=y +CONFIG_NETFILTER_XT_MATCH_MAC=y +CONFIG_NETFILTER_XT_MATCH_MARK=y +CONFIG_NETFILTER_XT_MATCH_POLICY=y +CONFIG_NETFILTER_XT_MATCH_PKTTYPE=y +CONFIG_NETFILTER_XT_MATCH_QTAGUID=y +CONFIG_NETFILTER_XT_MATCH_QUOTA=y +CONFIG_NETFILTER_XT_MATCH_QUOTA2=y +CONFIG_NETFILTER_XT_MATCH_QUOTA2_LOG=y +CONFIG_NETFILTER_XT_MATCH_SOCKET=y +CONFIG_NETFILTER_XT_MATCH_STATE=y +CONFIG_NETFILTER_XT_MATCH_STATISTIC=y +CONFIG_NETFILTER_XT_MATCH_STRING=y +CONFIG_NETFILTER_XT_MATCH_TIME=y +CONFIG_NETFILTER_XT_MATCH_U32=y +CONFIG_NF_CONNTRACK_IPV4=y +CONFIG_IP_NF_IPTABLES=y +CONFIG_IP_NF_MATCH_AH=y +CONFIG_IP_NF_MATCH_ECN=y +CONFIG_IP_NF_MATCH_TTL=y +CONFIG_IP_NF_FILTER=y +CONFIG_IP_NF_TARGET_REJECT=y +CONFIG_IP_NF_TARGET_REJECT_SKERR=y +CONFIG_IP_NF_TARGET_LOG=y +CONFIG_NF_NAT=y +CONFIG_IP_NF_TARGET_MASQUERADE=y +CONFIG_IP_NF_TARGET_NETMAP=y +CONFIG_IP_NF_TARGET_REDIRECT=y +CONFIG_IP_NF_MANGLE=y +CONFIG_IP_NF_RAW=y +CONFIG_IP_NF_ARPTABLES=y +CONFIG_IP_NF_ARPFILTER=y +CONFIG_IP_NF_ARP_MANGLE=y +CONFIG_NF_CONNTRACK_IPV6=y +CONFIG_IP6_NF_IPTABLES=y +CONFIG_IP6_NF_TARGET_LOG=y +CONFIG_IP6_NF_FILTER=y +CONFIG_IP6_NF_TARGET_REJECT=y +CONFIG_IP6_NF_TARGET_REJECT_SKERR=y +CONFIG_IP6_NF_MANGLE=y +CONFIG_IP6_NF_RAW=y +CONFIG_BRIDGE=y +# CONFIG_BRIDGE_IGMP_SNOOPING is not set +CONFIG_PHONET=y +CONFIG_NET_SCHED=y +CONFIG_NET_SCH_HTB=y +CONFIG_NET_SCH_INGRESS=y +CONFIG_NET_CLS_U32=y +CONFIG_NET_EMATCH=y +CONFIG_NET_EMATCH_U32=y +CONFIG_NET_CLS_ACT=y +CONFIG_NET_ACT_POLICE=y +CONFIG_NET_ACT_GACT=y +CONFIG_NET_ACT_MIRRED=y +CONFIG_BT=y +CONFIG_BT_L2CAP=y +CONFIG_BT_SCO=y +CONFIG_BT_RFCOMM=y +CONFIG_BT_RFCOMM_TTY=y +CONFIG_BT_BNEP=y +CONFIG_BT_HIDP=y +CONFIG_BT_HCIUART=y +CONFIG_BT_HCIUART_H4=y +CONFIG_BT_HCIUART_LL=y +CONFIG_BT_HCIBCM4325=y +CONFIG_BT_AUTOSLEEP=y +CONFIG_RFKILL=y +CONFIG_RFKILL_RK=y +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +# CONFIG_FIRMWARE_IN_KERNEL is not set +CONFIG_MTD=y +CONFIG_MTD_CMDLINE_PARTS=y +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLOCK=y +CONFIG_MTD_NAND_IDS=y +CONFIG_MTD_RKNAND=y +CONFIG_BLK_DEV_LOOP=y +CONFIG_MISC_DEVICES=y +CONFIG_UID_STAT=y +CONFIG_APANIC=y +CONFIG_SCSI=y +CONFIG_BLK_DEV_SD=y +CONFIG_SCSI_MULTI_LUN=y +CONFIG_MD=y +CONFIG_BLK_DEV_DM=y +CONFIG_DM_CRYPT=y +CONFIG_DM_UEVENT=y +CONFIG_NETDEVICES=y +CONFIG_PHYLIB=y +# CONFIG_NETDEV_1000 is not set +# CONFIG_NETDEV_10000 is not set +CONFIG_WLAN_80211=y +CONFIG_RKWIFI=y +CONFIG_USB_USBNET=y +CONFIG_PPP=y +CONFIG_PPP_MULTILINK=y +CONFIG_PPP_FILTER=y +CONFIG_PPP_ASYNC=y +CONFIG_PPP_SYNC_TTY=y +CONFIG_PPP_DEFLATE=y +CONFIG_PPP_BSDCOMP=y +CONFIG_PPP_MPPE=y +CONFIG_PPPOLAC=y +CONFIG_PPPOPNS=y +# CONFIG_INPUT_MOUSEDEV is not set +CONFIG_INPUT_EVDEV=y +CONFIG_INPUT_KEYRESET=y +# CONFIG_KEYBOARD_ATKBD is not set +# CONFIG_INPUT_MOUSE is not set +CONFIG_INPUT_JOYSTICK=y +CONFIG_JOYSTICK_XPAD=y +CONFIG_JOYSTICK_XPAD_FF=y +CONFIG_JOYSTICK_XPAD_LEDS=y +CONFIG_INPUT_TABLET=y +CONFIG_TABLET_USB_ACECAD=y +CONFIG_TABLET_USB_AIPTEK=y +CONFIG_TABLET_USB_GTCO=y +CONFIG_TABLET_USB_HANWANG=y +CONFIG_TABLET_USB_KBTAB=y +CONFIG_TABLET_USB_WACOM=y +CONFIG_INPUT_TOUCHSCREEN=y +CONFIG_TOUCHSCREEN_GT8XX=y +CONFIG_INPUT_MISC=y +CONFIG_INPUT_KEYCHORD=y +CONFIG_INPUT_UINPUT=y +# CONFIG_SERIO is not set +# CONFIG_VT is not set +# CONFIG_LEGACY_PTYS is not set +CONFIG_SERIAL_RK29=y +CONFIG_UART0_RK29=y +CONFIG_UART0_CTS_RTS_RK29=y +CONFIG_UART3_RK29=y +CONFIG_UART3_CTS_RTS_RK29=y +# CONFIG_HW_RANDOM is not set +CONFIG_I2C=y +# CONFIG_I2C_COMPAT is not set +CONFIG_I2C_CHARDEV=y +CONFIG_I2C0_CONTROLLER_RK30=y +CONFIG_I2C1_CONTROLLER_RK30=y +CONFIG_I2C2_CONTROLLER_RK30=y +CONFIG_I2C3_CONTROLLER_RK30=y +CONFIG_I2C4_CONTROLLER_RK30=y +CONFIG_GPIO_SYSFS=y +CONFIG_GPIO_WM831X=y +CONFIG_EXPANDED_GPIO_NUM=0 +CONFIG_EXPANDED_GPIO_IRQ_NUM=0 +CONFIG_SPI_FPGA_GPIO_NUM=0 +CONFIG_SPI_FPGA_GPIO_IRQ_NUM=0 +CONFIG_POWER_SUPPLY=y +CONFIG_TEST_POWER=y +# CONFIG_HWMON is not set +CONFIG_MFD_TPS65910=y +CONFIG_MFD_WM831X_I2C=y +CONFIG_MFD_TPS65090=y +CONFIG_MFD_RK616=y +CONFIG_REGULATOR=y +CONFIG_REGULATOR_TPS65910=y +CONFIG_REGULATOR_WM831X=y +CONFIG_REGULATOR_ACT8846=y +CONFIG_RK30_PWM_REGULATOR=y +CONFIG_MEDIA_SUPPORT=y +CONFIG_VIDEO_DEV=y +# CONFIG_VIDEO_CAPTURE_DRIVERS is not set +CONFIG_ION=y +CONFIG_ION_ROCKCHIP=y +CONFIG_FB=y +CONFIG_BACKLIGHT_LCD_SUPPORT=y +# CONFIG_LCD_CLASS_DEVICE is not set +CONFIG_BACKLIGHT_CLASS_DEVICE=y +# CONFIG_BACKLIGHT_GENERIC is not set +CONFIG_DISPLAY_SUPPORT=y +CONFIG_FB_ROCKCHIP=y +CONFIG_DUAL_LCDC_DUAL_DISP_IN_KERNEL=y +CONFIG_LCDC_RK3188=y +CONFIG_LCDC0_RK3188=y +CONFIG_LCDC1_RK3188=y +CONFIG_LCD_B101EW05=y +CONFIG_RK_TRSM=y +CONFIG_RK616_LVDS=y +CONFIG_RK_HDMI=y +CONFIG_RGA_RK30=y +CONFIG_LOGO=y +# CONFIG_LOGO_LINUX_MONO is not set +# CONFIG_LOGO_LINUX_VGA16 is not set +CONFIG_SOUND=y +CONFIG_SND=y +# CONFIG_SND_SUPPORT_OLD_API is not set +# CONFIG_SND_VERBOSE_PROCFS is not set +# CONFIG_SND_DRIVERS is not set +# CONFIG_SND_ARM is not set +CONFIG_SND_SOC=y +CONFIG_SND_RK29_SOC=y +CONFIG_SND_I2S_DMA_EVENT_STATIC=y +CONFIG_SND_RK_SOC_HDMI_SPDIF=y +CONFIG_SND_RK_SOC_RK616=y +CONFIG_SND_RK29_CODEC_SOC_SLAVE=y +CONFIG_UHID=y +CONFIG_HID_A4TECH=y +CONFIG_HID_ACRUX=y +CONFIG_HID_ACRUX_FF=y +CONFIG_HID_APPLE=y +CONFIG_HID_BELKIN=y +CONFIG_HID_CHERRY=y +CONFIG_HID_CHICONY=y +CONFIG_HID_CYPRESS=y +CONFIG_HID_DRAGONRISE=y +CONFIG_DRAGONRISE_FF=y +CONFIG_HID_EMS_FF=y +CONFIG_HID_ELECOM=y +CONFIG_HID_EZKEY=y +CONFIG_HID_KEYTOUCH=y +CONFIG_HID_KYE=y +CONFIG_HID_UCLOGIC=y +CONFIG_HID_WALTOP=y +CONFIG_HID_GYRATION=y +CONFIG_HID_TWINHAN=y +CONFIG_HID_KENSINGTON=y +CONFIG_HID_LCPOWER=y +CONFIG_HID_LOGITECH=y +CONFIG_LOGITECH_FF=y +CONFIG_LOGIRUMBLEPAD2_FF=y +CONFIG_LOGIG940_FF=y +CONFIG_LOGIWII_FF=y +CONFIG_HID_MAGICMOUSE=y +CONFIG_HID_MICROSOFT=y +CONFIG_HID_MONTEREY=y +CONFIG_HID_MULTITOUCH=y +CONFIG_HID_NTRIG=y +CONFIG_HID_ORTEK=y +CONFIG_HID_PANTHERLORD=y +CONFIG_PANTHERLORD_FF=y +CONFIG_HID_PETALYNX=y +CONFIG_HID_PICOLCD=y +CONFIG_HID_QUANTA=y +CONFIG_HID_ROCCAT_ARVO=y +CONFIG_HID_ROCCAT_KONE=y +CONFIG_HID_ROCCAT_KONEPLUS=y +CONFIG_HID_ROCCAT_KOVAPLUS=y +CONFIG_HID_ROCCAT_PYRA=y +CONFIG_HID_SAMSUNG=y +CONFIG_HID_SONY=y +CONFIG_HID_SUNPLUS=y +CONFIG_HID_GREENASIA=y +CONFIG_GREENASIA_FF=y +CONFIG_HID_SMARTJOYPLUS=y +CONFIG_SMARTJOYPLUS_FF=y +CONFIG_HID_TOPSEED=y +CONFIG_HID_THRUSTMASTER=y +CONFIG_THRUSTMASTER_FF=y +CONFIG_HID_WACOM=y +CONFIG_HID_ZEROPLUS=y +CONFIG_ZEROPLUS_FF=y +CONFIG_HID_ZYDACRON=y +CONFIG_USB_ANNOUNCE_NEW_DEVICES=y +CONFIG_USB_DEVICEFS=y +CONFIG_USB_STORAGE=y +CONFIG_USB_SERIAL=y +CONFIG_USB_SERIAL_GENERIC=y +CONFIG_USB_SERIAL_OPTION=y +CONFIG_USB_GADGET=y +CONFIG_USB20_HOST=y +CONFIG_USB20_OTG=y +CONFIG_DWC_OTG_BOTH_HOST_SLAVE=y +CONFIG_MMC=y +CONFIG_MMC_UNSAFE_RESUME=y +CONFIG_MMC_EMBEDDED_SDIO=y +CONFIG_MMC_PARANOID_SD_INIT=y +CONFIG_SDMMC_RK29=y +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=y +CONFIG_LEDS_GPIO=y +CONFIG_SWITCH=y +CONFIG_SWITCH_GPIO=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_DRV_WM831X=y +CONFIG_TPS65910_RTC=y +CONFIG_STAGING=y +CONFIG_ANDROID=y +CONFIG_ANDROID_BINDER_IPC=y +CONFIG_ANDROID_LOGGER=y +CONFIG_ANDROID_TIMED_GPIO=y +CONFIG_ANDROID_LOW_MEMORY_KILLER=y +# CONFIG_CMMB is not set +CONFIG_EXT3_FS=y +# CONFIG_EXT3_FS_XATTR is not set +CONFIG_EXT4_FS=y +# CONFIG_EXT4_FS_XATTR is not set +# CONFIG_DNOTIFY is not set +CONFIG_FUSE_FS=y +CONFIG_VFAT_FS=y +CONFIG_TMPFS=y +# CONFIG_MISC_FILESYSTEMS is not set +# CONFIG_NETWORK_FILESYSTEMS is not set +CONFIG_PARTITION_ADVANCED=y +CONFIG_EFI_PARTITION=y +CONFIG_NLS_CODEPAGE_437=y +CONFIG_NLS_ASCII=y +CONFIG_NLS_ISO8859_1=y +CONFIG_PRINTK_TIME=y +CONFIG_MAGIC_SYSRQ=y +CONFIG_DEBUG_KERNEL=y +CONFIG_SCHEDSTATS=y +# CONFIG_DEBUG_PREEMPT is not set +# CONFIG_EVENT_POWER_TRACING_DEPRECATED is not set +CONFIG_ENABLE_DEFAULT_TRACERS=y +CONFIG_CRYPTO_SHA256=y +CONFIG_CRYPTO_TWOFISH=y +# CONFIG_CRYPTO_ANSI_CPRNG is not set diff --git a/arch/arm/mach-rk3188/Kconfig b/arch/arm/mach-rk3188/Kconfig index 2f51591d8490..bb50d0b54c5e 100755 --- a/arch/arm/mach-rk3188/Kconfig +++ b/arch/arm/mach-rk3188/Kconfig @@ -35,6 +35,11 @@ config MACH_RK3188_DS1006H config MACH_RK3188_U30GT2 bool "RK3188 u30gt2 board" + +config MACH_RK3188_FAC + bool "RK3188 Board for factory" + select MACH_RK_FAC + config MACH_RK3188_JETTAB bool "RK3188 jettaB top board" diff --git a/arch/arm/mach-rk3188/Makefile b/arch/arm/mach-rk3188/Makefile index 7975d94ac93b..f93166f07656 100755 --- a/arch/arm/mach-rk3188/Makefile +++ b/arch/arm/mach-rk3188/Makefile @@ -31,3 +31,5 @@ board-$(CONFIG_MACH_RK3188_JETTAB) += board-rk3188-jettaplus.o board-$(CONFIG_MACH_RK3188_RK618) += board-rk3188-jettaplus.o board-$(CONFIG_MACH_RK3188M_TB) += board-rk3188m-tb.o board-$(CONFIG_MACH_RK3188M_F304) += board-rk3188m-f304.o +obj-$(CONFIG_SOC_RK3188) += board.o +board-$(CONFIG_MACH_RK3188_FAC) += board-rk3188-fac.o diff --git a/arch/arm/mach-rk3188/board-rk3188-fac.c b/arch/arm/mach-rk3188/board-rk3188-fac.c new file mode 100755 index 000000000000..748d8b428531 --- /dev/null +++ b/arch/arm/mach-rk3188/board-rk3188-fac.c @@ -0,0 +1,2767 @@ +/* + * + * Copyright (C) 2012 ROCKCHIP, Inc. + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#if defined(CONFIG_MFD_RK610) +#include +#endif + +#if defined(CONFIG_MFD_RK616) +#include +#endif + + +#if defined(CONFIG_RK_HDMI) + #include "../../../drivers/video/rockchip/hdmi/rk_hdmi.h" +#endif + +#if defined(CONFIG_SPIM_RK29) +#include "../../../drivers/spi/rk29_spim.h" +#endif +#if defined(CONFIG_GPS_RK) +#include "../../../drivers/misc/gps/rk_gps/rk_gps.h" +#endif +#if defined(CONFIG_MU509) +#include +#endif +#if defined(CONFIG_MW100) +#include +#endif +#if defined(CONFIG_MT6229) +#include +#endif +#if defined(CONFIG_ANDROID_TIMED_GPIO) +#include "../../../drivers/staging/android/timed_gpio.h" +#endif + +#if defined(CONFIG_MT6620) +#include +#endif +#include "../mach-rk30/board-rk3168-tb-camera.c" + +#include +#include +#include "../plat-rk/rk-fac-config.c" +#if 1 +#define INIT_ERR(name) do { printk("%s: %s init Failed: \n", __func__, (name)); } while(0) +#else +#define INIT_ERR(name) +#endif + +//////////////////////////////////////////////////////////////////////////////////////// +#include +static struct rk29_keys_button key_button[] = { + { + .desc = "play", + .code = KEY_POWER, + .wakeup = 1, + }, + { + .desc = "vol-", + .code = KEY_VOLUMEDOWN, + }, + { + .desc = "vol+", + .code = KEY_VOLUMEUP, + }, + { + .desc = "menu", + .code = EV_MENU, + }, + { + .desc = "esc", + .code = KEY_BACK, + }, + { + .desc = "home", + .code = KEY_HOME, + }, +}; +struct rk29_keys_platform_data rk29_keys_pdata = { + .buttons = key_button, + .chn = -1, //chn: 0-7, if do not use ADC,set 'chn' -1 +}; +//////////////////////////////////////////////////////////////////////////////////////// +//Backlight +//////////////////////////////////////////////////////////////////////////////////////// +#ifdef CONFIG_BACKLIGHT_RK29_BL +static int rk29_backlight_io_init(void) +{ + int ret = 0; + printk("rk29_backlight_io_init %d\n",bl_pwm_mode); + iomux_set(bl_pwm_mode); + msleep(100); + + if(bl_en== -1) + return 0; + ret = port_output_init(bl_en, 1, "bl_en"); + if(ret < 0){ + printk("%s: port output init faild\n", __func__); + return ret; + } + port_output_on(bl_en); + return ret; +} + +static int rk29_backlight_io_deinit(void) +{ + int ret = 0, pwm_gpio; + + if(bl_en != -1) + port_deinit(bl_en); + + pwm_gpio = iomux_mode_to_gpio(bl_pwm_mode); + gpio_request(pwm_gpio, NULL); + gpio_direction_output(pwm_gpio, GPIO_LOW); + return ret; +} + +static int rk29_backlight_pwm_suspend(void) +{ + int ret = 0, pwm_gpio; + + pwm_gpio = iomux_mode_to_gpio(bl_pwm_mode); + if (gpio_request(pwm_gpio, NULL)) { + printk("func %s, line %d: request gpio fail\n", __FUNCTION__, __LINE__); + return -1; + } + gpio_direction_output(pwm_gpio, GPIO_LOW); + port_output_off(bl_en); + return ret; +} + +static int rk29_backlight_pwm_resume(void) +{ + int pwm_gpio = iomux_mode_to_gpio(bl_pwm_mode); + gpio_free(pwm_gpio); + iomux_set(bl_pwm_mode); + msleep(150); + port_output_on(bl_en); + return 0; +} + +static struct rk29_bl_info rk29_bl_info = { + .io_init = rk29_backlight_io_init, + .io_deinit = rk29_backlight_io_deinit, + .pwm_suspend = rk29_backlight_pwm_suspend, + .pwm_resume = rk29_backlight_pwm_resume, +}; + +static struct platform_device rk29_device_backlight = { + .name = "rk29_backlight", + .id = -1, + .dev = { + .platform_data = &rk29_bl_info, + } +}; + +#endif +//////////////////////////////////////////////////////////////////////////////////////// +//LCD +//////////////////////////////////////////////////////////////////////////////////////// +#ifdef CONFIG_FB_ROCKCHIP +static int rk_fb_io_init(struct rk29_fb_setting_info *fb_setting) +{ + int ret = 0; + //printk("rk_fb_io_init %x,%x,%x\n",lcd_cs,lcd_en,lcd_std); + if(lcd_cs != -1){ + ret = port_output_init(lcd_cs, 1, "lcd_cs"); + if(ret < 0) + printk("%s: port output init faild\n", __func__); + port_output_on(lcd_cs); + } + + if(lcd_en != -1){ + ret = port_output_init(lcd_en, 1, "lcd_en"); + if(ret < 0) + printk("%s: port output init faild\n", __func__); + port_output_on(lcd_en); + } + + return 0; +} +static int rk_fb_io_disable(void) +{ + if(lcd_cs != -1) + port_output_off(lcd_cs); + if(lcd_en != -1) + port_output_on(lcd_en); + return 0; +} +static int rk_fb_io_enable(void) +{ + if(lcd_en != -1) + port_output_on(lcd_en); + if(lcd_cs != -1) + port_output_on(lcd_cs); + return 0; +} + +#if defined(CONFIG_LCDC0_RK3066B) || defined(CONFIG_LCDC0_RK3188) +struct rk29fb_info lcdc0_screen_info = { +#if defined(CONFIG_RK_HDMI) && defined(CONFIG_HDMI_SOURCE_LCDC0) && defined(CONFIG_DUAL_LCDC_DUAL_DISP_IN_KERNEL) + .prop = EXTEND, //extend display device + .io_init = NULL, + .io_disable = NULL, + .io_enable = NULL, + .set_screen_info = hdmi_init_lcdc, +#else + .prop = PRMRY, //primary display device + .io_init = rk_fb_io_init, + .io_disable = rk_fb_io_disable, + .io_enable = rk_fb_io_enable, + .set_screen_info = set_lcd_info, +#endif +}; +#endif + +#if defined(CONFIG_LCDC1_RK3066B) || defined(CONFIG_LCDC1_RK3188) +struct rk29fb_info lcdc1_screen_info = { +#if defined(CONFIG_RK_HDMI) && defined(CONFIG_HDMI_SOURCE_LCDC1) && defined(CONFIG_DUAL_LCDC_DUAL_DISP_IN_KERNEL) + .prop = EXTEND, //extend display device + .io_init = NULL, + .io_disable = NULL, + .io_enable = NULL, + .set_screen_info = hdmi_init_lcdc, +#else + .prop = PRMRY, //primary display device + .io_init = rk_fb_io_init, + .io_disable = rk_fb_io_disable, + .io_enable = rk_fb_io_enable, + .set_screen_info = set_lcd_info, +#endif +}; +#endif + +static struct resource resource_fb[] = { + [0] = { + .name = "fb0 buf", + .start = 0, + .end = 0,//RK30_FB0_MEM_SIZE - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .name = "ipp buf", //for rotate + .start = 0, + .end = 0,//RK30_FB0_MEM_SIZE - 1, + .flags = IORESOURCE_MEM, + }, + [2] = { + .name = "fb2 buf", + .start = 0, + .end = 0,//RK30_FB0_MEM_SIZE - 1, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device device_fb = { + .name = "rk-fb", + .id = -1, + .num_resources = ARRAY_SIZE(resource_fb), + .resource = resource_fb, +}; +#endif + +#if defined(CONFIG_LCDC0_RK3066B) || defined(CONFIG_LCDC0_RK3188) +static struct resource resource_lcdc0[] = { + [0] = { + .name = "lcdc0 reg", + .start = RK30_LCDC0_PHYS, + .end = RK30_LCDC0_PHYS + RK30_LCDC0_SIZE - 1, + .flags = IORESOURCE_MEM, + }, + + [1] = { + .name = "lcdc0 irq", + .start = IRQ_LCDC0, + .end = IRQ_LCDC0, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device device_lcdc0 = { + .name = "rk30-lcdc", + .id = 0, + .num_resources = ARRAY_SIZE(resource_lcdc0), + .resource = resource_lcdc0, + .dev = { + .platform_data = &lcdc0_screen_info, + }, +}; +#endif +#if defined(CONFIG_LCDC1_RK3066B) || defined(CONFIG_LCDC1_RK3188) +static struct resource resource_lcdc1[] = { + [0] = { + .name = "lcdc1 reg", + .start = RK30_LCDC1_PHYS, + .end = RK30_LCDC1_PHYS + RK30_LCDC1_SIZE - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .name = "lcdc1 irq", + .start = IRQ_LCDC1, + .end = IRQ_LCDC1, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device device_lcdc1 = { + .name = "rk30-lcdc", + .id = 1, + .num_resources = ARRAY_SIZE(resource_lcdc1), + .resource = resource_lcdc1, + .dev = { + .platform_data = &lcdc1_screen_info, + }, +}; +#endif +//////////////////////////////////////////////////////////////////////////////////////// +//TP +//////////////////////////////////////////////////////////////////////////////////////// +#if defined (CONFIG_TOUCHSCREEN_GSLX680_RK3168) +static int gslx680_init_platform_hw() +{ + int ret; + if(tp_rst!=-1){ + ret = port_output_init(tp_rst, 1, "tp_rst"); + if(ret<0) + printk("%s: port output init faild\n", __func__); + } + + port_output_on(tp_rst); + mdelay(10); + port_output_off(tp_rst); + mdelay(10); + port_output_on(tp_rst); + msleep(300); + return 0; +} + +static struct tp_platform_data gslx680_data = { + + .init_platform_hw = gslx680_init_platform_hw, +}; +struct i2c_board_info __initdata gslx680_info = { + .type = "gslX680", + .flags = 0, + .platform_data = &gslx680_data, +}; +#endif + + +#if defined (CONFIG_TOUCHSCREEN_86V_GT811_IIC) +int gt811_init_platform_hw(int irq,int reset) +{ + int ret; + if(tp_rst!=-1){ + ret = port_output_init(tp_rst, 1, "tp_rst"); + if(ret<0) + printk("%s: port output init faild\n", __func__); + } + + port_output_off(tp_rst); + msleep(500); + port_output_off(tp_rst); + msleep(500); + port_output_on(tp_rst); + mdelay(100); + return 0; +} + + +static struct tp_platform_data gt811_data = { + .model= 811, + .init_platform_hw= gt811_init_platform_hw, +}; + +struct i2c_board_info __initdata gt811_info = { + .type = "gt811_ts", + .flags = 0, + .platform_data = >811_data, +}; +#endif + + +#if defined(CONFIG_TOUCHSCREEN_GT8XX) +#define TOUCH_PWR_PIN RK30_PIN0_PC5 // need to fly line by hardware engineer +static int goodix_init_platform_hw(void) +{ + int ret; + + if (TOUCH_PWR_PIN != INVALID_GPIO) { + ret = gpio_request(TOUCH_PWR_PIN, "goodix power pin"); + if (ret != 0) { + gpio_free(TOUCH_PWR_PIN); + printk("goodix power error\n"); + return -EIO; + } + gpio_direction_output(TOUCH_PWR_PIN, 0); + gpio_set_value(TOUCH_PWR_PIN, GPIO_LOW); + msleep(100); + } + + if(tp_rst!=-1){ + ret = port_output_init(tp_rst, 1, "tp_rst"); + if(ret<0) + printk("%s: port output init faild\n", __func__); + } + port_output_on(tp_rst); + msleep(100); + return 0; +} + +struct tp_platform_data goodix_data = { + .model = 8105, + .init_platform_hw = goodix_init_platform_hw, +}; + +struct i2c_board_info __initdata goodix_info = { + .type = "Goodix-TS", + .flags = 0, + .platform_data = &goodix_data, +}; +#endif + +//////////////////////////////////////////////////////////////////////////////////////// +//Gsensor +//////////////////////////////////////////////////////////////////////////////////////// +/*MMA7660 gsensor*/ +#if defined (CONFIG_GS_MMA7660) +static int mma7660_init_platform_hw(void) +{ + //rk30_mux_api_set(GPIO1B2_SPI_RXD_UART1_SIN_NAME, GPIO1B_GPIO1B2); + + return 0; +} + +static struct sensor_platform_data mma7660_data = { + .type = SENSOR_TYPE_ACCEL, + .irq_enable = 1, + .poll_delay_ms = 30, + .init_platform_hw = mma7660_init_platform_hw, +}; +struct i2c_board_info __initdata mma7660_info = { + .type = "gs_mma7660", + .flags = 0, + .platform_data =&mma7660_data, +}; +#endif + +#if defined (CONFIG_GS_MXC6225) +static int mxc6225_init_platform_hw(void) +{ +// rk30_mux_api_set(GPIO1B1_SPI_TXD_UART1_SOUT_NAME, GPIO1B_GPIO1B1); + return 0; +} + +static struct sensor_platform_data mxc6225_data = { + .type = SENSOR_TYPE_ACCEL, + .irq_enable = 0, + .poll_delay_ms = 30, + .init_platform_hw = mxc6225_init_platform_hw, +}; +struct i2c_board_info __initdata mxc6225_info = { + .type = "gs_mxc6225", + .flags = 0, + .platform_data =&mxc6225_data, +}; +#endif + +#if defined (CONFIG_GS_DMT10) +static int dmt10_init_platform_hw(void) +{ + return 0; +} + +static struct sensor_platform_data dmt10_data = { + .type = SENSOR_TYPE_ACCEL, + .irq_enable = 0, + .poll_delay_ms = 30, + .init_platform_hw = dmt10_init_platform_hw, +}; +struct i2c_board_info __initdata dmt10_info = { + .type = "gs_dmard10", + .flags = 0, + .platform_data =&dmt10_data, +}; +#endif + + +#if defined (CONFIG_GS_LIS3DH) +static int lis3dh_init_platform_hw(void) +{ + return 0; +} +static struct sensor_platform_data lis3dh_data = { + .type = SENSOR_TYPE_ACCEL, + .irq_enable = 1, + .poll_delay_ms = 30, + .init_platform_hw = lis3dh_init_platform_hw, +}; +struct i2c_board_info __initdata lis3dh_info = { + .type = "gs_lis3dh", + .flags = 0, + .platform_data =&lis3dh_data, +}; +#endif + +//////////////////////////////////////////////////////////////////////////////////////// +//battery +//////////////////////////////////////////////////////////////////////////////////////// +#ifdef CONFIG_BATTERY_RK30_ADC_FAC +static struct rk30_adc_battery_platform_data rk30_adc_battery_platdata = { + +}; + + +static struct platform_device rk30_device_adc_battery = { + .name = "rk30-battery", + .id = -1, + .dev = { + .platform_data = &rk30_adc_battery_platdata, + }, +}; +#endif + +//////////////////////////////////////////////////////////////////////////////////////// +//codec +//////////////////////////////////////////////////////////////////////////////////////// +#if defined (CONFIG_SND_RK29_SOC_RT5631) +static struct codec_platform_data rt5631_data = { +}; +struct i2c_board_info __initdata rt5631_info = { + .type = "rt5631", + .flags = 0, + .platform_data =&rt5631_data, +}; +#endif + +#if defined (CONFIG_SND_RK29_SOC_ES8323) +static struct codec_platform_data es8323_data = { +}; +struct i2c_board_info __initdata es8323_info = { + .type = "es8323", + .flags = 0, + .platform_data =&es8323_data, +}; +#endif + +#if defined(CONFIG_MFD_RK616) +#define RK616_SCL_RATE (100*1000) //i2c scl rate +static int rk616_power_on_init(void) +{ + int ret; + + if(codec_power!=-1) + { + ret = port_output_init(codec_power, 1, "codec_power"); + if(ret < 0) + printk("%s: port output init faild\n", __func__); + port_output_on(codec_power); + } + + if(codec_rst!=-1) + { + ret = port_output_init(codec_rst, 1, "codec_rst"); + if(ret < 0) + printk("%s: port output init faild\n", __func__); + port_output_on(codec_rst); + msleep(100); + port_output_off(codec_rst); + msleep(100); + port_output_on(codec_rst); + } + return 0; + +} + + +static int rk616_power_deinit(void) +{ + if(codec_power!=-1) + { + port_output_off(codec_power); + port_deinit(codec_power); + } + if(codec_rst!=-1) + { + port_output_off(codec_rst); + port_deinit(codec_rst); + } + return 0; +} + +static struct rk616_platform_data rk616_pdata = { + .power_init = rk616_power_on_init, + .power_deinit = rk616_power_deinit, + .scl_rate = RK616_SCL_RATE, + .lcd0_func = INPUT, //port lcd0 as input + .lcd1_func = INPUT, //port lcd1 as input + .lvds_ch_nr = 1, //the number of used lvds channel + //.hdmi_irq = RK30_PIN2_PD6, + //.spk_ctl_gpio = RK30_PIN2_PD7, + .hp_ctl_gpio = RK30_PIN2_PD7, +}; + +struct i2c_board_info __initdata rk616_info = { + .type = "rk616", + .flags = 0, + .platform_data = &rk616_pdata, +}; +#endif + + +//////////////////////////////////////////////////////////////////////////////////////// +//spi +//////////////////////////////////////////////////////////////////////////////////////// +static struct spi_board_info board_spi_devices[] = { +}; + +//////////////////////////////////////////////////////////////////////////////////////// +//modem +//////////////////////////////////////////////////////////////////////////////////////// +#ifdef CONFIG_RK29_SUPPORT_MODEM + +#define RK30_MODEM_POWER RK30_PIN0_PC6 +#define RK30_MODEM_POWER_IOMUX iomux_set(GPIO0_C6) + +static int rk30_modem_io_init(void) +{ + printk("%s\n", __FUNCTION__); + RK30_MODEM_POWER_IOMUX; + + return 0; +} + +static struct rk29_io_t rk30_modem_io = { + .io_addr = RK30_MODEM_POWER, + .enable = GPIO_HIGH, + .disable = GPIO_LOW, + .io_init = rk30_modem_io_init, +}; + +static struct platform_device rk30_device_modem = { + .name = "rk30_modem", + .id = -1, + .dev = { + .platform_data = &rk30_modem_io, + } +}; +#endif +#if defined(CONFIG_MU509) +static int mu509_io_init(void) +{ + + iomux_set(GPIO2_D5); + iomux_set(GPIO0_C6); + iomux_set(GPIO2_D4); + iomux_set(GPIO0_C4); + iomux_set(GPIO0_C5); + return 0; +} + +static int mu509_io_deinit(void) +{ + + return 0; +} + +struct rk29_mu509_data rk29_mu509_info = { + .io_init = mu509_io_init, + .io_deinit = mu509_io_deinit, + .modem_power_en = RK30_PIN2_PD5, + .bp_power = RK30_PIN0_PC6, + .bp_reset = RK30_PIN2_PD4, + .ap_wakeup_bp = RK30_PIN0_PC4, + .bp_wakeup_ap = RK30_PIN0_PC5, +}; +struct platform_device rk29_device_mu509 = { + .name = "mu509", + .id = -1, + .dev = { + .platform_data = &rk29_mu509_info, + } + }; +#endif +#if defined(CONFIG_MW100) +static int mw100_io_init(void) +{ + iomux_set(GPIO2_D5); + iomux_set(GPIO0_C6); + iomux_set(GPIO2_D4); + iomux_set(GPIO0_C4); + iomux_set(GPIO0_C5); + return 0; +} + +static int mw100_io_deinit(void) +{ + + return 0; +} + +struct rk29_mw100_data rk29_mw100_info = { + .io_init = mw100_io_init, + .io_deinit = mw100_io_deinit, + .modem_power_en = RK30_PIN2_PD5, + .bp_power = RK30_PIN0_PC6, + .bp_reset = RK30_PIN2_PD4, + .ap_wakeup_bp = RK30_PIN0_PC4, + .bp_wakeup_ap = RK30_PIN0_PC5, +}; +struct platform_device rk29_device_mw100 = { + .name = "mw100", + .id = -1, + .dev = { + .platform_data = &rk29_mw100_info, + } + }; +#endif +#if defined(CONFIG_MT6229) +static int mt6229_io_init(void) +{ + iomux_set(GPIO2_D5); + iomux_set(GPIO0_C6); + iomux_set(GPIO2_D4); + iomux_set(GPIO0_C4); + iomux_set(GPIO0_C5); + return 0; +} + +static int mt6229_io_deinit(void) +{ + + return 0; +} + +struct rk29_mt6229_data rk29_mt6229_info = { + .io_init = mt6229_io_init, + .io_deinit = mt6229_io_deinit, + .modem_power_en = RK30_PIN2_PD5, + .bp_power = RK30_PIN0_PC6, + .bp_reset = RK30_PIN2_PD4, + .ap_wakeup_bp = RK30_PIN0_PC4, + .bp_wakeup_ap = RK30_PIN0_PC5, +}; +struct platform_device rk29_device_mt6229 = { + .name = "mt6229", + .id = -1, + .dev = { + .platform_data = &rk29_mt6229_info, + } + }; +#endif + + +//////////////////////////////////////////////////////////////////////////////////////// +//compass +//////////////////////////////////////////////////////////////////////////////////////// +#if defined (CONFIG_COMPASS_AK8975) +static struct sensor_platform_data akm8975_info = +{ + .type = SENSOR_TYPE_COMPASS, + .irq_enable = 1, + .poll_delay_ms = 30, + .m_layout = + { + { + {1, 0, 0}, + {0, 1, 0}, + {0, 0, 1}, + }, + + { + {1, 0, 0}, + {0, 1, 0}, + {0, 0, 1}, + }, + + { + {1, 0, 0}, + {0, 1, 0}, + {0, 0, 1}, + }, + + { + {1, 0, 0}, + {0, 1, 0}, + {0, 0, 1}, + }, + } +}; + +#endif + +#if defined(CONFIG_GYRO_L3G4200D) + +#include +#define L3G4200D_INT_PIN RK30_PIN0_PB4 + +static int l3g4200d_init_platform_hw(void) +{ + return 0; +} + +static struct sensor_platform_data l3g4200d_info = { + .type = SENSOR_TYPE_GYROSCOPE, + .irq_enable = 1, + .poll_delay_ms = 30, + .orientation = {0, 1, 0, -1, 0, 0, 0, 0, 1}, + .init_platform_hw = l3g4200d_init_platform_hw, + .x_min = 40,//x_min,y_min,z_min = (0-100) according to hardware + .y_min = 40, + .z_min = 20, +}; + +#endif + +#ifdef CONFIG_LS_CM3217 +static struct sensor_platform_data cm3217_info = { + .type = SENSOR_TYPE_LIGHT, + .irq_enable = 0, + .poll_delay_ms = 500, +}; + +#endif + + + +//////////////////////////////////////////////////////////////////////////////////////// +//GPU +//////////////////////////////////////////////////////////////////////////////////////// +#if defined(CONFIG_ARCH_RK3188) +static struct resource resource_mali[] = { + [0] = { + .name = "ump buf", + .start = 0, + .end = 0, + .flags = IORESOURCE_MEM, + }, + +}; + +static struct platform_device device_mali= { + .name = "mali400_ump", + .id = -1, + .num_resources = ARRAY_SIZE(resource_mali), + .resource = resource_mali, +}; +#endif + +//////////////////////////////////////////////////////////////////////////////////////// +//TimeGpio +//////////////////////////////////////////////////////////////////////////////////////// +#ifdef CONFIG_ANDROID_TIMED_GPIO +static struct timed_gpio timed_gpios[] = { + { + .name = "vibrator", + .gpio = INVALID_GPIO, + .max_timeout = 1000, + .active_low = 0, + .adjust_time =20, //adjust for diff product + }, +}; + +static struct timed_gpio_platform_data rk29_vibrator_info = { + .num_gpios = 1, + .gpios = timed_gpios, +}; + +static struct platform_device rk29_device_vibrator = { + .name = "timed-gpio", + .id = -1, + .dev = { + .platform_data = &rk29_vibrator_info, + }, + +}; +#endif + +#ifdef CONFIG_LEDS_GPIO_PLATFORM +static struct gpio_led rk29_leds[] = { + { + .name = "button-backlight", + .gpio = INVALID_GPIO, + .default_trigger = "timer", + .active_low = 0, + .retain_state_suspended = 0, + .default_state = LEDS_GPIO_DEFSTATE_OFF, + }, +}; + +static struct gpio_led_platform_data rk29_leds_pdata = { + .leds = rk29_leds, + .num_leds = ARRAY_SIZE(rk29_leds), +}; + +static struct platform_device rk29_device_gpio_leds = { + .name = "leds-gpio", + .id = -1, + .dev = { + .platform_data = &rk29_leds_pdata, + }, +}; +#endif + +#ifdef CONFIG_RK_IRDA +#define IRDA_IRQ_PIN INVALID_GPIO //RK30_PIN0_PA3 + +static int irda_iomux_init(void) +{ + int ret = 0; + + //irda irq pin + ret = gpio_request(IRDA_IRQ_PIN, NULL); + if (ret != 0) { + gpio_free(IRDA_IRQ_PIN); + printk(">>>>>> IRDA_IRQ_PIN gpio_request err \n "); + } + gpio_pull_updown(IRDA_IRQ_PIN, PullDisable); + gpio_direction_input(IRDA_IRQ_PIN); + + return 0; +} + +static int irda_iomux_deinit(void) +{ + gpio_free(IRDA_IRQ_PIN); + return 0; +} + +static struct irda_info rk29_irda_info = { + .intr_pin = IRDA_IRQ_PIN, + .iomux_init = irda_iomux_init, + .iomux_deinit = irda_iomux_deinit, + //.irda_pwr_ctl = bu92747guw_power_ctl, +}; + +static struct platform_device irda_device = { +#ifdef CONFIG_RK_IRDA_NET + .name = "rk_irda", +#else + .name = "bu92747_irda", +#endif + .id = -1, + .dev = { + .platform_data = &rk29_irda_info, + } +}; +#endif + + +//////////////////////////////////////////////////////////////////////////////////////// +//ION +//////////////////////////////////////////////////////////////////////////////////////// +#ifdef CONFIG_ION +#define ION_RESERVE_SIZE (80 * SZ_1M) +static struct ion_platform_data rk30_ion_pdata = { + .nr = 1, + .heaps = { + { + .type = ION_HEAP_TYPE_CARVEOUT, + .id = ION_NOR_HEAP_ID, + .name = "norheap", + .size = ION_RESERVE_SIZE, + } + }, +}; + +static struct platform_device device_ion = { + .name = "ion-rockchip", + .id = 0, + .dev = { + .platform_data = &rk30_ion_pdata, + }, +}; +#endif + +/************************************************************************************************** + * SDMMC devices, include the module of SD,MMC,and sdio.noted by xbw at 2012-03-05 +**************************************************************************************************/ +#ifdef CONFIG_SDMMC_RK29 +#include "../mach-rk30/board-rk3168-tb-sdmmc-conifg.c" +#include "../plat-rk/rk-sdmmc-ops.c" +#include "../plat-rk/rk-sdmmc-wifi.c" +#endif //endif ---#ifdef CONFIG_SDMMC_RK29 + +#ifdef CONFIG_SDMMC0_RK29 +static int rk29_sdmmc0_cfg_gpio(void) +{ +#ifdef CONFIG_SDMMC_RK29_OLD + iomux_set(MMC0_CMD); + iomux_set(MMC0_CLKOUT); + iomux_set(MMC0_D0); + iomux_set(MMC0_D1); + iomux_set(MMC0_D2); + iomux_set(MMC0_D3); + + iomux_set_gpio_mode(iomux_mode_to_gpio(MMC0_DETN)); + + gpio_request(RK30_PIN3_PA7, "sdmmc-power"); + gpio_direction_output(RK30_PIN3_PA7, GPIO_LOW); + +#else + rk29_sdmmc_set_iomux(0, 0xFFFF); + + #if defined(CONFIG_SDMMC0_RK29_SDCARD_DET_FROM_GPIO) + #if SDMMC_USE_NEW_IOMUX_API + iomux_set_gpio_mode(iomux_gpio_to_mode(RK29SDK_SD_CARD_DETECT_N)); + #else + rk30_mux_api_set(RK29SDK_SD_CARD_DETECT_PIN_NAME, RK29SDK_SD_CARD_DETECT_IOMUX_FGPIO); + #endif + #else + #if SDMMC_USE_NEW_IOMUX_API + iomux_set(MMC0_DETN); + #else + rk30_mux_api_set(RK29SDK_SD_CARD_DETECT_PIN_NAME, RK29SDK_SD_CARD_DETECT_IOMUX_FMUX); + #endif + #endif + +#if defined(CONFIG_SDMMC0_RK29_WRITE_PROTECT) + gpio_request(SDMMC0_WRITE_PROTECT_PIN, "sdmmc-wp"); + gpio_direction_input(SDMMC0_WRITE_PROTECT_PIN); +#endif + +#endif + + return 0; +} + +#define CONFIG_SDMMC0_USE_DMA +struct rk29_sdmmc_platform_data default_sdmmc0_data = { + .host_ocr_avail = + (MMC_VDD_25_26 | MMC_VDD_26_27 | MMC_VDD_27_28 | MMC_VDD_28_29 | + MMC_VDD_29_30 | MMC_VDD_30_31 | MMC_VDD_31_32 | MMC_VDD_32_33 | + MMC_VDD_33_34 | MMC_VDD_34_35 | MMC_VDD_35_36), + .host_caps = + (MMC_CAP_4_BIT_DATA | MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED), + .io_init = rk29_sdmmc0_cfg_gpio, + +#if !defined(CONFIG_SDMMC_RK29_OLD) + .set_iomux = rk29_sdmmc_set_iomux, +#endif + + .dma_name = "sd_mmc", +#ifdef CONFIG_SDMMC0_USE_DMA + .use_dma = 1, +#else + .use_dma = 0, +#endif + +#if defined(CONFIG_WIFI_COMBO_MODULE_CONTROL_FUNC) && defined(CONFIG_USE_SDMMC0_FOR_WIFI_DEVELOP_BOARD) + .status = rk29sdk_wifi_mmc0_status, + .register_status_notify = rk29sdk_wifi_mmc0_status_register, +#endif + +#if defined(RK29SDK_SD_CARD_PWR_EN) || (INVALID_GPIO != RK29SDK_SD_CARD_PWR_EN) + .power_en = RK29SDK_SD_CARD_PWR_EN, + .power_en_level = RK29SDK_SD_CARD_PWR_EN_LEVEL, +#else + .power_en = INVALID_GPIO, + .power_en_level = GPIO_LOW, +#endif + .enable_sd_wakeup = 0, + +#if defined(CONFIG_SDMMC0_RK29_WRITE_PROTECT) + .write_prt = SDMMC0_WRITE_PROTECT_PIN, + .write_prt_enalbe_level = SDMMC0_WRITE_PROTECT_ENABLE_VALUE; +#else + .write_prt = INVALID_GPIO, +#endif + + .det_pin_info = { + #if defined(RK29SDK_SD_CARD_DETECT_N) || (INVALID_GPIO != RK29SDK_SD_CARD_DETECT_N) + .io = RK29SDK_SD_CARD_DETECT_N, //INVALID_GPIO, + .enable = RK29SDK_SD_CARD_INSERT_LEVEL, + #ifdef RK29SDK_SD_CARD_DETECT_PIN_NAME + .iomux = { + .name = RK29SDK_SD_CARD_DETECT_PIN_NAME, + #ifdef RK29SDK_SD_CARD_DETECT_IOMUX_FGPIO + .fgpio = RK29SDK_SD_CARD_DETECT_IOMUX_FGPIO, + #endif + #ifdef RK29SDK_SD_CARD_DETECT_IOMUX_FMUX + .fmux = RK29SDK_SD_CARD_DETECT_IOMUX_FMUX, + #endif + }, + #endif + #else + .io = INVALID_GPIO, + .enable = GPIO_LOW, + #endif + }, + +}; +#endif // CONFIG_SDMMC0_RK29 + +#ifdef CONFIG_SDMMC1_RK29 +#define CONFIG_SDMMC1_USE_DMA +static int rk29_sdmmc1_cfg_gpio(void) +{ +#if defined(CONFIG_SDMMC_RK29_OLD) + iomux_set(MMC1_CMD); + iomux_set(MMC1_CLKOUT); + iomux_set(MMC1_D0); + iomux_set(MMC1_D1); + iomux_set(MMC1_D2); + iomux_set(MMC1_D3); +#else + +#if defined(CONFIG_SDMMC1_RK29_WRITE_PROTECT) + gpio_request(SDMMC1_WRITE_PROTECT_PIN, "sdio-wp"); + gpio_direction_input(SDMMC1_WRITE_PROTECT_PIN); +#endif + +#endif + + return 0; +} + +struct rk29_sdmmc_platform_data default_sdmmc1_data = { + .host_ocr_avail = + (MMC_VDD_25_26 | MMC_VDD_26_27 | MMC_VDD_27_28 | MMC_VDD_28_29 | + MMC_VDD_29_30 | MMC_VDD_30_31 | MMC_VDD_31_32 | MMC_VDD_32_33 | + MMC_VDD_33_34), + +#if !defined(CONFIG_USE_SDMMC1_FOR_WIFI_DEVELOP_BOARD) + .host_caps = (MMC_CAP_4_BIT_DATA | MMC_CAP_SDIO_IRQ | + MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED), +#else + .host_caps = + (MMC_CAP_4_BIT_DATA | MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED), +#endif + + .io_init = rk29_sdmmc1_cfg_gpio, + +#if !defined(CONFIG_SDMMC_RK29_OLD) + .set_iomux = rk29_sdmmc_set_iomux, +#endif + + .dma_name = "sdio", +#ifdef CONFIG_SDMMC1_USE_DMA + .use_dma = 1, +#else + .use_dma = 0, +#endif + +#if defined(CONFIG_WIFI_CONTROL_FUNC) || defined(CONFIG_WIFI_COMBO_MODULE_CONTROL_FUNC) + .status = rk29sdk_wifi_status, + .register_status_notify = rk29sdk_wifi_status_register, +#endif + +#if defined(CONFIG_SDMMC1_RK29_WRITE_PROTECT) + .write_prt = SDMMC1_WRITE_PROTECT_PIN, + .write_prt_enalbe_level = SDMMC1_WRITE_PROTECT_ENABLE_VALUE; +#else + .write_prt = INVALID_GPIO, +#endif + + #if defined(CONFIG_RK29_SDIO_IRQ_FROM_GPIO) + .sdio_INT_gpio = RK29SDK_WIFI_SDIO_CARD_INT, + #endif + + .det_pin_info = { +#if defined(CONFIG_USE_SDMMC1_FOR_WIFI_DEVELOP_BOARD) + #if defined(RK29SDK_SD_CARD_DETECT_N) || (INVALID_GPIO != RK29SDK_SD_CARD_DETECT_N) + .io = RK29SDK_SD_CARD_DETECT_N, + #else + .io = INVALID_GPIO, + #endif + + .enable = RK29SDK_SD_CARD_INSERT_LEVEL, + #ifdef RK29SDK_SD_CARD_DETECT_PIN_NAME + .iomux = { + .name = RK29SDK_SD_CARD_DETECT_PIN_NAME, + #ifdef RK29SDK_SD_CARD_DETECT_IOMUX_FGPIO + .fgpio = RK29SDK_SD_CARD_DETECT_IOMUX_FGPIO, + #endif + #ifdef RK29SDK_SD_CARD_DETECT_IOMUX_FMUX + .fmux = RK29SDK_SD_CARD_DETECT_IOMUX_FMUX, + #endif + }, + #endif + #else + .io = INVALID_GPIO, + .enable = GPIO_LOW, +#endif + }, + + .enable_sd_wakeup = 0, +}; +#endif //endif--#ifdef CONFIG_SDMMC1_RK29 + +//////////////////////////////////////////////////////////////////////////////////////// +//PMU +//////////////////////////////////////////////////////////////////////////////////////// +#ifdef CONFIG_RK30_PWM_REGULATOR +static int pwm_voltage_map[] = { + 800000,825000,850000, 875000,900000, 925000 ,950000, 975000,1000000, 1025000, 1050000, 1075000, 1100000, 1125000, 1150000, 1175000, 1200000, 1225000, 1250000, 1275000, 1300000, 1325000, 1350000,1375000 +}; +static struct regulator_consumer_supply pwm_dcdc1_consumers[] = { + { + .supply = "vdd_cpu", + } +}; + +struct regulator_init_data pwm_regulator_init_dcdc[1] = +{ + { + .constraints = { + .name = "PWM_DCDC1", + .min_uV = 600000, + .max_uV = 1800000, //0.6-1.8V + .apply_uV = true, + .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE, + }, + .num_consumer_supplies = ARRAY_SIZE(pwm_dcdc1_consumers), + .consumer_supplies = pwm_dcdc1_consumers, + }, +}; + +static struct pwm_platform_data pwm_regulator_info[1] = { + { + .pwm_id = 1, + .pwm_gpio = RK30_PIN3_PD4, + .pwm_iomux_pwm = PWM1, + .pwm_iomux_gpio = GPIO3_D4, + .pwm_voltage = 1100000, + .suspend_voltage = 1000000, + .min_uV = 800000, + .max_uV = 1375000, + .coefficient = 575, //57.5% + .pwm_voltage_map = pwm_voltage_map, + .init_data = &pwm_regulator_init_dcdc[0], + }, +}; + +struct platform_device pwm_regulator_device[1] = { + { + .name = "pwm-voltage-regulator", + .id = 0, + .dev = { + .platform_data = &pwm_regulator_info[0], + } + }, +}; +#endif + +#ifdef CONFIG_RK29_VMAC +#define PHY_PWR_EN_GPIO RK30_PIN1_PD6 +#include "board-rk30-sdk-vmac.c" +#endif + +#ifdef CONFIG_RFKILL_RK +// bluetooth rfkill device, its driver in net/rfkill/rfkill-rk.c +static struct rfkill_rk_platform_data rfkill_rk_platdata = { + .type = RFKILL_TYPE_BLUETOOTH, + + .poweron_gpio = { // BT_REG_ON + .io = INVALID_GPIO, //RK30_PIN3_PC7, + .enable = GPIO_HIGH, + .iomux = { + .name = "bt_poweron", + .fgpio = GPIO3_C7, + }, + }, + + .reset_gpio = { // BT_RST + .io = RK30_PIN3_PC7, // set io to INVALID_GPIO for disable it + .enable = GPIO_LOW, + .iomux = { + .name = "bt_reset", + .fgpio = GPIO3_C7, + }, + }, + + .wake_gpio = { // BT_WAKE, use to control bt's sleep and wakeup + .io = RK30_PIN3_PC6, // set io to INVALID_GPIO for disable it + .enable = GPIO_HIGH, + .iomux = { + .name = "bt_wake", + .fgpio = GPIO3_C6, + }, + }, + + .wake_host_irq = { // BT_HOST_WAKE, for bt wakeup host when it is in deep sleep + .gpio = { + .io = RK30_PIN0_PA5, // set io to INVALID_GPIO for disable it + .enable = GPIO_LOW, // set GPIO_LOW for falling, set 0 for rising + .iomux = { + .name = NULL, + }, + }, + }, + + .rts_gpio = { // UART_RTS, enable or disable BT's data coming + .io = RK30_PIN1_PA3, // set io to INVALID_GPIO for disable it + .enable = GPIO_LOW, + .iomux = { + .name = "bt_rts", + .fgpio = GPIO1_A3, + .fmux = UART0_RTSN, + }, + }, +}; + +static struct platform_device device_rfkill_rk = { + .name = "rfkill_rk", + .id = -1, + .dev = { + .platform_data = &rfkill_rk_platdata, + }, +}; +#endif + +#if defined(CONFIG_GPS_RK) +int rk_gps_io_init(void) +{ + printk("%s \n", __FUNCTION__); + + gpio_request(RK30_PIN1_PB5, NULL); + gpio_direction_output(RK30_PIN1_PB5, GPIO_LOW); + + iomux_set(GPS_RFCLK);//GPS_CLK + iomux_set(GPS_MAG);//GPS_MAG + iomux_set(GPS_SIG);//GPS_SIGN + + gpio_request(RK30_PIN1_PA6, NULL); + gpio_direction_output(RK30_PIN1_PA6, GPIO_LOW); + + gpio_request(RK30_PIN1_PA5, NULL); + gpio_direction_output(RK30_PIN1_PA5, GPIO_LOW); + + gpio_request(RK30_PIN1_PA7, NULL); + gpio_direction_output(RK30_PIN1_PA7, GPIO_LOW); + return 0; +} +int rk_gps_power_up(void) +{ + printk("%s \n", __FUNCTION__); + + return 0; +} + +int rk_gps_power_down(void) +{ + printk("%s \n", __FUNCTION__); + + return 0; +} + +int rk_gps_reset_set(int level) +{ + return 0; +} +int rk_enable_hclk_gps(void) +{ + struct clk *gps_aclk = NULL; + gps_aclk = clk_get(NULL, "aclk_gps"); + if(gps_aclk) { + clk_enable(gps_aclk); + clk_put(gps_aclk); + printk("%s \n", __FUNCTION__); + } + else + printk("get gps aclk fail\n"); + return 0; +} +int rk_disable_hclk_gps(void) +{ + struct clk *gps_aclk = NULL; + gps_aclk = clk_get(NULL, "aclk_gps"); + if(gps_aclk) { + //TO wait long enough until GPS ISR is finished. + msleep(5); + clk_disable(gps_aclk); + clk_put(gps_aclk); + printk("%s \n", __FUNCTION__); + } + else + printk("get gps aclk fail\n"); + return 0; +} +struct rk_gps_data rk_gps_info = { + .io_init = rk_gps_io_init, + .power_up = rk_gps_power_up, + .power_down = rk_gps_power_down, + .reset = rk_gps_reset_set, + .enable_hclk_gps = rk_enable_hclk_gps, + .disable_hclk_gps = rk_disable_hclk_gps, + .GpsSign = RK30_PIN1_PB3, + .GpsMag = RK30_PIN1_PB2, //GPIO index + .GpsClk = RK30_PIN1_PB4, //GPIO index + .GpsVCCEn = RK30_PIN1_PB5, //GPIO index + .GpsSpi_CSO = RK30_PIN1_PA4, //GPIO index + .GpsSpiClk = RK30_PIN1_PA5, //GPIO index + .GpsSpiMOSI = RK30_PIN1_PA7, //GPIO index + .GpsIrq = IRQ_GPS, + .GpsSpiEn = 0, + .GpsAdcCh = 2, + .u32GpsPhyAddr = RK30_GPS_PHYS, + .u32GpsPhySize = RK30_GPS_SIZE, +}; + +struct platform_device rk_device_gps = { + .name = "gps_hv5820b", + .id = -1, + .dev = { + .platform_data = &rk_gps_info, + } + }; +#endif + +#if defined(CONFIG_MT5931_MT6622) +static struct mt6622_platform_data mt6622_platdata = { + .power_gpio = { // BT_REG_ON + .io = RK30_PIN3_PD5, // set io to INVALID_GPIO for disable it + .enable = GPIO_HIGH, + .iomux = { + .name = NULL, + }, + }, + + .reset_gpio = { // BT_RST + .io = RK30_PIN0_PD7, + .enable = GPIO_HIGH, + .iomux = { + .name = NULL, + }, + }, + + .irq_gpio = { + .io = RK30_PIN3_PD2, + .enable = GPIO_HIGH, + .iomux = { + .name = NULL, + }, + } +}; + +static struct platform_device device_mt6622 = { + .name = "mt6622", + .id = -1, + .dev = { + .platform_data = &mt6622_platdata, + }, +}; +#endif + +static struct platform_device *devices[] __initdata = { +#ifdef CONFIG_ION + &device_ion, +#endif +#ifdef CONFIG_ANDROID_TIMED_GPIO + &rk29_device_vibrator, +#endif +#ifdef CONFIG_LEDS_GPIO_PLATFORM + &rk29_device_gpio_leds, +#endif +#ifdef CONFIG_RK_IRDA + &irda_device, +#endif +#if defined(CONFIG_WIFI_CONTROL_FUNC)||defined(CONFIG_WIFI_COMBO_MODULE_CONTROL_FUNC) + &rk29sdk_wifi_device, +#endif + +#if defined(CONFIG_MT6620) + &mt3326_device_gps, +#endif + +#ifdef CONFIG_RK29_SUPPORT_MODEM + &rk30_device_modem, +#endif +#if defined(CONFIG_MU509) + &rk29_device_mu509, +#endif +#if defined(CONFIG_MW100) + &rk29_device_mw100, +#endif +#if defined(CONFIG_MT6229) + &rk29_device_mt6229, +#endif +#if defined(CONFIG_BATTERY_RK30_ADC)||defined(CONFIG_BATTERY_RK30_ADC_FAC) + &rk30_device_adc_battery, +#endif +#ifdef CONFIG_RFKILL_RK + &device_rfkill_rk, +#endif +#ifdef CONFIG_GPS_RK + &rk_device_gps, +#endif +#if defined(CONFIG_ARCH_RK3188) + &device_mali, +#endif +#ifdef CONFIG_MT5931_MT6622 + &device_mt6622, +#endif +}; + +static int rk_platform_add_display_devices(void) +{ + struct platform_device *fb = NULL; //fb + struct platform_device *lcdc0 = NULL; //lcdc0 + struct platform_device *lcdc1 = NULL; //lcdc1 + struct platform_device *bl = NULL; //backlight +#ifdef CONFIG_FB_ROCKCHIP + fb = &device_fb; +#endif + +#if defined(CONFIG_LCDC0_RK3066B) || defined(CONFIG_LCDC0_RK3188) + lcdc0 = &device_lcdc0, +#endif + +#if defined(CONFIG_LCDC1_RK3066B) || defined(CONFIG_LCDC1_RK3188) + lcdc1 = &device_lcdc1, +#endif + +#ifdef CONFIG_BACKLIGHT_RK29_BL + bl = &rk29_device_backlight, +#endif + __rk_platform_add_display_devices(fb,lcdc0,lcdc1,bl); + + return 0; + +} + +// i2c +#ifdef CONFIG_I2C0_RK30 +static struct i2c_board_info __initdata i2c0_info[] = { +#if defined (CONFIG_COMPASS_AK8975) + { + .type = "ak8975", + .addr = 0x0d, + .flags = 0, + .irq = RK30_PIN3_PD7, + .platform_data = &akm8975_info, + }, +#endif +#if defined (CONFIG_GYRO_L3G4200D) + { + .type = "l3g4200d_gryo", + .addr = 0x69, + .flags = 0, + .irq = L3G4200D_INT_PIN, + .platform_data = &l3g4200d_info, + }, +#endif +#if defined (CONFIG_SND_SOC_RK1000) + { + .type = "rk1000_i2c_codec", + .addr = 0x60, + .flags = 0, + }, + { + .type = "rk1000_control", + .addr = 0x40, + .flags = 0, + }, +#endif +#if defined (CONFIG_SND_SOC_RT5640) + { + .type = "rt5640", + .addr = 0x1c, + .flags = 0, + }, +#endif + +#ifdef CONFIG_MFD_RK610 + { + .type = "rk610_ctl", + .addr = 0x40, + .flags = 0, + .platform_data = &rk610_ctl_pdata, + }, +#ifdef CONFIG_RK610_TVOUT + { + .type = "rk610_tvout", + .addr = 0x42, + .flags = 0, + }, +#endif +#ifdef CONFIG_HDMI_RK610 + { + .type = "rk610_hdmi", + .addr = 0x46, + .flags = 0, + .irq = INVALID_GPIO, + }, +#endif +#ifdef CONFIG_SND_SOC_RK610 + {//RK610_CODEC addr from 0x60 to 0x80 (0x60~0x80) + .type = "rk610_i2c_codec", + .addr = 0x60, + .flags = 0, + .platform_data = &rk610_codec_pdata, + }, +#endif +#endif + +}; +#endif + +int __sramdata g_pmic_type = 0; +#ifdef CONFIG_I2C1_RK30 +#ifdef CONFIG_MFD_WM831X_I2C +#define PMU_POWER_SLEEP RK30_PIN0_PA1 + +static struct pmu_info wm8326_dcdc_info[] = { + { + .name = "vdd_core", //logic + .min_uv = 1000000, + .max_uv = 1000000, + .suspend_vol = 950000, + }, + { + .name = "vdd_cpu", //arm + .min_uv = 1000000, + .max_uv = 1000000, + .suspend_vol = 950000, + }, + { + .name = "dcdc3", //ddr + .min_uv = 1150000, + .max_uv = 1150000, + .suspend_vol = 1150000, + }, + #ifdef CONFIG_MACH_RK3066_SDK + { + .name = "dcdc4", //vcc_io + .min_uv = 3300000, + .max_uv = 3300000, + .suspend_vol = 3000000, + }, + #else + { + .name = "dcdc4", //vcc_io + .min_uv = 3000000, + .max_uv = 3000000, + .suspend_vol = 2800000, + }, + #endif +}; + +static struct pmu_info wm8326_ldo_info[] = { + { + .name = "ldo1", //vcc18_cif + .min_uv = 1800000, + .max_uv = 1800000, + .suspend_vol = 1800000, + }, + { + .name = "ldo2", //vccio_wl + .min_uv = 1800000, + .max_uv = 1800000, + .suspend_vol = 1800000, + }, + { + .name = "ldo3", // + .min_uv = 1100000, + .max_uv = 1100000, + .suspend_vol = 1100000, + }, + { + .name = "ldo4", //vdd11 + .min_uv = 1000000, + .max_uv = 1000000, + .suspend_vol = 1000000, + }, + { + .name = "ldo5", //vcc25 + .min_uv = 1800000, + .max_uv = 1800000, + .suspend_vol = 1800000, + }, + { + .name = "ldo6", //vcc33 + .min_uv = 3300000, + .max_uv = 3300000, + .suspend_vol = 3300000, + }, + { + .name = "ldo7", //vcc28_cif + .min_uv = 2800000, + .max_uv = 2800000, + .suspend_vol = 2800000, + }, + { + .name = "ldo8", //vcca33 + .min_uv = 3300000, + .max_uv = 3300000, + .suspend_vol = 3300000, + }, + { + .name = "ldo9", //vcc_tp + .min_uv = 3300000, + .max_uv = 3300000, + .suspend_vol = 3300000, + }, + { + .name = "ldo10", //flash_io + .min_uv = 1800000, + .max_uv = 1800000, + .suspend_vol = 1800000, + }, +}; + +#include "../mach-rk30/board-pmu-wm8326.c" +#endif + +#ifdef CONFIG_MFD_TPS65910 +#define TPS65910_HOST_IRQ RK30_PIN0_PB3 + +#define PMU_POWER_SLEEP RK30_PIN0_PA1 + +static struct pmu_info tps65910_dcdc_info[] = { + { + .name = "vdd_core", //logic + .min_uv = 1100000, + .max_uv = 1100000, + }, + { + .name = "vdd2", //ddr + .min_uv = 1200000, + .max_uv = 1200000, + }, + { + .name = "vio", //vcc_io + .min_uv = 2500000, + .max_uv = 2500000, + }, + +}; +static struct pmu_info tps65910_ldo_info[] = { + { + .name = "vpll", //vdd10 + .min_uv = 1000000, + .max_uv = 1000000, + }, + { + .name = "vdig1", //vcc18_cif + .min_uv = 1800000, + .max_uv = 1800000, + }, + { + .name = "vdig2", //vdd_jetta + .min_uv = 1200000, + .max_uv = 1200000, + }, + { + .name = "vaux1", //vcc28_cif + .min_uv = 2800000, + .max_uv = 2800000, + }, + { + .name = "vaux2", //vcca33 + .min_uv = 3300000, + .max_uv = 3300000, + }, + { + .name = "vaux33", //vcc_tp + .min_uv = 3300000, + .max_uv = 3300000, + }, + { + .name = "vmmc", //vcc30 + .min_uv = 3000000, + .max_uv = 3000000, + }, + { + .name = "vdac", //vcc18 + .min_uv = 1800000, + .max_uv = 1800000, + }, + }; + +#include "../mach-rk30/board-pmu-tps65910.c" +#endif + +#ifdef CONFIG_REGULATOR_ACT8846 +#define PMU_POWER_SLEEP RK30_PIN0_PA1 +#define PMU_VSEL RK30_PIN3_PD3 +static struct pmu_info act8846_dcdc_info[] = { + { + .name = "act_dcdc1", //ddr + .min_uv = 1200000, + .max_uv = 1200000, + .suspend_vol = 1200000, + }, + { + .name = "vdd_core", //logic + .min_uv = 1000000, + .max_uv = 1000000, + #ifdef CONFIG_ACT8846_SUPPORT_RESET + .suspend_vol = 1200000, + #else + .suspend_vol = 900000, + #endif + + }, + { + .name = "vdd_cpu", //arm + .min_uv = 1000000, + .max_uv = 1000000, + #ifdef CONFIG_ACT8846_SUPPORT_RESET + .suspend_vol = 1200000, + #else + .suspend_vol = 900000, + #endif + + }, + { + .name = "act_dcdc4", //vccio + .min_uv = 3000000, + .max_uv = 3000000, + #ifdef CONFIG_ACT8846_SUPPORT_RESET + .suspend_vol = 3000000, + #else + .suspend_vol = 2800000, + #endif + + }, + +}; +static struct pmu_info act8846_ldo_info[] = { + { + .name = "act_ldo1", //vdd11 + .min_uv = 1000000, + .max_uv = 1000000, + }, + { + .name = "act_ldo2", //vdd12 + .min_uv = 1200000, + .max_uv = 1200000, + }, + { + .name = "act_ldo3", //vcc18_cif + .min_uv = 1800000, + .max_uv = 1800000, + }, + { + .name = "act_ldo4", //vcca33 + .min_uv = 3300000, + .max_uv = 3300000, + }, + { + .name = "act_ldo5", //vcctp + .min_uv = 3300000, + .max_uv = 3300000, + }, + { + .name = "act_ldo6", //vcc33 + .min_uv = 3300000, + .max_uv = 3300000, + }, + { + .name = "act_ldo7", //vccio_wl + .min_uv = 1800000, + .max_uv = 1800000, + }, + { + .name = "act_ldo8", //vcc28_cif + .min_uv = 2800000, + .max_uv = 2800000, + }, + }; + +#include "../mach-rk30/board-pmu-act8846.c" +#endif + +#ifdef CONFIG_MFD_RK808 +#define PMU_POWER_SLEEP RK30_PIN0_PA1 +#define RK808_HOST_IRQ RK30_PIN0_PB3 + +static struct pmu_info rk808_dcdc_info[] = { + { + .name = "vdd_cpu", //arm + .min_uv = 1000000, + .max_uv = 1000000, + .suspend_vol = 900000, + }, + { + .name = "vdd_core", //logic + .min_uv = 1000000, + .max_uv = 1000000, + .suspend_vol = 900000, + }, + { + .name = "rk_dcdc3", //ddr + .min_uv = 1200000, + .max_uv = 1200000, + .suspend_vol = 1200000, + }, + { + .name = "rk_dcdc4", //vccio + .min_uv = 3300000, + .max_uv = 3300000, + .suspend_vol = 3000000, + }, + +}; +static struct pmu_info rk808_ldo_info[] = { + { + .name = "rk_ldo1", //vcc33 + .min_uv = 3300000, + .max_uv = 3300000, + .suspend_vol = 3300000, + }, + { + .name = "rk_ldo2", //vcctp + .min_uv = 3300000, + .max_uv = 3300000, + .suspend_vol = 3300000, + + }, + { + .name = "rk_ldo3", //vdd10 + .min_uv = 1000000, + .max_uv = 1000000, + .suspend_vol = 1000000, + }, + { + .name = "rk_ldo4", //vcc18 + .min_uv = 1800000, + .max_uv = 1800000, + .suspend_vol = 1800000, + }, + { + .name = "rk_ldo5", //vcc28_cif + .min_uv = 2800000, + .max_uv = 2800000, + .suspend_vol = 2800000, + }, + { + .name = "rk_ldo6", //vdd12 + .min_uv = 1200000, + .max_uv = 1200000, + .suspend_vol = 1200000, + }, + { + .name = "rk_ldo7", //vcc18_cif + .min_uv = 1800000, + .max_uv = 1800000, + .suspend_vol = 1800000, + }, + { + .name = "rk_ldo8", //vcca_33 + .min_uv = 3300000, + .max_uv = 3300000, + .suspend_vol = 3300000, + }, + }; + +#include "board-pmu-rk808.c" +#endif + + +static struct i2c_board_info __initdata i2c1_info[] = { +#if defined (CONFIG_MFD_WM831X_I2C) + { + .type = "wm8326", + .addr = 0x34, + .flags = 0, + .irq = RK30_PIN0_PB3, + .platform_data = &wm831x_platdata, + }, +#endif +#if defined (CONFIG_MFD_TPS65910) + { + .type = "tps65910", + .addr = TPS65910_I2C_ID0, + .flags = 0, + .irq = TPS65910_HOST_IRQ, + .platform_data = &tps65910_data, + }, +#endif + +#if defined (CONFIG_REGULATOR_ACT8846) + { + .type = "act8846", + .addr = 0x5a, + .flags = 0, + // .irq = ACT8846_HOST_IRQ, + .platform_data=&act8846_data, + }, +#endif +#if defined (CONFIG_MFD_RK808) + { + .type = "rk808", + .addr = 0x1b, + .flags = 0, + // .irq = ACT8846_HOST_IRQ, + .platform_data=&rk808_data, + }, +#endif + +#if defined (CONFIG_RTC_HYM8563) + { + .type = "rtc_hym8563", + .addr = 0x51, + .flags = 0, + .irq = RK30_PIN1_PA4, + }, +#endif + +}; +#endif + +void __sramfunc board_pmu_suspend(void) +{ + #if defined (CONFIG_MFD_WM831X_I2C) + if(pmic_is_wm8326()) + board_pmu_wm8326_suspend(); + #endif + #if defined (CONFIG_MFD_TPS65910) + if(pmic_is_tps65910()) + board_pmu_tps65910_suspend(); + #endif + #if defined (CONFIG_REGULATOR_ACT8846) + if(pmic_is_act8846()) + board_pmu_act8846_suspend(); + #endif + #if defined (CONFIG_MFD_RK808) + if(pmic_is_rk808()) + board_pmu_rk808_suspend(); + #endif + +} + +void __sramfunc board_pmu_resume(void) +{ + #if defined (CONFIG_MFD_WM831X_I2C) + if(pmic_is_wm8326()) + board_pmu_wm8326_resume(); + #endif + #if defined (CONFIG_MFD_TPS65910) + if(pmic_is_tps65910()) + board_pmu_tps65910_resume(); + #endif + #if defined (CONFIG_REGULATOR_ACT8846) + if(pmic_is_act8846()) + board_pmu_act8846_resume(); + #endif + #if defined (CONFIG_MFD_RK808) + if(pmic_is_rk808()) + board_pmu_rk808_resume(); + #endif + +} + + int __sramdata gpio3d6_iomux,gpio3d6_do,gpio3d6_dir,gpio3d6_en; + +#define grf_readl(offset) readl_relaxed(RK30_GRF_BASE + offset) +#define grf_writel(v, offset) do { writel_relaxed(v, RK30_GRF_BASE + offset); dsb(); } while (0) + +void __sramfunc rk30_pwm_logic_suspend_voltage(void) +{ +#ifdef CONFIG_RK30_PWM_REGULATOR + +// int gpio0d7_iomux,gpio0d7_do,gpio0d7_dir,gpio0d7_en; + sram_udelay(10000); + gpio3d6_iomux = grf_readl(GRF_GPIO3D_IOMUX); + gpio3d6_do = grf_readl(GRF_GPIO3H_DO); + gpio3d6_dir = grf_readl(GRF_GPIO3H_DIR); + gpio3d6_en = grf_readl(GRF_GPIO3H_EN); + + grf_writel((1<<28), GRF_GPIO3D_IOMUX); + grf_writel((1<<30)|(1<<14), GRF_GPIO3H_DIR); + grf_writel((1<<30)|(1<<14), GRF_GPIO3H_DO); + grf_writel((1<<30)|(1<<14), GRF_GPIO3H_EN); +#endif +} +void __sramfunc rk30_pwm_logic_resume_voltage(void) +{ +#ifdef CONFIG_RK30_PWM_REGULATOR + grf_writel((1<<28)|gpio3d6_iomux, GRF_GPIO3D_IOMUX); + grf_writel((1<<30)|gpio3d6_en, GRF_GPIO3H_EN); + grf_writel((1<<30)|gpio3d6_dir, GRF_GPIO3H_DIR); + grf_writel((1<<30)|gpio3d6_do, GRF_GPIO3H_DO); + sram_udelay(10000); + +#endif + +} +extern void pwm_suspend_voltage(void); +extern void pwm_resume_voltage(void); +void rk30_pwm_suspend_voltage_set(void) +{ +#ifdef CONFIG_RK30_PWM_REGULATOR + pwm_suspend_voltage(); +#endif +} +void rk30_pwm_resume_voltage_set(void) +{ +#ifdef CONFIG_RK30_PWM_REGULATOR + pwm_resume_voltage(); +#endif +} + + +#ifdef CONFIG_I2C2_RK30 +static struct i2c_board_info __initdata i2c2_info[] = { +#if defined (CONFIG_LS_CM3217) + { + .type = "lightsensor", + .addr = 0x10, + .flags = 0, + .platform_data = &cm3217_info, + }, +#endif +}; +#endif + +#ifdef CONFIG_I2C3_RK30 +static struct i2c_board_info __initdata i2c3_info[] = { +}; +#endif + +#ifdef CONFIG_I2C4_RK30 +static struct i2c_board_info __initdata i2c4_info[] = { + +}; +#endif + +#ifdef CONFIG_I2C_GPIO_RK30 +#define I2C_SDA_PIN INVALID_GPIO// RK30_PIN2_PD6 //set sda_pin here +#define I2C_SCL_PIN INVALID_GPIO//RK30_PIN2_PD7 //set scl_pin here +static int rk30_i2c_io_init(void) +{ + //set iomux (gpio) here + //rk30_mux_api_set(GPIO2D7_I2C1SCL_NAME, GPIO2D_GPIO2D7); + //rk30_mux_api_set(GPIO2D6_I2C1SDA_NAME, GPIO2D_GPIO2D6); + + return 0; +} +struct i2c_gpio_platform_data default_i2c_gpio_data = { + .sda_pin = I2C_SDA_PIN, + .scl_pin = I2C_SCL_PIN, + .udelay = 5, // clk = 500/udelay = 100Khz + .timeout = 100,//msecs_to_jiffies(100), + .bus_num = 5, + .io_init = rk30_i2c_io_init, +}; +static struct i2c_board_info __initdata i2c_gpio_info[] = { +}; +#endif + +static void __init rk30_i2c_register_board_info(void) +{ +#ifdef CONFIG_I2C0_RK30 + i2c_register_board_info(0, i2c0_info, ARRAY_SIZE(i2c0_info)); +#endif +#ifdef CONFIG_I2C1_RK30 + i2c_register_board_info(1, i2c1_info, ARRAY_SIZE(i2c1_info)); +#endif +#ifdef CONFIG_I2C2_RK30 + i2c_register_board_info(2, i2c2_info, ARRAY_SIZE(i2c2_info)); +#endif +#ifdef CONFIG_I2C3_RK30 + i2c_register_board_info(3, i2c3_info, ARRAY_SIZE(i2c3_info)); +#endif +#ifdef CONFIG_I2C4_RK30 + i2c_register_board_info(4, i2c4_info, ARRAY_SIZE(i2c4_info)); +#endif +#ifdef CONFIG_I2C_GPIO_RK30 + i2c_register_board_info(5, i2c_gpio_info, ARRAY_SIZE(i2c_gpio_info)); +#endif +} +//end of i2c + +//#define POWER_ON_PIN RK30_PIN0_PA0 //power_hold +static void rk30_pm_power_off(void) +{ + printk(KERN_ERR "rk30_pm_power_off start...\n"); + #if defined(CONFIG_MFD_WM831X) + if(pmic_is_wm8326()){ + wm831x_set_bits(Wm831x,WM831X_GPIO_LEVEL,0x0001,0x0000); //set sys_pwr 0 + wm831x_device_shutdown(Wm831x);//wm8326 shutdown + } + #endif + + #if defined(CONFIG_REGULATOR_ACT8846) + if(pmic_is_act8846()) + { + act8846_device_shutdown(); + } + #endif + + #if defined(CONFIG_MFD_TPS65910) + if(pmic_is_tps65910()) + { + tps65910_device_shutdown();//tps65910 shutdown + } + #endif + + #if defined(CONFIG_MFD_RK808) + if(pmic_is_rk808()) + { + rk808_device_shutdown();//rk808 shutdown + } + #endif + + //gpio_direction_output(POWER_ON_PIN, GPIO_LOW); + port_output_off(pwr_on); + while (1); +} + + +static int __init tp_board_init(void) +{ + int i; + struct port_config irq_port; + struct port_config rst_port; + int ret = check_tp_param(); + + if(ret < 0) + return ret; + + irq_port = get_port_config(tp_irq); + rst_port = get_port_config(tp_rst); +#if defined (CONFIG_TOUCHSCREEN_GSLX680_RK3168) + if(tp_type == TP_TYPE_GSLX680){ + gslx680_data.irq_pin = irq_port.gpio; + gslx680_info.addr = tp_addr; + gslx680_data.reset_pin= rst_port.gpio; + gslx680_data.x_max=tp_xmax; + gslx680_data.y_max=tp_ymax; + gslx680_data.firmVer=tp_firmVer; + i2c_register_board_info(tp_i2c, &gslx680_info, 1); + } +#endif + +#if defined (CONFIG_TOUCHSCREEN_86V_GT811_IIC) + if(tp_type == TP_TYPE_GT811_86V){ + gt811_data.irq_pin = irq_port.gpio; + gt811_info.addr = tp_addr; + gt811_data.reset_pin= rst_port.gpio; + gt811_data.x_max=tp_xmax; + gt811_data.y_max=tp_ymax; + i2c_register_board_info(tp_i2c, >811_info, 1); + } +#endif + +#if defined(CONFIG_TOUCHSCREEN_GT8XX) + if(tp_type == TP_TYPE_GT8XX){ + goodix_data.irq_pin = irq_port.gpio; + goodix_info.addr = tp_addr; + goodix_data.reset_pin= rst_port.gpio; + goodix_data.x_max=tp_xmax; + goodix_data.y_max=tp_ymax; + i2c_register_board_info(tp_i2c, &goodix_info, 1); + } +#endif + return 0; +} + + +static int __init codec_board_init(void) +{ + struct port_config spk_port; + struct port_config hp_port; + struct port_config hdmi_irq_port; + int ret = check_codec_param(); + + if(ret < 0) + return ret; + + spk_port = get_port_config(spk_ctl); + hp_port = get_port_config(hp_det); + +#if defined (CONFIG_SND_RK29_SOC_RT5631) + if(codec_type == CODEC_TYPE_RT5631){ + rt5631_data.spk_pin = spk_port.gpio; + rt5631_info.addr = codec_addr; + rt5631_data.hp_pin= hp_port.gpio; + i2c_register_board_info(codec_i2c, &rt5631_info, 1); + } +#endif + +#if defined (CONFIG_SND_RK29_SOC_ES8323) + if(codec_type == CODEC_TYPE_ES8323){ + es8323_data.spk_pin = spk_port.gpio; + es8323_info.addr = codec_addr; + es8323_data.hp_pin= hp_port.gpio; + i2c_register_board_info(codec_i2c, &es8323_info, 1); + } +#endif + +#if defined (CONFIG_MFD_RK616) +if(codec_type == CODEC_TYPE_RK616){ + rk616_pdata.spk_ctl_gpio = spk_port.gpio; + rk616_info.addr = codec_addr; + rk616_pdata.hdmi_irq= get_port_config(codec_hdmi_irq).gpio; + i2c_register_board_info(codec_i2c, &rk616_info, 1); + } +#endif + return 0; +} + +static int __init chg_board_init(void) +{ + int i; + int ret = check_chg_param(); + if(ret < 0) + return ret; +#ifdef CONFIG_BATTERY_RK30_ADC_FAC + //rk30_adc_battery_platdata.adc_channel = chg_adc; + if(dc_det != -1){ + rk30_adc_battery_platdata.dc_det_pin = get_port_config(dc_det).gpio; + printk("rk30_adc_battery_platdata.dc_det_pin %d %d",rk30_adc_battery_platdata.dc_det_pin,RK30_PIN0_PB2); + rk30_adc_battery_platdata.dc_det_level = !get_port_config(dc_det).io.active_low; + } + else{ + rk30_adc_battery_platdata.dc_det_pin=INVALID_GPIO; + } + if(bat_low != -1){ + rk30_adc_battery_platdata.batt_low_pin = get_port_config(bat_low).gpio; + rk30_adc_battery_platdata.batt_low_level = !get_port_config(bat_low).io.active_low; + } + else{ + rk30_adc_battery_platdata.batt_low_pin=INVALID_GPIO; + } + if(chg_ok != -1){ + rk30_adc_battery_platdata.charge_ok_pin = get_port_config(chg_ok).gpio; + rk30_adc_battery_platdata.charge_ok_level = !get_port_config(chg_ok).io.active_low; + } + else{ + rk30_adc_battery_platdata.charge_ok_pin=INVALID_GPIO; + } + if(chg_set != -1){ + rk30_adc_battery_platdata.charge_set_pin = get_port_config(chg_set).gpio; + rk30_adc_battery_platdata.charge_set_level = !get_port_config(chg_set).io.active_low; + } + else{ + rk30_adc_battery_platdata.charge_set_pin=INVALID_GPIO; + } + if(usb_det!= -1){ + rk30_adc_battery_platdata.usb_det_pin = get_port_config(chg_set).gpio; + rk30_adc_battery_platdata.usb_det_level = !get_port_config(chg_set).io.active_low; + } + else{ + rk30_adc_battery_platdata.usb_det_pin=INVALID_GPIO; + } + + if(ref_vol!= -1){ + rk30_adc_battery_platdata.reference_voltage=ref_vol; + } + + if(up_res!= -1){ + rk30_adc_battery_platdata.pull_up_res=up_res; + } + if(down_res!= -1){ + rk30_adc_battery_platdata.pull_down_res=down_res; + } + if(root_chg!= -1){ + rk30_adc_battery_platdata.is_reboot_charging=root_chg; + } + if(save_cap!= -1){ + rk30_adc_battery_platdata.save_capacity=save_cap; + } + if(low_vol!= -1){ + rk30_adc_battery_platdata.low_voltage_protection=low_vol; + } + + for(i=0;i<11;i++) + { + rk30_adc_battery_platdata.chargeArray[i]=bat_charge[i]; + rk30_adc_battery_platdata.dischargeArray[i]=bat_discharge[i]; + } +#endif + return 0; +} + +static int __init gs_board_init(void) +{ + int i; + struct port_config port; + int ret = check_gs_param(); + if(ret < 0) + return ret; + port = get_port_config(gs_irq); +//mma7660 +#if defined (CONFIG_GS_MMA7660) + if(gs_type == GS_TYPE_MMA7660){ + + mma7660_info.irq = port.gpio; + mma7660_info.addr = gs_addr; + for(i = 0; i < 9; i++) + mma7660_data.orientation[i] = gs_orig[i]; + i2c_register_board_info(gs_i2c, &mma7660_info, 1); + } +#endif + +#if defined (CONFIG_GS_LIS3DH) + if(gs_type == GS_TYPE_LIS3DH){ + lis3dh_info.irq = port.gpio; + lis3dh_info.addr = gs_addr; + for(i = 0; i < 9; i++) + lis3dh_data.orientation[i] = gs_orig[i]; + i2c_register_board_info(gs_i2c, &lis3dh_info, 1); + } +#endif + +#if defined (CONFIG_GS_MXC6225) + if(gs_type == GS_TYPE_MXC6225){ + mxc6225_info.irq = port.gpio; + mxc6225_info.addr = gs_addr; + for(i = 0; i < 9; i++) + mxc6225_data.orientation[i] = gs_orig[i]; + i2c_register_board_info(gs_i2c, &mxc6225_info, 1); + } +#endif + +#if defined (CONFIG_GS_DMT10) + if(gs_type == GS_TYPE_DMARAD10){ + dmt10_info.irq = port.gpio; + dmt10_info.addr = gs_addr; + for(i = 0; i < 9; i++) + dmt10_data.orientation[i] = gs_orig[i]; + i2c_register_board_info(gs_i2c, &dmt10_info, 1); + } +#endif + + + return 0; +} + +static int __init bl_board_init(void){ + int ret = check_bl_param(); + if(ret < 0) + return ret; + + switch(bl_pwmid) + { + case 0: + bl_pwm_mode = PWM0; + break; + case 1: + bl_pwm_mode = PWM1; + break; + case 2: + bl_pwm_mode = PWM2; + break; + case 3: + bl_pwm_mode = PWM3; + break; + } + + rk29_bl_info.pwm_id = bl_pwmid; + rk29_bl_info.brightness_mode=bl_mode; + rk29_bl_info.pre_div=bl_div; + rk29_bl_info.bl_ref = bl_ref; + rk29_bl_info.min_brightness=bl_min; + rk29_bl_info.max_brightness=bl_max; + + + return 0; +} + +static int __init lcd_board_init(void) +{ + return check_lcd_param(); +} + +static int __init key_board_init(void){ + int i; + struct port_config port; + for(i = 0; i < key_val_size; i++){ + if(key_val[i] & (1<<31)){ + key_button[i].adc_value = key_val[i] & 0xffff; + key_button[i].gpio = INVALID_GPIO; + }else{ + port = get_port_config(key_val[i]); + key_button[i].gpio = port.gpio; + key_button[i].active_low = port.io.active_low; + } + } + rk29_keys_pdata.nbuttons = key_val_size; + rk29_keys_pdata.chn = key_adc; + return 0; +} + +static int __init wifi_board_init(void) +{ + return check_wifi_param(); +} + + +static int __init rk_config_init(void) +{ + int ret = 0; + ret = lcd_board_init(); + if(ret < 0) + INIT_ERR("lcd"); + + ret = bl_board_init(); + if(ret < 0) + INIT_ERR("backlight"); + + ret = tp_board_init(); + if(ret < 0) + INIT_ERR("tp"); + + ret = gs_board_init(); + if(ret < 0) + INIT_ERR("gsensor"); + + ret = codec_board_init(); + if(ret < 0) + INIT_ERR("codec"); + + ret = key_board_init(); + if(ret < 0) + INIT_ERR("key"); + + ret = chg_board_init(); + if(ret < 0) + INIT_ERR("charge"); + + ret = wifi_board_init(); + if(ret < 0) + INIT_ERR("wifi"); + + return 0; +} + +static void __init machine_rk30_board_init(void) +{ + //avs_init(); + rk_power_on(); + rk_config_init(); + pm_power_off = rk30_pm_power_off; + + rk30_i2c_register_board_info(); + spi_register_board_info(board_spi_devices, ARRAY_SIZE(board_spi_devices)); + platform_add_devices(devices, ARRAY_SIZE(devices)); + rk_platform_add_display_devices(); + board_usb_detect_init(RK30_PIN0_PA7); + +#if defined(CONFIG_WIFI_CONTROL_FUNC) + rk29sdk_wifi_bt_gpio_control_init(); +#elif defined(CONFIG_WIFI_COMBO_MODULE_CONTROL_FUNC) + rk29sdk_wifi_combo_module_gpio_init(); +#endif + +#if defined(CONFIG_MT6620) + clk_set_rate(clk_get_sys("rk_serial.0", "uart"), 48*1000000); +#endif + +#if defined(CONFIG_MT5931_MT6622) + clk_set_rate(clk_get_sys("rk_serial.0", "uart"), 24*1000000); +#endif +} +#define HD_SCREEN_SIZE 1920UL*1200UL*4*3 +static void __init rk30_reserve(void) +{ + size_t fbsize=get_fb_size(); +#if defined(CONFIG_ARCH_RK3188) + /*if lcd resolution great than or equal to 1920*1200,reserve the ump memory */ + if(!(fbsize < ALIGN(HD_SCREEN_SIZE,SZ_1M))) + { + int ump_mem_phy_size=512UL*1024UL*1024UL; + resource_mali[0].start = board_mem_reserve_add("ump buf", ump_mem_phy_size); + resource_mali[0].end = resource_mali[0].start + ump_mem_phy_size -1; + } +#endif +#ifdef CONFIG_ION + rk30_ion_pdata.heaps[0].base = board_mem_reserve_add("ion", ION_RESERVE_SIZE); +#endif +#ifdef CONFIG_FB_ROCKCHIP + resource_fb[0].start = board_mem_reserve_add("fb0 buf", fbsize); + resource_fb[0].end = resource_fb[0].start + fbsize- 1; +#if 0 + resource_fb[1].start = board_mem_reserve_add("ipp buf", RK30_FB0_MEM_SIZE); + resource_fb[1].end = resource_fb[1].start + RK30_FB0_MEM_SIZE - 1; +#endif + +#if defined(CONFIG_FB_ROTATE) || !defined(CONFIG_THREE_FB_BUFFER) + resource_fb[2].start = board_mem_reserve_add("fb2 buf",fbsize); + resource_fb[2].end = resource_fb[2].start + fbsize - 1; +#endif +#endif + +#ifdef CONFIG_VIDEO_RK29 + rk30_camera_request_reserve_mem(); +#endif + +#ifdef CONFIG_GPS_RK + //it must be more than 8MB + rk_gps_info.u32MemoryPhyAddr = board_mem_reserve_add("gps", SZ_8M); +#endif + board_mem_reserved(); +} +/******************************** arm dvfs frequency volt table **********************************/ +/** + * dvfs_cpu_logic_table: table for arm and logic dvfs + * @frequency : arm frequency + * @cpu_volt : arm voltage depend on frequency + */ + +#if defined(CONFIG_ARCH_RK3188) +//sdk +static struct cpufreq_frequency_table dvfs_arm_table_volt_level0[] = { + {.frequency = 312 * 1000, .index = 850 * 1000}, + {.frequency = 504 * 1000, .index = 900 * 1000}, + {.frequency = 816 * 1000, .index = 950 * 1000}, + {.frequency = 1008 * 1000, .index = 1025 * 1000}, + {.frequency = 1200 * 1000, .index = 1100 * 1000}, + {.frequency = 1416 * 1000, .index = 1200 * 1000}, + {.frequency = 1608 * 1000, .index = 1300 * 1000}, + {.frequency = CPUFREQ_TABLE_END}, +}; +//default +static struct cpufreq_frequency_table dvfs_arm_table_volt_level1[] = { + {.frequency = 312 * 1000, .index = 875 * 1000}, + {.frequency = 504 * 1000, .index = 925 * 1000}, + {.frequency = 816 * 1000, .index = 975 * 1000}, + {.frequency = 1008 * 1000, .index = 1075 * 1000}, + {.frequency = 1200 * 1000, .index = 1150 * 1000}, + {.frequency = 1416 * 1000, .index = 1250 * 1000}, + {.frequency = 1608 * 1000, .index = 1350 * 1000}, + {.frequency = CPUFREQ_TABLE_END}, +}; +// cube 10' +static struct cpufreq_frequency_table dvfs_arm_table_volt_level2[] = { + {.frequency = 312 * 1000, .index = 900 * 1000}, + {.frequency = 504 * 1000, .index = 925 * 1000}, + {.frequency = 816 * 1000, .index = 1000 * 1000}, + {.frequency = 1008 * 1000, .index = 1075 * 1000}, + {.frequency = 1200 * 1000, .index = 1200 * 1000}, + {.frequency = 1416 * 1000, .index = 1250 * 1000}, + {.frequency = 1608 * 1000, .index = 1350 * 1000}, + {.frequency = CPUFREQ_TABLE_END}, +}; + +/******************************** gpu dvfs frequency volt table **********************************/ +//sdk +static struct cpufreq_frequency_table dvfs_gpu_table_volt_level0[] = { + {.frequency = 133 * 1000, .index = 975 * 1000},//the mininum rate is limited 133M for rk3188 + {.frequency = 200 * 1000, .index = 975 * 1000}, + {.frequency = 266 * 1000, .index = 1000 * 1000}, + {.frequency = 300 * 1000, .index = 1050 * 1000}, + {.frequency = 400 * 1000, .index = 1100 * 1000}, + {.frequency = 600 * 1000, .index = 1200 * 1000}, + {.frequency = CPUFREQ_TABLE_END}, +}; +//cube 10' +static struct cpufreq_frequency_table dvfs_gpu_table_volt_level1[] = { + {.frequency = 133 * 1000, .index = 975 * 1000},//the mininum rate is limited 133M for rk3188 + {.frequency = 200 * 1000, .index = 1000 * 1000}, + {.frequency = 266 * 1000, .index = 1025 * 1000}, + {.frequency = 300 * 1000, .index = 1050 * 1000}, + {.frequency = 400 * 1000, .index = 1100 * 1000}, + {.frequency = 600 * 1000, .index = 1250 * 1000}, + {.frequency = CPUFREQ_TABLE_END}, +}; + +/******************************** ddr dvfs frequency volt table **********************************/ +static struct cpufreq_frequency_table dvfs_ddr_table_volt_level0[] = { + {.frequency = 200 * 1000 + DDR_FREQ_SUSPEND, .index = 950 * 1000}, + {.frequency = 300 * 1000 + DDR_FREQ_VIDEO, .index = 1000 * 1000}, + {.frequency = 396 * 1000 + DDR_FREQ_NORMAL, .index = 1100 * 1000}, + {.frequency = 460 * 1000 + DDR_FREQ_DUALVIEW, .index = 1150 * 1000}, + {.frequency = CPUFREQ_TABLE_END}, +}; + +//if you board is good for volt quality,select dvfs_arm_table_volt_level0 +#define dvfs_arm_table dvfs_arm_table_volt_level1 +#define dvfs_gpu_table dvfs_gpu_table_volt_level1 +#define dvfs_ddr_table dvfs_ddr_table_volt_level0 + +#else +//for RK3168 && RK3066B +static struct cpufreq_frequency_table dvfs_arm_table[] = { + {.frequency = 312 * 1000, .index = 950 * 1000}, + {.frequency = 504 * 1000, .index = 1000 * 1000}, + {.frequency = 816 * 1000, .index = 1050 * 1000}, + {.frequency = 1008 * 1000, .index = 1125 * 1000}, + {.frequency = 1200 * 1000, .index = 1200 * 1000}, + //{.frequency = 1416 * 1000, .index = 1250 * 1000}, + //{.frequency = 1608 * 1000, .index = 1300 * 1000}, + {.frequency = CPUFREQ_TABLE_END}, +}; + +static struct cpufreq_frequency_table dvfs_gpu_table[] = { + {.frequency = 100 * 1000, .index = 1000 * 1000}, + {.frequency = 200 * 1000, .index = 1000 * 1000}, + {.frequency = 266 * 1000, .index = 1050 * 1000}, + //{.frequency = 300 * 1000, .index = 1050 * 1000}, + {.frequency = 400 * 1000, .index = 1125 * 1000}, + {.frequency = CPUFREQ_TABLE_END}, +}; + +static struct cpufreq_frequency_table dvfs_ddr_table[] = { + {.frequency = 200 * 1000 + DDR_FREQ_SUSPEND, .index = 1000 * 1000}, + {.frequency = 300 * 1000 + DDR_FREQ_VIDEO, .index = 1050 * 1000}, + {.frequency = 400 * 1000 + DDR_FREQ_NORMAL, .index = 1100 * 1000}, + {.frequency = CPUFREQ_TABLE_END}, +}; +#endif +/******************************** arm dvfs frequency volt table end **********************************/ +//#define DVFS_CPU_TABLE_SIZE (ARRAY_SIZE(dvfs_cpu_logic_table)) +//static struct cpufreq_frequency_table cpu_dvfs_table[DVFS_CPU_TABLE_SIZE]; +//static struct cpufreq_frequency_table dep_cpu2core_table[DVFS_CPU_TABLE_SIZE]; + +void __init board_clock_init(void) +{ + rk30_clock_data_init(periph_pll_default, codec_pll_default, RK30_CLOCKS_DEFAULT_FLAGS); + //dvfs_set_arm_logic_volt(dvfs_cpu_logic_table, cpu_dvfs_table, dep_cpu2core_table); + dvfs_set_freq_volt_table(clk_get(NULL, "cpu"), dvfs_arm_table); + dvfs_set_freq_volt_table(clk_get(NULL, "gpu"), dvfs_gpu_table); + dvfs_set_freq_volt_table(clk_get(NULL, "ddr"), dvfs_ddr_table); +} + +MACHINE_START(RK30, "RK30board") + .boot_params = PLAT_PHYS_OFFSET + 0x800, + .fixup = rk30_fixup, + .reserve = &rk30_reserve, + .map_io = rk30_map_io, + .init_irq = rk30_init_irq, + .timer = &rk30_timer, + .init_machine = machine_rk30_board_init, +MACHINE_END -- 2.34.1