From fa4677b483b85217ac216f7e8d401c40cbe348aa Mon Sep 17 00:00:00 2001 From: Jakob Stoklund Olesen Date: Tue, 28 Apr 2009 16:34:09 +0000 Subject: [PATCH] Move getSubRegisterRegClass from ScheduleDagSDNodesEmit.cpp to a TargetRegisterClass method. Also make the method non-asserting. It will return NULL when given an invalid subreg index. The method is needed by an upcoming patch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70296 91177308-0d34-0410-b5e6-96231b3b80d8 --- include/llvm/Target/TargetRegisterInfo.h | 10 ++++++++++ .../SelectionDAG/ScheduleDAGSDNodesEmit.cpp | 17 +++-------------- 2 files changed, 13 insertions(+), 14 deletions(-) diff --git a/include/llvm/Target/TargetRegisterInfo.h b/include/llvm/Target/TargetRegisterInfo.h index 8229bccc0f8..590491aeb80 100644 --- a/include/llvm/Target/TargetRegisterInfo.h +++ b/include/llvm/Target/TargetRegisterInfo.h @@ -148,6 +148,16 @@ public: return I; } + /// getSubRegisterRegClass - Return the register class of subregisters with + /// index SubIdx, or NULL if no such class exists. + const TargetRegisterClass* getSubRegisterRegClass(unsigned SubIdx) const { + assert(SubIdx>0 && "Invalid subregister index"); + for (unsigned s = 0; s != SubIdx-1; ++s) + if (!SubRegClasses[s]) + return NULL; + return SubRegClasses[SubIdx-1]; + } + /// superregclasses_begin / superregclasses_end - Loop over all of /// the superreg register classes of this register class. sc_iterator superregclasses_begin() const { diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodesEmit.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodesEmit.cpp index eddf44f1fb2..dc8cbb19d0f 100644 --- a/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodesEmit.cpp +++ b/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodesEmit.cpp @@ -329,18 +329,6 @@ void ScheduleDAGSDNodes::AddOperand(MachineInstr *MI, SDValue Op, } } -/// getSubRegisterRegClass - Returns the register class of specified register -/// class' "SubIdx"'th sub-register class. -static const TargetRegisterClass* -getSubRegisterRegClass(const TargetRegisterClass *TRC, unsigned SubIdx) { - // Pick the register class of the subregister - TargetRegisterInfo::regclass_iterator I = - TRC->subregclasses_begin() + SubIdx-1; - assert(I < TRC->subregclasses_end() && - "Invalid subregister index for register class"); - return *I; -} - /// getSuperRegisterRegClass - Returns the register class of a superreg A whose /// "SubIdx"'th sub-register class is the specified register class and whose /// type matches the specified type. @@ -350,7 +338,7 @@ getSuperRegisterRegClass(const TargetRegisterClass *TRC, // Pick the register class of the superegister for this type for (TargetRegisterInfo::regclass_iterator I = TRC->superregclasses_begin(), E = TRC->superregclasses_end(); I != E; ++I) - if ((*I)->hasType(VT) && getSubRegisterRegClass(*I, SubIdx) == TRC) + if ((*I)->hasType(VT) && (*I)->getSubRegisterRegClass(SubIdx) == TRC) return *I; assert(false && "Couldn't find the register class"); return 0; @@ -388,7 +376,8 @@ void ScheduleDAGSDNodes::EmitSubregNode(SDNode *Node, // Figure out the register class to create for the destreg. unsigned VReg = getVR(Node->getOperand(0), VRBaseMap); const TargetRegisterClass *TRC = MRI.getRegClass(VReg); - const TargetRegisterClass *SRC = getSubRegisterRegClass(TRC, SubIdx); + const TargetRegisterClass *SRC = TRC->getSubRegisterRegClass(SubIdx); + assert(SRC && "Invalid subregister index in EXTRACT_SUBREG"); // Figure out the register class to create for the destreg. // Note that if we're going to directly use an existing register, -- 2.34.1