From fd55bcd060f9ba91b5173597c7bdd0fd87ba88c7 Mon Sep 17 00:00:00 2001 From: Marek Olsak Date: Tue, 27 Jan 2015 17:27:15 +0000 Subject: [PATCH] R600/SI: Enable all tests that pass on VI without changes git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227214 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/CodeGen/R600/128bit-kernel-args.ll | 1 + test/CodeGen/R600/32-bit-local-address-space.ll | 1 + test/CodeGen/R600/add-debug.ll | 1 + test/CodeGen/R600/add.ll | 1 + test/CodeGen/R600/address-space.ll | 1 + test/CodeGen/R600/and.ll | 1 + test/CodeGen/R600/anyext.ll | 1 + test/CodeGen/R600/atomic_load_add.ll | 1 + test/CodeGen/R600/atomic_load_sub.ll | 1 + test/CodeGen/R600/basic-branch.ll | 1 + test/CodeGen/R600/basic-loop.ll | 1 + test/CodeGen/R600/bfi_int.ll | 1 + test/CodeGen/R600/bitcast.ll | 1 + test/CodeGen/R600/bswap.ll | 1 + test/CodeGen/R600/build_vector.ll | 1 + test/CodeGen/R600/call.ll | 1 + test/CodeGen/R600/concat_vectors.ll | 1 + test/CodeGen/R600/copy-illegal-type.ll | 1 + test/CodeGen/R600/copy-to-reg.ll | 1 + test/CodeGen/R600/ctlz_zero_undef.ll | 1 + test/CodeGen/R600/cttz-ctlz.ll | 1 + test/CodeGen/R600/cttz_zero_undef.ll | 1 + test/CodeGen/R600/cvt_f32_ubyte.ll | 1 + test/CodeGen/R600/cvt_flr_i32_f32.ll | 1 + test/CodeGen/R600/cvt_rpi_i32_f32.ll | 1 + test/CodeGen/R600/default-fp-mode.ll | 7 +++++++ test/CodeGen/R600/ds_read2_offset_order.ll | 1 + test/CodeGen/R600/elf.ll | 2 ++ test/CodeGen/R600/empty-function.ll | 1 + test/CodeGen/R600/extload.ll | 1 + test/CodeGen/R600/extract_vector_elt_i16.ll | 1 + test/CodeGen/R600/fadd.ll | 1 + test/CodeGen/R600/fadd64.ll | 1 + test/CodeGen/R600/fceil.ll | 1 + test/CodeGen/R600/fcmp64.ll | 1 + test/CodeGen/R600/fconst64.ll | 1 + test/CodeGen/R600/fdiv.ll | 1 + test/CodeGen/R600/fdiv64.ll | 1 + test/CodeGen/R600/ffloor.ll | 1 + test/CodeGen/R600/flat-address-space.ll | 2 ++ test/CodeGen/R600/fma.f64.ll | 1 + test/CodeGen/R600/fmax3.ll | 1 + test/CodeGen/R600/fmaxnum.f64.ll | 1 + test/CodeGen/R600/fmaxnum.ll | 1 + test/CodeGen/R600/fmin3.ll | 2 ++ test/CodeGen/R600/fminnum.f64.ll | 1 + test/CodeGen/R600/fminnum.ll | 1 + test/CodeGen/R600/fmul.ll | 1 + test/CodeGen/R600/fmul64.ll | 1 + test/CodeGen/R600/fnearbyint.ll | 1 + test/CodeGen/R600/fneg-fabs.f64.ll | 1 + test/CodeGen/R600/fneg-fabs.ll | 1 + test/CodeGen/R600/fp-classify.ll | 1 + test/CodeGen/R600/fp16_to_fp.ll | 1 + test/CodeGen/R600/fp32_to_fp16.ll | 1 + test/CodeGen/R600/fp_to_sint.ll | 1 + test/CodeGen/R600/fp_to_uint.ll | 1 + test/CodeGen/R600/fpext.ll | 1 + test/CodeGen/R600/fptrunc.ll | 1 + test/CodeGen/R600/fsqrt.ll | 2 ++ test/CodeGen/R600/fsub.ll | 1 + test/CodeGen/R600/fsub64.ll | 1 + test/CodeGen/R600/ftrunc.ll | 1 + test/CodeGen/R600/global-directive.ll | 1 + test/CodeGen/R600/global-extload-i1.ll | 1 + test/CodeGen/R600/global-extload-i16.ll | 1 + test/CodeGen/R600/global-extload-i32.ll | 1 + test/CodeGen/R600/global-extload-i8.ll | 1 + test/CodeGen/R600/global-zero-initializer.ll | 1 + test/CodeGen/R600/half.ll | 1 + test/CodeGen/R600/i1-copy-implicit-def.ll | 1 + test/CodeGen/R600/i1-copy-phi.ll | 1 + test/CodeGen/R600/icmp64.ll | 1 + test/CodeGen/R600/indirect-addressing-si.ll | 1 + test/CodeGen/R600/indirect-private-64.ll | 2 ++ test/CodeGen/R600/infinite-loop.ll | 1 + test/CodeGen/R600/inline-asm.ll | 1 + test/CodeGen/R600/inline-calls.ll | 1 + test/CodeGen/R600/insert_subreg.ll | 1 + test/CodeGen/R600/insert_vector_elt.ll | 1 + test/CodeGen/R600/large-alloca.ll | 1 + test/CodeGen/R600/large-constant-initializer.ll | 1 + test/CodeGen/R600/lds-initializer.ll | 1 + test/CodeGen/R600/lds-zero-initializer.ll | 1 + test/CodeGen/R600/llvm.AMDGPU.abs.ll | 1 + test/CodeGen/R600/llvm.AMDGPU.bfe.i32.ll | 1 + test/CodeGen/R600/llvm.AMDGPU.bfe.u32.ll | 1 + test/CodeGen/R600/llvm.AMDGPU.bfi.ll | 1 + test/CodeGen/R600/llvm.AMDGPU.bfm.ll | 1 + test/CodeGen/R600/llvm.AMDGPU.brev.ll | 1 + test/CodeGen/R600/llvm.AMDGPU.clamp.ll | 1 + test/CodeGen/R600/llvm.AMDGPU.cvt_f32_ubyte.ll | 1 + test/CodeGen/R600/llvm.AMDGPU.fract.ll | 1 + test/CodeGen/R600/llvm.AMDGPU.imad24.ll | 1 + test/CodeGen/R600/llvm.AMDGPU.imax.ll | 1 + test/CodeGen/R600/llvm.AMDGPU.imin.ll | 1 + test/CodeGen/R600/llvm.AMDGPU.imul24.ll | 1 + test/CodeGen/R600/llvm.AMDGPU.kill.ll | 1 + test/CodeGen/R600/llvm.AMDGPU.ldexp.ll | 1 + test/CodeGen/R600/llvm.AMDGPU.rcp.f64.ll | 1 + test/CodeGen/R600/llvm.AMDGPU.rcp.ll | 3 +++ test/CodeGen/R600/llvm.AMDGPU.rsq.ll | 1 + test/CodeGen/R600/llvm.AMDGPU.trig_preop.ll | 1 + test/CodeGen/R600/llvm.AMDGPU.trunc.ll | 1 + test/CodeGen/R600/llvm.AMDGPU.umax.ll | 1 + test/CodeGen/R600/llvm.AMDGPU.umin.ll | 1 + test/CodeGen/R600/llvm.AMDGPU.umul24.ll | 1 + test/CodeGen/R600/llvm.SI.fs.interp.constant.ll | 1 + test/CodeGen/R600/llvm.SI.gather4.ll | 1 + test/CodeGen/R600/llvm.SI.getlod.ll | 1 + test/CodeGen/R600/llvm.SI.image.ll | 1 + test/CodeGen/R600/llvm.SI.image.sample.ll | 1 + test/CodeGen/R600/llvm.SI.image.sample.o.ll | 1 + test/CodeGen/R600/llvm.SI.imageload.ll | 1 + test/CodeGen/R600/llvm.SI.load.dword.ll | 1 + test/CodeGen/R600/llvm.SI.resinfo.ll | 1 + test/CodeGen/R600/llvm.SI.sample-masked.ll | 1 + test/CodeGen/R600/llvm.SI.sample.ll | 1 + test/CodeGen/R600/llvm.SI.sampled.ll | 1 + test/CodeGen/R600/llvm.SI.sendmsg.ll | 1 + test/CodeGen/R600/llvm.SI.tbuffer.store.ll | 1 + test/CodeGen/R600/llvm.amdgpu.kilp.ll | 1 + test/CodeGen/R600/llvm.amdgpu.lrp.ll | 1 + test/CodeGen/R600/llvm.cos.ll | 1 + test/CodeGen/R600/llvm.exp2.ll | 1 + test/CodeGen/R600/llvm.log2.ll | 1 + test/CodeGen/R600/llvm.memcpy.ll | 1 + test/CodeGen/R600/llvm.rint.ll | 1 + test/CodeGen/R600/llvm.sin.ll | 2 ++ test/CodeGen/R600/llvm.sqrt.ll | 1 + test/CodeGen/R600/load-i1.ll | 1 + test/CodeGen/R600/load.ll | 1 + test/CodeGen/R600/load.vec.ll | 1 + test/CodeGen/R600/load64.ll | 1 + test/CodeGen/R600/loop-idiom.ll | 1 + test/CodeGen/R600/lshl.ll | 1 + test/CodeGen/R600/lshr.ll | 1 + test/CodeGen/R600/m0-spill.ll | 1 + test/CodeGen/R600/mad_int24.ll | 1 + test/CodeGen/R600/mad_uint24.ll | 1 + test/CodeGen/R600/mul.ll | 1 + test/CodeGen/R600/mul_int24.ll | 1 + test/CodeGen/R600/mul_uint24.ll | 1 + test/CodeGen/R600/mulhu.ll | 1 + test/CodeGen/R600/no-initializer-constant-addrspace.ll | 1 + test/CodeGen/R600/or.ll | 1 + test/CodeGen/R600/private-memory-atomics.ll | 1 + test/CodeGen/R600/private-memory-broken.ll | 1 + test/CodeGen/R600/reorder-stores.ll | 1 + test/CodeGen/R600/rotl.i64.ll | 1 + test/CodeGen/R600/rotl.ll | 1 + test/CodeGen/R600/rotr.i64.ll | 1 + test/CodeGen/R600/rotr.ll | 1 + test/CodeGen/R600/s_movk_i32.ll | 1 + test/CodeGen/R600/saddo.ll | 1 + test/CodeGen/R600/scalar_to_vector.ll | 1 + test/CodeGen/R600/schedule-vs-if-nested-loop-failure.ll | 1 + test/CodeGen/R600/sdiv.ll | 1 + test/CodeGen/R600/sdivrem24.ll | 1 + test/CodeGen/R600/select-i1.ll | 1 + test/CodeGen/R600/select-vectors.ll | 1 + test/CodeGen/R600/select64.ll | 1 + test/CodeGen/R600/selectcc-opt.ll | 1 + test/CodeGen/R600/selectcc.ll | 1 + test/CodeGen/R600/setcc64.ll | 1 + test/CodeGen/R600/seto.ll | 1 + test/CodeGen/R600/setuo.ll | 1 + test/CodeGen/R600/sgpr-copy-duplicate-operand.ll | 1 + test/CodeGen/R600/sgpr-copy.ll | 1 + test/CodeGen/R600/shl.ll | 1 + test/CodeGen/R600/shl_add_ptr.ll | 1 + test/CodeGen/R600/si-annotate-cf-assertion.ll | 1 + test/CodeGen/R600/si-lod-bias.ll | 1 + test/CodeGen/R600/si-sgpr-spill.ll | 1 + test/CodeGen/R600/si-vector-hang.ll | 1 + test/CodeGen/R600/sign_extend.ll | 1 + test/CodeGen/R600/simplify-demanded-bits-build-pair.ll | 1 + test/CodeGen/R600/sint_to_fp.ll | 1 + test/CodeGen/R600/sra.ll | 1 + test/CodeGen/R600/srem.ll | 1 + test/CodeGen/R600/ssubo.ll | 1 + test/CodeGen/R600/store-v3i32.ll | 1 + test/CodeGen/R600/store-v3i64.ll | 1 + test/CodeGen/R600/store-vector-ptrs.ll | 1 + test/CodeGen/R600/store.ll | 1 + test/CodeGen/R600/subreg-coalescer-crash.ll | 1 + test/CodeGen/R600/trunc-cmp-constant.ll | 1 + test/CodeGen/R600/trunc-store-i1.ll | 1 + test/CodeGen/R600/uaddo.ll | 1 + test/CodeGen/R600/udiv.ll | 1 + test/CodeGen/R600/udivrem.ll | 1 + test/CodeGen/R600/udivrem24.ll | 1 + test/CodeGen/R600/udivrem64.ll | 1 + test/CodeGen/R600/uint_to_fp.ll | 1 + test/CodeGen/R600/unaligned-load-store.ll | 1 + test/CodeGen/R600/unhandled-loop-condition-assertion.ll | 1 + test/CodeGen/R600/urecip.ll | 1 + test/CodeGen/R600/urem.ll | 1 + test/CodeGen/R600/usubo.ll | 1 + test/CodeGen/R600/v_cndmask.ll | 1 + test/CodeGen/R600/vector-alloca.ll | 2 ++ test/CodeGen/R600/vop-shrink.ll | 1 + test/CodeGen/R600/vselect.ll | 1 + test/CodeGen/R600/wait.ll | 1 + test/CodeGen/R600/xor.ll | 1 + test/CodeGen/R600/zero_extend.ll | 1 + 206 files changed, 221 insertions(+) diff --git a/test/CodeGen/R600/128bit-kernel-args.ll b/test/CodeGen/R600/128bit-kernel-args.ll index 3b3fee05af7..2d7740b5158 100644 --- a/test/CodeGen/R600/128bit-kernel-args.ll +++ b/test/CodeGen/R600/128bit-kernel-args.ll @@ -1,5 +1,6 @@ ; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s --check-prefix=R600-CHECK ; RUN: llc < %s -march=amdgcn -mcpu=SI -verify-machineinstrs | FileCheck %s --check-prefix=SI-CHECK +; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s --check-prefix=SI-CHECK ; R600-CHECK: {{^}}v4i32_kernel_arg: ; R600-CHECK-DAG: MOV {{[* ]*}}T[[GPR:[0-9]]].X, KC0[3].Y diff --git a/test/CodeGen/R600/32-bit-local-address-space.ll b/test/CodeGen/R600/32-bit-local-address-space.ll index 6ab0c08d505..71940fd88f2 100644 --- a/test/CodeGen/R600/32-bit-local-address-space.ll +++ b/test/CodeGen/R600/32-bit-local-address-space.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=verde -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s ; On Southern Islands GPUs the local address space(3) uses 32-bit pointers and ; the global address space(1) uses 64-bit pointers. These tests check to make sure diff --git a/test/CodeGen/R600/add-debug.ll b/test/CodeGen/R600/add-debug.ll index 85e9451d4a9..a83c689eb18 100644 --- a/test/CodeGen/R600/add-debug.ll +++ b/test/CodeGen/R600/add-debug.ll @@ -1,4 +1,5 @@ ; RUN: llc < %s -march=amdgcn -mcpu=tahiti -debug +; RUN: llc < %s -march=amdgcn -mcpu=tonga -debug ; REQUIRES: asserts ; Check that SelectionDAGDumper does not crash on int_SI_if. diff --git a/test/CodeGen/R600/add.ll b/test/CodeGen/R600/add.ll index d95853a6104..850f376a4a4 100644 --- a/test/CodeGen/R600/add.ll +++ b/test/CodeGen/R600/add.ll @@ -1,5 +1,6 @@ ; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=EG-CHECK --check-prefix=FUNC %s ; RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck --check-prefix=SI-CHECK --check-prefix=FUNC %s +; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck --check-prefix=SI-CHECK --check-prefix=FUNC %s ;FUNC-LABEL: {{^}}test1: ;EG-CHECK: ADD_INT {{[* ]*}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} diff --git a/test/CodeGen/R600/address-space.ll b/test/CodeGen/R600/address-space.ll index 1106f4f9962..aaa0628ccdc 100644 --- a/test/CodeGen/R600/address-space.ll +++ b/test/CodeGen/R600/address-space.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck %s ; Test that codegenprepare understands address space sizes diff --git a/test/CodeGen/R600/and.ll b/test/CodeGen/R600/and.ll index bfdf8734eab..7a395ccb38d 100644 --- a/test/CodeGen/R600/and.ll +++ b/test/CodeGen/R600/and.ll @@ -1,5 +1,6 @@ ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s ; RUN: llc -march=amdgcn -mcpu=verde -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s ; FUNC-LABEL: {{^}}test2: ; EG: AND_INT {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} diff --git a/test/CodeGen/R600/anyext.ll b/test/CodeGen/R600/anyext.ll index 8336ebcaca3..48d8f312249 100644 --- a/test/CodeGen/R600/anyext.ll +++ b/test/CodeGen/R600/anyext.ll @@ -1,4 +1,5 @@ ; RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck %s +; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s ; CHECK-LABEL: {{^}}anyext_i1_i32: ; CHECK: v_cndmask_b32_e64 diff --git a/test/CodeGen/R600/atomic_load_add.ll b/test/CodeGen/R600/atomic_load_add.ll index 6dd1c51afb4..5fe05f2996a 100644 --- a/test/CodeGen/R600/atomic_load_add.ll +++ b/test/CodeGen/R600/atomic_load_add.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck %s -check-prefix=SI -check-prefix=FUNC +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck %s -check-prefix=SI -check-prefix=FUNC ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=R600 -check-prefix=FUNC %s ; FUNC-LABEL: {{^}}atomic_add_local: diff --git a/test/CodeGen/R600/atomic_load_sub.ll b/test/CodeGen/R600/atomic_load_sub.ll index 5d47185421a..40722833d26 100644 --- a/test/CodeGen/R600/atomic_load_sub.ll +++ b/test/CodeGen/R600/atomic_load_sub.ll @@ -1,5 +1,6 @@ ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=R600 -check-prefix=FUNC %s ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s ; FUNC-LABEL: {{^}}atomic_sub_local: ; R600: LDS_SUB * diff --git a/test/CodeGen/R600/basic-branch.ll b/test/CodeGen/R600/basic-branch.ll index 42ddddd2ed8..abdc4afef47 100644 --- a/test/CodeGen/R600/basic-branch.ll +++ b/test/CodeGen/R600/basic-branch.ll @@ -1,5 +1,6 @@ ; XFAIL: * ; RUN: llc -O0 -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck %s +; RUN: llc -O0 -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck %s ; CHECK-LABEL: {{^}}test_branch( define void @test_branch(i32 addrspace(1)* noalias %out, i32 addrspace(1)* noalias %in, i32 %val) nounwind { diff --git a/test/CodeGen/R600/basic-loop.ll b/test/CodeGen/R600/basic-loop.ll index 9d0509b38d8..f0263caf5d6 100644 --- a/test/CodeGen/R600/basic-loop.ll +++ b/test/CodeGen/R600/basic-loop.ll @@ -1,4 +1,5 @@ ; RUN: llc -O0 -verify-machineinstrs -march=amdgcn -mcpu=SI < %s | FileCheck %s +; RUN: llc -O0 -verify-machineinstrs -march=amdgcn -mcpu=tonga < %s | FileCheck %s ; CHECK-LABEL: {{^}}test_loop: define void @test_loop(i32 addrspace(1)* noalias %out, i32 addrspace(1)* noalias %in, i32 %val) nounwind { diff --git a/test/CodeGen/R600/bfi_int.ll b/test/CodeGen/R600/bfi_int.ll index 988a2f85e0e..8e1c7db175f 100644 --- a/test/CodeGen/R600/bfi_int.ll +++ b/test/CodeGen/R600/bfi_int.ll @@ -1,5 +1,6 @@ ; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=R600-CHECK %s ; RUN: llc < %s -march=amdgcn -mcpu=SI -verify-machineinstrs | FileCheck --check-prefix=SI-CHECK %s +; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck --check-prefix=SI-CHECK %s ; BFI_INT Definition pattern from ISA docs ; (y & x) | (z & ~x) diff --git a/test/CodeGen/R600/bitcast.ll b/test/CodeGen/R600/bitcast.ll index 3607d519f01..1ba64af7dca 100644 --- a/test/CodeGen/R600/bitcast.ll +++ b/test/CodeGen/R600/bitcast.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s ; This test just checks that the compiler doesn't crash. diff --git a/test/CodeGen/R600/bswap.ll b/test/CodeGen/R600/bswap.ll index 65998f5f115..e93543de49d 100644 --- a/test/CodeGen/R600/bswap.ll +++ b/test/CodeGen/R600/bswap.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s declare i32 @llvm.bswap.i32(i32) nounwind readnone declare <2 x i32> @llvm.bswap.v2i32(<2 x i32>) nounwind readnone diff --git a/test/CodeGen/R600/build_vector.ll b/test/CodeGen/R600/build_vector.ll index a0ebe089bd5..f5089f3daba 100644 --- a/test/CodeGen/R600/build_vector.ll +++ b/test/CodeGen/R600/build_vector.ll @@ -1,5 +1,6 @@ ; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s --check-prefix=R600-CHECK ; RUN: llc < %s -march=amdgcn -mcpu=SI -verify-machineinstrs | FileCheck %s --check-prefix=SI-CHECK +; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s --check-prefix=SI-CHECK ; R600-CHECK: {{^}}build_vector2: ; R600-CHECK: MOV diff --git a/test/CodeGen/R600/call.ll b/test/CodeGen/R600/call.ll index 1afe98ba595..6de51f1475a 100644 --- a/test/CodeGen/R600/call.ll +++ b/test/CodeGen/R600/call.ll @@ -1,4 +1,5 @@ ; RUN: not llc -march=amdgcn -mcpu=SI -verify-machineinstrs< %s 2>&1 | FileCheck %s +; RUN: not llc -march=amdgcn -mcpu=tonga -verify-machineinstrs< %s 2>&1 | FileCheck %s ; RUN: not llc -march=r600 -mcpu=cypress < %s 2>&1 | FileCheck %s ; CHECK: error: unsupported call to function external_function in test_call_external diff --git a/test/CodeGen/R600/concat_vectors.ll b/test/CodeGen/R600/concat_vectors.ll index 4c5b9c95951..6b3fae384db 100644 --- a/test/CodeGen/R600/concat_vectors.ll +++ b/test/CodeGen/R600/concat_vectors.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s ; FUNC-LABEL: {{^}}test_concat_v1i32: ; 0x80f000 is the high 32 bits of the resource descriptor used by MUBUF diff --git a/test/CodeGen/R600/copy-illegal-type.ll b/test/CodeGen/R600/copy-illegal-type.ll index 2dff24c432b..56c43d23b4a 100644 --- a/test/CodeGen/R600/copy-illegal-type.ll +++ b/test/CodeGen/R600/copy-illegal-type.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=tahiti < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s ; FUNC-LABEL: {{^}}test_copy_v4i8: ; SI: buffer_load_dword [[REG:v[0-9]+]] diff --git a/test/CodeGen/R600/copy-to-reg.ll b/test/CodeGen/R600/copy-to-reg.ll index 4a414356710..9c1de73b3b1 100644 --- a/test/CodeGen/R600/copy-to-reg.ll +++ b/test/CodeGen/R600/copy-to-reg.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=SI -mattr=-promote-alloca -verify-machineinstrs < %s +; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-promote-alloca -verify-machineinstrs < %s ; Test that CopyToReg instructions don't have non-register operands prior ; to being emitted. diff --git a/test/CodeGen/R600/ctlz_zero_undef.ll b/test/CodeGen/R600/ctlz_zero_undef.ll index 090610d4aac..1a4317b8095 100644 --- a/test/CodeGen/R600/ctlz_zero_undef.ll +++ b/test/CodeGen/R600/ctlz_zero_undef.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s ; RUN: llc -march=r600 -mcpu=cypress -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s declare i32 @llvm.ctlz.i32(i32, i1) nounwind readnone diff --git a/test/CodeGen/R600/cttz-ctlz.ll b/test/CodeGen/R600/cttz-ctlz.ll index 6be06d243ea..c957a033c5d 100644 --- a/test/CodeGen/R600/cttz-ctlz.ll +++ b/test/CodeGen/R600/cttz-ctlz.ll @@ -1,4 +1,5 @@ ; RUN: opt -S -codegenprepare -mtriple=r600-unknown-unknown -mcpu=SI < %s | FileCheck -check-prefix=SI -check-prefix=ALL %s +; RUN: opt -S -codegenprepare -mtriple=r600-unknown-unknown -mcpu=tonga < %s | FileCheck -check-prefix=SI -check-prefix=ALL %s define i64 @test1(i64 %A) { diff --git a/test/CodeGen/R600/cttz_zero_undef.ll b/test/CodeGen/R600/cttz_zero_undef.ll index ab59360694b..d9d284c5886 100644 --- a/test/CodeGen/R600/cttz_zero_undef.ll +++ b/test/CodeGen/R600/cttz_zero_undef.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s ; RUN: llc -march=r600 -mcpu=cypress -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s declare i32 @llvm.cttz.i32(i32, i1) nounwind readnone diff --git a/test/CodeGen/R600/cvt_f32_ubyte.ll b/test/CodeGen/R600/cvt_f32_ubyte.ll index e26ee12f6f6..afcc95e465e 100644 --- a/test/CodeGen/R600/cvt_f32_ubyte.ll +++ b/test/CodeGen/R600/cvt_f32_ubyte.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s ; SI-LABEL: {{^}}load_i8_to_f32: ; SI: buffer_load_ubyte [[LOADREG:v[0-9]+]], diff --git a/test/CodeGen/R600/cvt_flr_i32_f32.ll b/test/CodeGen/R600/cvt_flr_i32_f32.ll index b997a5f6253..04a1f256c73 100644 --- a/test/CodeGen/R600/cvt_flr_i32_f32.ll +++ b/test/CodeGen/R600/cvt_flr_i32_f32.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=SI < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s declare float @llvm.fabs.f32(float) #1 declare float @llvm.floor.f32(float) #1 diff --git a/test/CodeGen/R600/cvt_rpi_i32_f32.ll b/test/CodeGen/R600/cvt_rpi_i32_f32.ll index c273ae93afe..22c65de6e9d 100644 --- a/test/CodeGen/R600/cvt_rpi_i32_f32.ll +++ b/test/CodeGen/R600/cvt_rpi_i32_f32.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=SI < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s declare float @llvm.fabs.f32(float) #1 declare float @llvm.floor.f32(float) #1 diff --git a/test/CodeGen/R600/default-fp-mode.ll b/test/CodeGen/R600/default-fp-mode.ll index 6b6d49996eb..da8e91454b9 100644 --- a/test/CodeGen/R600/default-fp-mode.ll +++ b/test/CodeGen/R600/default-fp-mode.ll @@ -5,6 +5,13 @@ ; RUN: llc -march=amdgcn -mcpu=SI < %s | FileCheck -check-prefix=DEFAULT -check-prefix=FUNC %s ; RUN: llc -march=amdgcn -mcpu=SI -mattr=-fp32-denormals < %s | FileCheck -check-prefix=DEFAULT -check-prefix=FUNC %s ; RUN: llc -march=amdgcn -mcpu=SI -mattr=+fp64-denormals < %s | FileCheck -check-prefix=DEFAULT -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-fp32-denormals,+fp64-denormals < %s | FileCheck -check-prefix=FP64-DENORMAL -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga -mattr=+fp32-denormals,-fp64-denormals < %s | FileCheck -check-prefix=FP32-DENORMAL -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga -mattr=+fp32-denormals,+fp64-denormals < %s | FileCheck -check-prefix=BOTH-DENORMAL -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-fp32-denormals,-fp64-denormals < %s | FileCheck -check-prefix=NO-DENORMAL -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga < %s | FileCheck -check-prefix=DEFAULT -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-fp32-denormals < %s | FileCheck -check-prefix=DEFAULT -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga -mattr=+fp64-denormals < %s | FileCheck -check-prefix=DEFAULT -check-prefix=FUNC %s ; FUNC-LABEL: {{^}}test_kernel: diff --git a/test/CodeGen/R600/ds_read2_offset_order.ll b/test/CodeGen/R600/ds_read2_offset_order.ll index bdbe22ff234..44306bc9d38 100644 --- a/test/CodeGen/R600/ds_read2_offset_order.ll +++ b/test/CodeGen/R600/ds_read2_offset_order.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=bonaire -verify-machineinstrs -mattr=+load-store-opt -enable-misched < %s | FileCheck -strict-whitespace -check-prefix=SI %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs -mattr=+load-store-opt -enable-misched < %s | FileCheck -strict-whitespace -check-prefix=SI %s ; XFAIL: * diff --git a/test/CodeGen/R600/elf.ll b/test/CodeGen/R600/elf.ll index ec28ed9c1dc..d1979671bb3 100644 --- a/test/CodeGen/R600/elf.ll +++ b/test/CodeGen/R600/elf.ll @@ -1,5 +1,7 @@ ; RUN: llc < %s -march=amdgcn -mcpu=SI -verify-machineinstrs -filetype=obj | llvm-readobj -s -symbols - | FileCheck --check-prefix=ELF-CHECK %s ; RUN: llc < %s -march=amdgcn -mcpu=SI -verify-machineinstrs -o - | FileCheck --check-prefix=CONFIG-CHECK %s +; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs -filetype=obj | llvm-readobj -s -symbols - | FileCheck --check-prefix=ELF-CHECK %s +; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs -o - | FileCheck --check-prefix=CONFIG-CHECK %s ; ELF-CHECK: Format: ELF32 ; ELF-CHECK: Name: .AMDGPU.config diff --git a/test/CodeGen/R600/empty-function.ll b/test/CodeGen/R600/empty-function.ll index 4b81d971d06..b5593eb87ae 100644 --- a/test/CodeGen/R600/empty-function.ll +++ b/test/CodeGen/R600/empty-function.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s ; Make sure we don't assert on empty functions diff --git a/test/CodeGen/R600/extload.ll b/test/CodeGen/R600/extload.ll index 45c5d44992a..77e5dc3dc97 100644 --- a/test/CodeGen/R600/extload.ll +++ b/test/CodeGen/R600/extload.ll @@ -1,5 +1,6 @@ ; RUN: llc -march=r600 -mcpu=cypress < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s ; FUNC-LABEL: {{^}}anyext_load_i8: ; EG: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+.[XYZW]]], diff --git a/test/CodeGen/R600/extract_vector_elt_i16.ll b/test/CodeGen/R600/extract_vector_elt_i16.ll index 04c375a89ae..0774a9ae852 100644 --- a/test/CodeGen/R600/extract_vector_elt_i16.ll +++ b/test/CodeGen/R600/extract_vector_elt_i16.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s ; FUNC-LABEL: {{^}}extract_vector_elt_v2i16: ; SI: buffer_load_ushort diff --git a/test/CodeGen/R600/fadd.ll b/test/CodeGen/R600/fadd.ll index 9d29c062962..365af9b73cc 100644 --- a/test/CodeGen/R600/fadd.ll +++ b/test/CodeGen/R600/fadd.ll @@ -1,5 +1,6 @@ ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck %s -check-prefix=R600 -check-prefix=FUNC ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck %s -check-prefix=SI -check-prefix=FUNC +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck %s -check-prefix=SI -check-prefix=FUNC ; FUNC-LABEL: {{^}}fadd_f32: ; R600: ADD {{\** *}}T{{[0-9]+\.[XYZW]}}, KC0[2].Z, KC0[2].W diff --git a/test/CodeGen/R600/fadd64.ll b/test/CodeGen/R600/fadd64.ll index 389c754c9e8..f1f6fef5476 100644 --- a/test/CodeGen/R600/fadd64.ll +++ b/test/CodeGen/R600/fadd64.ll @@ -1,4 +1,5 @@ ; RUN: llc < %s -march=amdgcn -mcpu=tahiti -verify-machineinstrs | FileCheck %s +; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s ; CHECK: {{^}}fadd_f64: ; CHECK: v_add_f64 {{v[[0-9]+:[0-9]+]}}, {{v[[0-9]+:[0-9]+]}}, {{v[[0-9]+:[0-9]+]}} diff --git a/test/CodeGen/R600/fceil.ll b/test/CodeGen/R600/fceil.ll index ce3e8e4e3ca..f23e8919d73 100644 --- a/test/CodeGen/R600/fceil.ll +++ b/test/CodeGen/R600/fceil.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s ; RUN: llc -march=r600 -mcpu=cypress < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s declare float @llvm.ceil.f32(float) nounwind readnone diff --git a/test/CodeGen/R600/fcmp64.ll b/test/CodeGen/R600/fcmp64.ll index 032a4e416dc..9dc8b50513f 100644 --- a/test/CodeGen/R600/fcmp64.ll +++ b/test/CodeGen/R600/fcmp64.ll @@ -1,4 +1,5 @@ ; RUN: llc < %s -march=amdgcn -mcpu=tahiti -verify-machineinstrs | FileCheck %s +; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s ; CHECK-LABEL: {{^}}flt_f64: ; CHECK: v_cmp_nge_f64_e32 vcc, {{v[[0-9]+:[0-9]+], v[[0-9]+:[0-9]+]}} diff --git a/test/CodeGen/R600/fconst64.ll b/test/CodeGen/R600/fconst64.ll index f3bc399972d..28e0c909747 100644 --- a/test/CodeGen/R600/fconst64.ll +++ b/test/CodeGen/R600/fconst64.ll @@ -1,4 +1,5 @@ ; RUN: llc < %s -march=amdgcn -mcpu=tahiti -verify-machineinstrs | FileCheck %s +; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s ; CHECK: {{^}}fconst_f64: ; CHECK-DAG: s_mov_b32 {{s[0-9]+}}, 0x40140000 diff --git a/test/CodeGen/R600/fdiv.ll b/test/CodeGen/R600/fdiv.ll index f83b88ee1c9..603287fbdf4 100644 --- a/test/CodeGen/R600/fdiv.ll +++ b/test/CodeGen/R600/fdiv.ll @@ -1,5 +1,6 @@ ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=R600 %s ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s ; These tests check that fdiv is expanded correctly and also test that the ; scheduler is scheduling the RECIP_IEEE and MUL_IEEE instructions in separate diff --git a/test/CodeGen/R600/fdiv64.ll b/test/CodeGen/R600/fdiv64.ll index 0611b153f5c..c081ccf50ca 100644 --- a/test/CodeGen/R600/fdiv64.ll +++ b/test/CodeGen/R600/fdiv64.ll @@ -1,4 +1,5 @@ ; RUN: llc < %s -march=amdgcn -mcpu=tahiti -verify-machineinstrs | FileCheck %s +; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s ; CHECK: {{^}}fdiv_f64: ; CHECK: v_rcp_f64_e32 {{v\[[0-9]+:[0-9]+\]}} diff --git a/test/CodeGen/R600/ffloor.ll b/test/CodeGen/R600/ffloor.ll index 327f3bde543..e235d027791 100644 --- a/test/CodeGen/R600/ffloor.ll +++ b/test/CodeGen/R600/ffloor.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=R600 -check-prefix=FUNC %s ; FUNC-LABEL: {{^}}floor_f32: diff --git a/test/CodeGen/R600/flat-address-space.ll b/test/CodeGen/R600/flat-address-space.ll index 99ef41b24e4..2e98bf51b23 100644 --- a/test/CodeGen/R600/flat-address-space.ll +++ b/test/CodeGen/R600/flat-address-space.ll @@ -1,5 +1,7 @@ ; RUN: llc -O0 -march=amdgcn -mcpu=bonaire -mattr=-promote-alloca < %s | FileCheck -check-prefix=CHECK -check-prefix=CHECK-NO-PROMOTE %s ; RUN: llc -O0 -march=amdgcn -mcpu=bonaire -mattr=+promote-alloca < %s | FileCheck -check-prefix=CHECK -check-prefix=CHECK-PROMOTE %s +; RUN: llc -O0 -march=amdgcn -mcpu=tonga -mattr=-promote-alloca < %s | FileCheck -check-prefix=CHECK -check-prefix=CHECK-NO-PROMOTE %s +; RUN: llc -O0 -march=amdgcn -mcpu=tonga -mattr=+promote-alloca < %s | FileCheck -check-prefix=CHECK -check-prefix=CHECK-PROMOTE %s ; Disable optimizations in case there are optimizations added that ; specialize away generic pointer accesses. diff --git a/test/CodeGen/R600/fma.f64.ll b/test/CodeGen/R600/fma.f64.ll index 48b1093ecd0..bca312bfa75 100644 --- a/test/CodeGen/R600/fma.f64.ll +++ b/test/CodeGen/R600/fma.f64.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s declare double @llvm.fma.f64(double, double, double) nounwind readnone declare <2 x double> @llvm.fma.v2f64(<2 x double>, <2 x double>, <2 x double>) nounwind readnone diff --git a/test/CodeGen/R600/fmax3.ll b/test/CodeGen/R600/fmax3.ll index 6f95bf20f73..e1b477c5921 100644 --- a/test/CodeGen/R600/fmax3.ll +++ b/test/CodeGen/R600/fmax3.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s declare float @llvm.maxnum.f32(float, float) nounwind readnone diff --git a/test/CodeGen/R600/fmaxnum.f64.ll b/test/CodeGen/R600/fmaxnum.f64.ll index e92996aa2b1..de563cec341 100644 --- a/test/CodeGen/R600/fmaxnum.f64.ll +++ b/test/CodeGen/R600/fmaxnum.f64.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=SI < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s declare double @llvm.maxnum.f64(double, double) #0 declare <2 x double> @llvm.maxnum.v2f64(<2 x double>, <2 x double>) #0 diff --git a/test/CodeGen/R600/fmaxnum.ll b/test/CodeGen/R600/fmaxnum.ll index 473184af214..c105598ff81 100644 --- a/test/CodeGen/R600/fmaxnum.ll +++ b/test/CodeGen/R600/fmaxnum.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=SI < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s declare float @llvm.maxnum.f32(float, float) #0 declare <2 x float> @llvm.maxnum.v2f32(<2 x float>, <2 x float>) #0 diff --git a/test/CodeGen/R600/fmin3.ll b/test/CodeGen/R600/fmin3.ll index aeeed1c7dd3..716beb16bb1 100644 --- a/test/CodeGen/R600/fmin3.ll +++ b/test/CodeGen/R600/fmin3.ll @@ -1,4 +1,6 @@ ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s declare float @llvm.minnum.f32(float, float) nounwind readnone diff --git a/test/CodeGen/R600/fminnum.f64.ll b/test/CodeGen/R600/fminnum.f64.ll index b8476f98bab..0f929d6a81f 100644 --- a/test/CodeGen/R600/fminnum.f64.ll +++ b/test/CodeGen/R600/fminnum.f64.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=SI < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s declare double @llvm.minnum.f64(double, double) #0 declare <2 x double> @llvm.minnum.v2f64(<2 x double>, <2 x double>) #0 diff --git a/test/CodeGen/R600/fminnum.ll b/test/CodeGen/R600/fminnum.ll index cd1a948707e..6b93b830033 100644 --- a/test/CodeGen/R600/fminnum.ll +++ b/test/CodeGen/R600/fminnum.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=SI < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s declare float @llvm.minnum.f32(float, float) #0 declare <2 x float> @llvm.minnum.v2f32(<2 x float>, <2 x float>) #0 diff --git a/test/CodeGen/R600/fmul.ll b/test/CodeGen/R600/fmul.ll index 7296a8760be..6c09aa24267 100644 --- a/test/CodeGen/R600/fmul.ll +++ b/test/CodeGen/R600/fmul.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=R600 -check-prefix=FUNC %s diff --git a/test/CodeGen/R600/fmul64.ll b/test/CodeGen/R600/fmul64.ll index 882307ef458..9d7787ccbe1 100644 --- a/test/CodeGen/R600/fmul64.ll +++ b/test/CodeGen/R600/fmul64.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs < %s | FileCheck -check-prefix=FUNC -check-prefix=SI %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=FUNC -check-prefix=SI %s ; FUNC-LABEL: {{^}}fmul_f64: ; SI: v_mul_f64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\]}} diff --git a/test/CodeGen/R600/fnearbyint.ll b/test/CodeGen/R600/fnearbyint.ll index 30bc67689e1..4fa9adaabda 100644 --- a/test/CodeGen/R600/fnearbyint.ll +++ b/test/CodeGen/R600/fnearbyint.ll @@ -1,5 +1,6 @@ ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s ; RUN: llc -march=amdgcn -mcpu=bonaire -verify-machineinstrs < %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s ; This should have the exactly the same output as the test for rint, ; so no need to check anything. diff --git a/test/CodeGen/R600/fneg-fabs.f64.ll b/test/CodeGen/R600/fneg-fabs.f64.ll index 04a87e37785..7430e7ffb33 100644 --- a/test/CodeGen/R600/fneg-fabs.f64.ll +++ b/test/CodeGen/R600/fneg-fabs.f64.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s ; FIXME: Check something here. Currently it seems fabs + fneg aren't ; into 2 modifiers, although theoretically that should work. diff --git a/test/CodeGen/R600/fneg-fabs.ll b/test/CodeGen/R600/fneg-fabs.ll index 94e8256cd26..4fde0484567 100644 --- a/test/CodeGen/R600/fneg-fabs.ll +++ b/test/CodeGen/R600/fneg-fabs.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=R600 -check-prefix=FUNC %s ; FUNC-LABEL: {{^}}fneg_fabs_fadd_f32: diff --git a/test/CodeGen/R600/fp-classify.ll b/test/CodeGen/R600/fp-classify.ll index a1b2f08edde..c1de8520310 100644 --- a/test/CodeGen/R600/fp-classify.ll +++ b/test/CodeGen/R600/fp-classify.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s +; RUN: llc -march=r600 -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s declare i1 @llvm.AMDGPU.class.f32(float, i32) #1 declare i1 @llvm.AMDGPU.class.f64(double, i32) #1 diff --git a/test/CodeGen/R600/fp16_to_fp.ll b/test/CodeGen/R600/fp16_to_fp.ll index be84582a73a..da78f6155c8 100644 --- a/test/CodeGen/R600/fp16_to_fp.ll +++ b/test/CodeGen/R600/fp16_to_fp.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s declare float @llvm.convert.from.fp16.f32(i16) nounwind readnone declare double @llvm.convert.from.fp16.f64(i16) nounwind readnone diff --git a/test/CodeGen/R600/fp32_to_fp16.ll b/test/CodeGen/R600/fp32_to_fp16.ll index 43dd09b5ec0..c3c65aece08 100644 --- a/test/CodeGen/R600/fp32_to_fp16.ll +++ b/test/CodeGen/R600/fp32_to_fp16.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s declare i16 @llvm.convert.to.fp16.f32(float) nounwind readnone diff --git a/test/CodeGen/R600/fp_to_sint.ll b/test/CodeGen/R600/fp_to_sint.ll index d76e8a341c6..16549c392b0 100644 --- a/test/CodeGen/R600/fp_to_sint.ll +++ b/test/CodeGen/R600/fp_to_sint.ll @@ -1,5 +1,6 @@ ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck %s --check-prefix=EG --check-prefix=FUNC ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck %s --check-prefix=SI --check-prefix=FUNC +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck %s --check-prefix=SI --check-prefix=FUNC declare float @llvm.fabs.f32(float) #0 diff --git a/test/CodeGen/R600/fp_to_uint.ll b/test/CodeGen/R600/fp_to_uint.ll index 5970adf999c..804d90f476d 100644 --- a/test/CodeGen/R600/fp_to_uint.ll +++ b/test/CodeGen/R600/fp_to_uint.ll @@ -1,5 +1,6 @@ ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck %s -check-prefix=EG -check-prefix=FUNC ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck %s -check-prefix=SI -check-prefix=FUNC +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck %s -check-prefix=SI -check-prefix=FUNC ; FUNC-LABEL: {{^}}fp_to_uint_f32_to_i32: ; EG: FLT_TO_UINT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW]}} diff --git a/test/CodeGen/R600/fpext.ll b/test/CodeGen/R600/fpext.ll index fc79e88a2aa..734a43be229 100644 --- a/test/CodeGen/R600/fpext.ll +++ b/test/CodeGen/R600/fpext.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s ; FUNC-LABEL: {{^}}fpext_f32_to_f64: ; SI: v_cvt_f64_f32_e32 {{v\[[0-9]+:[0-9]+\]}}, s{{[0-9]+}} diff --git a/test/CodeGen/R600/fptrunc.ll b/test/CodeGen/R600/fptrunc.ll index b267f74ff1b..385e10e7baa 100644 --- a/test/CodeGen/R600/fptrunc.ll +++ b/test/CodeGen/R600/fptrunc.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s ; FUNC-LABEL: {{^}}fptrunc_f64_to_f32: ; SI: v_cvt_f32_f64_e32 {{v[0-9]+}}, {{s\[[0-9]+:[0-9]+\]}} diff --git a/test/CodeGen/R600/fsqrt.ll b/test/CodeGen/R600/fsqrt.ll index 0d1095cf268..1fdf3e453bf 100644 --- a/test/CodeGen/R600/fsqrt.ll +++ b/test/CodeGen/R600/fsqrt.ll @@ -1,5 +1,7 @@ ; RUN: llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs < %s | FileCheck %s ; RUN: llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs -enable-unsafe-fp-math < %s | FileCheck %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs -enable-unsafe-fp-math < %s | FileCheck %s ; Run with unsafe-fp-math to make sure nothing tries to turn this into 1 / rsqrt(x) diff --git a/test/CodeGen/R600/fsub.ll b/test/CodeGen/R600/fsub.ll index 4fe47e7badf..ef90fea6790 100644 --- a/test/CodeGen/R600/fsub.ll +++ b/test/CodeGen/R600/fsub.ll @@ -1,5 +1,6 @@ ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=R600 -check-prefix=FUNC %s ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s ; FUNC-LABEL: {{^}}v_fsub_f32: diff --git a/test/CodeGen/R600/fsub64.ll b/test/CodeGen/R600/fsub64.ll index d0f894607a6..62f46142fe0 100644 --- a/test/CodeGen/R600/fsub64.ll +++ b/test/CodeGen/R600/fsub64.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s ; SI-LABEL: {{^}}fsub_f64: ; SI: v_add_f64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], -v\[[0-9]+:[0-9]+\]}} diff --git a/test/CodeGen/R600/ftrunc.ll b/test/CodeGen/R600/ftrunc.ll index 39eb2b5accb..edc08609a8a 100644 --- a/test/CodeGen/R600/ftrunc.ll +++ b/test/CodeGen/R600/ftrunc.ll @@ -1,5 +1,6 @@ ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG --check-prefix=FUNC %s ; RUN: llc -march=amdgcn -mcpu=SI < %s | FileCheck -check-prefix=SI --check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga < %s | FileCheck -check-prefix=SI --check-prefix=FUNC %s declare float @llvm.trunc.f32(float) nounwind readnone declare <2 x float> @llvm.trunc.v2f32(<2 x float>) nounwind readnone diff --git a/test/CodeGen/R600/global-directive.ll b/test/CodeGen/R600/global-directive.ll index 189510ad08f..3ba12c206ad 100644 --- a/test/CodeGen/R600/global-directive.ll +++ b/test/CodeGen/R600/global-directive.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s ; Make sure the GlobalDirective isn't merged with the function name diff --git a/test/CodeGen/R600/global-extload-i1.ll b/test/CodeGen/R600/global-extload-i1.ll index 940911e7345..5dc494900ce 100644 --- a/test/CodeGen/R600/global-extload-i1.ll +++ b/test/CodeGen/R600/global-extload-i1.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=r600 -mcpu=tonga -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s ; XUN: llc -march=r600 -mcpu=cypress < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s ; FIXME: Evergreen broken diff --git a/test/CodeGen/R600/global-extload-i16.ll b/test/CodeGen/R600/global-extload-i16.ll index 838068470ff..a1740ec8236 100644 --- a/test/CodeGen/R600/global-extload-i16.ll +++ b/test/CodeGen/R600/global-extload-i16.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=r600 -mcpu=tonga -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s ; XUN: llc -march=r600 -mcpu=cypress < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s ; FIXME: cypress is broken because the bigger testcases spill and it's not implemented diff --git a/test/CodeGen/R600/global-extload-i32.ll b/test/CodeGen/R600/global-extload-i32.ll index ce78c446c3b..f56b6ac8dc3 100644 --- a/test/CodeGen/R600/global-extload-i32.ll +++ b/test/CodeGen/R600/global-extload-i32.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=r600 -mcpu=tonga -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s ; RUN: llc -march=r600 -mcpu=cypress < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s ; FUNC-LABEL: {{^}}zextload_global_i32_to_i64: diff --git a/test/CodeGen/R600/global-extload-i8.ll b/test/CodeGen/R600/global-extload-i8.ll index 8d6042f1de0..86245232d3e 100644 --- a/test/CodeGen/R600/global-extload-i8.ll +++ b/test/CodeGen/R600/global-extload-i8.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=r600 -mcpu=tonga -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s ; RUN: llc -march=r600 -mcpu=cypress < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s ; FUNC-LABEL: {{^}}zextload_global_i8_to_i32: diff --git a/test/CodeGen/R600/global-zero-initializer.ll b/test/CodeGen/R600/global-zero-initializer.ll index 031df59cd1e..6909c58354c 100644 --- a/test/CodeGen/R600/global-zero-initializer.ll +++ b/test/CodeGen/R600/global-zero-initializer.ll @@ -1,4 +1,5 @@ ; RUN: not llc -march=amdgcn -mcpu=SI < %s 2>&1 | FileCheck %s +; RUN: not llc -march=amdgcn -mcpu=tonga < %s 2>&1 | FileCheck %s ; CHECK: error: unsupported initializer for address space in load_init_global_global diff --git a/test/CodeGen/R600/half.ll b/test/CodeGen/R600/half.ll index cb7a94a0b85..35a41c5cd0b 100644 --- a/test/CodeGen/R600/half.ll +++ b/test/CodeGen/R600/half.ll @@ -1,4 +1,5 @@ ; RUN: llc < %s -march=amdgcn -mcpu=SI | FileCheck %s +; RUN: llc < %s -march=amdgcn -mcpu=tonga | FileCheck %s define void @test_load_store(half addrspace(1)* %in, half addrspace(1)* %out) { ; CHECK-LABEL: {{^}}test_load_store: diff --git a/test/CodeGen/R600/i1-copy-implicit-def.ll b/test/CodeGen/R600/i1-copy-implicit-def.ll index 51e230196bf..b11a2113764 100644 --- a/test/CodeGen/R600/i1-copy-implicit-def.ll +++ b/test/CodeGen/R600/i1-copy-implicit-def.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s ; SILowerI1Copies was not handling IMPLICIT_DEF ; SI-LABEL: {{^}}br_implicit_def: diff --git a/test/CodeGen/R600/i1-copy-phi.ll b/test/CodeGen/R600/i1-copy-phi.ll index 8b761710f9d..430466e9f80 100644 --- a/test/CodeGen/R600/i1-copy-phi.ll +++ b/test/CodeGen/R600/i1-copy-phi.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s ; SI-LABEL: {{^}}br_i1_phi: ; SI: v_mov_b32_e32 [[REG:v[0-9]+]], 0{{$}} diff --git a/test/CodeGen/R600/icmp64.ll b/test/CodeGen/R600/icmp64.ll index ed0f221b87b..0eaa33ebafe 100644 --- a/test/CodeGen/R600/icmp64.ll +++ b/test/CodeGen/R600/icmp64.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s ; SI-LABEL: {{^}}test_i64_eq: ; SI: v_cmp_eq_i64 diff --git a/test/CodeGen/R600/indirect-addressing-si.ll b/test/CodeGen/R600/indirect-addressing-si.ll index db597a36377..9cd2d84f7e5 100644 --- a/test/CodeGen/R600/indirect-addressing-si.ll +++ b/test/CodeGen/R600/indirect-addressing-si.ll @@ -1,4 +1,5 @@ ; RUN: llc < %s -march=amdgcn -mcpu=SI -verify-machineinstrs | FileCheck %s +; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s ; Tests for indirect addressing on SI, which is implemented using dynamic ; indexing of vectors. diff --git a/test/CodeGen/R600/indirect-private-64.ll b/test/CodeGen/R600/indirect-private-64.ll index 24006f8799b..cb06d609da4 100644 --- a/test/CodeGen/R600/indirect-private-64.ll +++ b/test/CodeGen/R600/indirect-private-64.ll @@ -1,5 +1,7 @@ ; RUN: llc -march=amdgcn -mcpu=SI -mattr=-promote-alloca -verify-machineinstrs < %s | FileCheck -check-prefix=SI-ALLOCA -check-prefix=SI %s ; RUN: llc -march=amdgcn -mcpu=SI -mattr=+promote-alloca -verify-machineinstrs < %s | FileCheck -check-prefix=SI-PROMOTE -check-prefix=SI %s +; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-promote-alloca -verify-machineinstrs < %s | FileCheck -check-prefix=SI-ALLOCA -check-prefix=SI %s +; RUN: llc -march=amdgcn -mcpu=tonga -mattr=+promote-alloca -verify-machineinstrs < %s | FileCheck -check-prefix=SI-PROMOTE -check-prefix=SI %s declare void @llvm.AMDGPU.barrier.local() noduplicate nounwind diff --git a/test/CodeGen/R600/infinite-loop.ll b/test/CodeGen/R600/infinite-loop.ll index 0f82a7df609..7233aa57fd7 100644 --- a/test/CodeGen/R600/infinite-loop.ll +++ b/test/CodeGen/R600/infinite-loop.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s ; SI-LABEL: {{^}}infinite_loop: ; SI: v_mov_b32_e32 [[REG:v[0-9]+]], 0x3e7 diff --git a/test/CodeGen/R600/inline-asm.ll b/test/CodeGen/R600/inline-asm.ll index 6f1f977de2a..37e4486db38 100644 --- a/test/CodeGen/R600/inline-asm.ll +++ b/test/CodeGen/R600/inline-asm.ll @@ -1,4 +1,5 @@ ; RUN: llc < %s -march=r600 -mcpu=SI -verify-machineinstrs | FileCheck %s +; RUN: llc < %s -march=r600 -mcpu=tonga -verify-machineinstrs | FileCheck %s ; CHECK: {{^}}inline_asm: ; CHECK: s_endpgm diff --git a/test/CodeGen/R600/inline-calls.ll b/test/CodeGen/R600/inline-calls.ll index b8700d55e15..33a4c832e75 100644 --- a/test/CodeGen/R600/inline-calls.ll +++ b/test/CodeGen/R600/inline-calls.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck %s ; RUN: llc -march=r600 -mcpu=redwood -verify-machineinstrs < %s | FileCheck %s ; CHECK-NOT: {{^}}func: diff --git a/test/CodeGen/R600/insert_subreg.ll b/test/CodeGen/R600/insert_subreg.ll index dfb58d54796..4a5e8869c2d 100644 --- a/test/CodeGen/R600/insert_subreg.ll +++ b/test/CodeGen/R600/insert_subreg.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=SI -mattr=-promote-alloca -verify-machineinstrs < %s +; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-promote-alloca -verify-machineinstrs < %s ; Test that INSERT_SUBREG instructions don't have non-register operands after ; instruction selection. diff --git a/test/CodeGen/R600/insert_vector_elt.ll b/test/CodeGen/R600/insert_vector_elt.ll index 2442c868444..64afddcca21 100644 --- a/test/CodeGen/R600/insert_vector_elt.ll +++ b/test/CodeGen/R600/insert_vector_elt.ll @@ -1,4 +1,5 @@ ; RUN: llc -verify-machineinstrs -march=amdgcn -mcpu=SI < %s | FileCheck -check-prefix=SI %s +; RUN: llc -verify-machineinstrs -march=amdgcn -mcpu=tonga < %s | FileCheck -check-prefix=SI %s ; FIXME: Broken on evergreen ; FIXME: For some reason the 8 and 16 vectors are being stored as diff --git a/test/CodeGen/R600/large-alloca.ll b/test/CodeGen/R600/large-alloca.ll index 0a5e592ae89..788816cf723 100644 --- a/test/CodeGen/R600/large-alloca.ll +++ b/test/CodeGen/R600/large-alloca.ll @@ -1,6 +1,7 @@ ; XFAIL: * ; REQUIRES: asserts ; RUN: llc -march=amdgcn -mcpu=SI < %s +; RUN: llc -march=amdgcn -mcpu=tonga < %s define void @large_alloca(i32 addrspace(1)* %out, i32 %x, i32 %y) nounwind { %large = alloca [8192 x i32], align 4 diff --git a/test/CodeGen/R600/large-constant-initializer.ll b/test/CodeGen/R600/large-constant-initializer.ll index c11e82e76e6..c8671efbe6f 100644 --- a/test/CodeGen/R600/large-constant-initializer.ll +++ b/test/CodeGen/R600/large-constant-initializer.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=SI < %s +; RUN: llc -march=amdgcn -mcpu=tonga < %s ; CHECK: s_endpgm @gv = external unnamed_addr addrspace(2) constant [239 x i32], align 4 diff --git a/test/CodeGen/R600/lds-initializer.ll b/test/CodeGen/R600/lds-initializer.ll index 9a209e50ca1..7344eff2572 100644 --- a/test/CodeGen/R600/lds-initializer.ll +++ b/test/CodeGen/R600/lds-initializer.ll @@ -1,4 +1,5 @@ ; RUN: not llc -march=amdgcn -mcpu=SI < %s 2>&1 | FileCheck %s +; RUN: not llc -march=amdgcn -mcpu=tonga < %s 2>&1 | FileCheck %s ; CHECK: error: unsupported initializer for address space in load_init_lds_global diff --git a/test/CodeGen/R600/lds-zero-initializer.ll b/test/CodeGen/R600/lds-zero-initializer.ll index 87e2c334879..1fb6f52f29b 100644 --- a/test/CodeGen/R600/lds-zero-initializer.ll +++ b/test/CodeGen/R600/lds-zero-initializer.ll @@ -1,4 +1,5 @@ ; RUN: not llc -march=amdgcn -mcpu=SI < %s 2>&1 | FileCheck %s +; RUN: not llc -march=amdgcn -mcpu=tonga < %s 2>&1 | FileCheck %s ; CHECK: error: unsupported initializer for address space in load_zeroinit_lds_global diff --git a/test/CodeGen/R600/llvm.AMDGPU.abs.ll b/test/CodeGen/R600/llvm.AMDGPU.abs.ll index f143fd64098..8bc2583899b 100644 --- a/test/CodeGen/R600/llvm.AMDGPU.abs.ll +++ b/test/CodeGen/R600/llvm.AMDGPU.abs.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s ; RUN: llc -march=r600 -mcpu=cypress -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s declare i32 @llvm.AMDGPU.abs(i32) nounwind readnone diff --git a/test/CodeGen/R600/llvm.AMDGPU.bfe.i32.ll b/test/CodeGen/R600/llvm.AMDGPU.bfe.i32.ll index de8b928aa3a..2ec2546be39 100644 --- a/test/CodeGen/R600/llvm.AMDGPU.bfe.i32.ll +++ b/test/CodeGen/R600/llvm.AMDGPU.bfe.i32.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s ; RUN: llc -march=r600 -mcpu=redwood -show-mc-encoding -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s declare i32 @llvm.AMDGPU.bfe.i32(i32, i32, i32) nounwind readnone diff --git a/test/CodeGen/R600/llvm.AMDGPU.bfe.u32.ll b/test/CodeGen/R600/llvm.AMDGPU.bfe.u32.ll index 85bf831534a..6cd0108def2 100644 --- a/test/CodeGen/R600/llvm.AMDGPU.bfe.u32.ll +++ b/test/CodeGen/R600/llvm.AMDGPU.bfe.u32.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s ; RUN: llc -march=r600 -mcpu=redwood -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s declare i32 @llvm.AMDGPU.bfe.u32(i32, i32, i32) nounwind readnone diff --git a/test/CodeGen/R600/llvm.AMDGPU.bfi.ll b/test/CodeGen/R600/llvm.AMDGPU.bfi.ll index b3da24657f4..517a55abc09 100644 --- a/test/CodeGen/R600/llvm.AMDGPU.bfi.ll +++ b/test/CodeGen/R600/llvm.AMDGPU.bfi.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s ; RUN: llc -march=r600 -mcpu=redwood -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s declare i32 @llvm.AMDGPU.bfi(i32, i32, i32) nounwind readnone diff --git a/test/CodeGen/R600/llvm.AMDGPU.bfm.ll b/test/CodeGen/R600/llvm.AMDGPU.bfm.ll index 80aecc74318..2346f408ec4 100644 --- a/test/CodeGen/R600/llvm.AMDGPU.bfm.ll +++ b/test/CodeGen/R600/llvm.AMDGPU.bfm.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s ; RUN: llc -march=r600 -mcpu=redwood -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s declare i32 @llvm.AMDGPU.bfm(i32, i32) nounwind readnone diff --git a/test/CodeGen/R600/llvm.AMDGPU.brev.ll b/test/CodeGen/R600/llvm.AMDGPU.brev.ll index dd4459be536..3973f539c13 100644 --- a/test/CodeGen/R600/llvm.AMDGPU.brev.ll +++ b/test/CodeGen/R600/llvm.AMDGPU.brev.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s declare i32 @llvm.AMDGPU.brev(i32) nounwind readnone diff --git a/test/CodeGen/R600/llvm.AMDGPU.clamp.ll b/test/CodeGen/R600/llvm.AMDGPU.clamp.ll index b9d5f6fbac0..11ec963ab31 100644 --- a/test/CodeGen/R600/llvm.AMDGPU.clamp.ll +++ b/test/CodeGen/R600/llvm.AMDGPU.clamp.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -strict-whitespace -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -strict-whitespace -check-prefix=SI -check-prefix=FUNC %s ; RUN: llc -march=r600 -mcpu=cypress -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s declare float @llvm.fabs.f32(float) nounwind readnone diff --git a/test/CodeGen/R600/llvm.AMDGPU.cvt_f32_ubyte.ll b/test/CodeGen/R600/llvm.AMDGPU.cvt_f32_ubyte.ll index 4d187d5193c..799817e0109 100644 --- a/test/CodeGen/R600/llvm.AMDGPU.cvt_f32_ubyte.ll +++ b/test/CodeGen/R600/llvm.AMDGPU.cvt_f32_ubyte.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=SI < %s | FileCheck -check-prefix=SI %s +; RUN: llc -march=amdgcn -mcpu=tonga < %s | FileCheck -check-prefix=SI %s declare float @llvm.AMDGPU.cvt.f32.ubyte0(i32) nounwind readnone declare float @llvm.AMDGPU.cvt.f32.ubyte1(i32) nounwind readnone diff --git a/test/CodeGen/R600/llvm.AMDGPU.fract.ll b/test/CodeGen/R600/llvm.AMDGPU.fract.ll index df43b0d9063..7d15300ebdd 100644 --- a/test/CodeGen/R600/llvm.AMDGPU.fract.ll +++ b/test/CodeGen/R600/llvm.AMDGPU.fract.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s ; RUN: llc -march=r600 -mcpu=cypress -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s declare float @llvm.AMDGPU.fract.f32(float) nounwind readnone diff --git a/test/CodeGen/R600/llvm.AMDGPU.imad24.ll b/test/CodeGen/R600/llvm.AMDGPU.imad24.ll index 26a370436fd..42102e30f07 100644 --- a/test/CodeGen/R600/llvm.AMDGPU.imad24.ll +++ b/test/CodeGen/R600/llvm.AMDGPU.imad24.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s ; RUN: llc -march=r600 -mcpu=cayman -verify-machineinstrs < %s | FileCheck -check-prefix=CM -check-prefix=FUNC %s ; RUN: llc -march=r600 -mcpu=redwood -verify-machineinstrs < %s | FileCheck -check-prefix=R600 -check-prefix=FUNC %s ; XUN: llc -march=r600 -mcpu=r600 -verify-machineinstrs < %s | FileCheck -check-prefix=R600 -check-prefix=FUNC %s diff --git a/test/CodeGen/R600/llvm.AMDGPU.imax.ll b/test/CodeGen/R600/llvm.AMDGPU.imax.ll index ec8f001a1a6..ce7fca056a0 100644 --- a/test/CodeGen/R600/llvm.AMDGPU.imax.ll +++ b/test/CodeGen/R600/llvm.AMDGPU.imax.ll @@ -1,4 +1,5 @@ ; RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck -check-prefix=SI %s +; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck -check-prefix=SI %s ; SI-LABEL: {{^}}vector_imax: ; SI: v_max_i32_e32 diff --git a/test/CodeGen/R600/llvm.AMDGPU.imin.ll b/test/CodeGen/R600/llvm.AMDGPU.imin.ll index 07a0fe78e2a..15cd38b19d7 100644 --- a/test/CodeGen/R600/llvm.AMDGPU.imin.ll +++ b/test/CodeGen/R600/llvm.AMDGPU.imin.ll @@ -1,4 +1,5 @@ ; RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck -check-prefix=SI %s +; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck -check-prefix=SI %s ; SI-LABEL: {{^}}vector_imin: ; SI: v_min_i32_e32 diff --git a/test/CodeGen/R600/llvm.AMDGPU.imul24.ll b/test/CodeGen/R600/llvm.AMDGPU.imul24.ll index 1a9806d4b97..fdc1172260b 100644 --- a/test/CodeGen/R600/llvm.AMDGPU.imul24.ll +++ b/test/CodeGen/R600/llvm.AMDGPU.imul24.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s ; RUN: llc -march=r600 -mcpu=cayman -verify-machineinstrs < %s | FileCheck -check-prefix=CM -check-prefix=FUNC %s ; RUN: llc -march=r600 -mcpu=redwood -verify-machineinstrs < %s | FileCheck -check-prefix=R600 -check-prefix=FUNC %s diff --git a/test/CodeGen/R600/llvm.AMDGPU.kill.ll b/test/CodeGen/R600/llvm.AMDGPU.kill.ll index 3995c9a742d..d1ff3b1b7d6 100644 --- a/test/CodeGen/R600/llvm.AMDGPU.kill.ll +++ b/test/CodeGen/R600/llvm.AMDGPU.kill.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=verde -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s ; SI-LABEL: {{^}}kill_gs_const: ; SI-NOT: v_cmpx_le_f32 diff --git a/test/CodeGen/R600/llvm.AMDGPU.ldexp.ll b/test/CodeGen/R600/llvm.AMDGPU.ldexp.ll index f0b8dace17f..a59c0ce6d67 100644 --- a/test/CodeGen/R600/llvm.AMDGPU.ldexp.ll +++ b/test/CodeGen/R600/llvm.AMDGPU.ldexp.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s declare float @llvm.AMDGPU.ldexp.f32(float, i32) nounwind readnone declare double @llvm.AMDGPU.ldexp.f64(double, i32) nounwind readnone diff --git a/test/CodeGen/R600/llvm.AMDGPU.rcp.f64.ll b/test/CodeGen/R600/llvm.AMDGPU.rcp.f64.ll index 68412950b05..b80658b5ed4 100644 --- a/test/CodeGen/R600/llvm.AMDGPU.rcp.f64.ll +++ b/test/CodeGen/R600/llvm.AMDGPU.rcp.f64.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s declare double @llvm.AMDGPU.rcp.f64(double) nounwind readnone declare double @llvm.sqrt.f64(double) nounwind readnone diff --git a/test/CodeGen/R600/llvm.AMDGPU.rcp.ll b/test/CodeGen/R600/llvm.AMDGPU.rcp.ll index 4979a14ccdf..edd6e9a72f1 100644 --- a/test/CodeGen/R600/llvm.AMDGPU.rcp.ll +++ b/test/CodeGen/R600/llvm.AMDGPU.rcp.ll @@ -1,6 +1,9 @@ ; RUN: llc -march=amdgcn -mcpu=SI -mattr=-fp32-denormals -enable-unsafe-fp-math -verify-machineinstrs < %s | FileCheck -check-prefix=SI-UNSAFE -check-prefix=SI -check-prefix=FUNC %s ; RUN: llc -march=amdgcn -mcpu=SI -mattr=-fp32-denormals -verify-machineinstrs < %s | FileCheck -check-prefix=SI-SAFE -check-prefix=SI -check-prefix=FUNC %s ; XUN: llc -march=amdgcn -mcpu=SI -mattr=+fp32-denormals -verify-machineinstrs < %s | FileCheck -check-prefix=SI-SAFE-SPDENORM -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-fp32-denormals -enable-unsafe-fp-math -verify-machineinstrs < %s | FileCheck -check-prefix=SI-UNSAFE -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-fp32-denormals -verify-machineinstrs < %s | FileCheck -check-prefix=SI-SAFE -check-prefix=SI -check-prefix=FUNC %s +; XUN: llc -march=amdgcn -mcpu=tonga -mattr=+fp32-denormals -verify-machineinstrs < %s | FileCheck -check-prefix=SI-SAFE-SPDENORM -check-prefix=SI -check-prefix=FUNC %s ; RUN: llc -march=r600 -mcpu=cypress -verify-machineinstrs < %s | FileCheck -check-prefix=EG-SAFE -check-prefix=FUNC %s ; RUN: llc -march=r600 -mcpu=cayman -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s diff --git a/test/CodeGen/R600/llvm.AMDGPU.rsq.ll b/test/CodeGen/R600/llvm.AMDGPU.rsq.ll index f987ef3995d..36b72f14db1 100644 --- a/test/CodeGen/R600/llvm.AMDGPU.rsq.ll +++ b/test/CodeGen/R600/llvm.AMDGPU.rsq.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s ; RUN: llc -march=r600 -mcpu=cypress -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s declare float @llvm.AMDGPU.rsq.f32(float) nounwind readnone diff --git a/test/CodeGen/R600/llvm.AMDGPU.trig_preop.ll b/test/CodeGen/R600/llvm.AMDGPU.trig_preop.ll index 0b1342ee45c..5829f7348df 100644 --- a/test/CodeGen/R600/llvm.AMDGPU.trig_preop.ll +++ b/test/CodeGen/R600/llvm.AMDGPU.trig_preop.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s declare double @llvm.AMDGPU.trig.preop.f64(double, i32) nounwind readnone diff --git a/test/CodeGen/R600/llvm.AMDGPU.trunc.ll b/test/CodeGen/R600/llvm.AMDGPU.trunc.ll index 9c5c74e2331..60b693e2ad2 100644 --- a/test/CodeGen/R600/llvm.AMDGPU.trunc.ll +++ b/test/CodeGen/R600/llvm.AMDGPU.trunc.ll @@ -1,5 +1,6 @@ ; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=R600-CHECK %s ; RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck --check-prefix=SI-CHECK %s +; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck --check-prefix=SI-CHECK %s ; R600-CHECK: {{^}}amdgpu_trunc: ; R600-CHECK: TRUNC T{{[0-9]+\.[XYZW]}}, KC0[2].Z diff --git a/test/CodeGen/R600/llvm.AMDGPU.umax.ll b/test/CodeGen/R600/llvm.AMDGPU.umax.ll index 094ecaca2b4..4320dfe669d 100644 --- a/test/CodeGen/R600/llvm.AMDGPU.umax.ll +++ b/test/CodeGen/R600/llvm.AMDGPU.umax.ll @@ -1,4 +1,5 @@ ; RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck -check-prefix=SI %s +; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck -check-prefix=SI %s ; SI-LABEL: {{^}}vector_umax: ; SI: v_max_u32_e32 diff --git a/test/CodeGen/R600/llvm.AMDGPU.umin.ll b/test/CodeGen/R600/llvm.AMDGPU.umin.ll index 97fc40a7233..e4cac33a07a 100644 --- a/test/CodeGen/R600/llvm.AMDGPU.umin.ll +++ b/test/CodeGen/R600/llvm.AMDGPU.umin.ll @@ -1,4 +1,5 @@ ; RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck -check-prefix=SI %s +; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck -check-prefix=SI %s ; SI-LABEL: {{^}}vector_umin: ; SI: v_min_u32_e32 diff --git a/test/CodeGen/R600/llvm.AMDGPU.umul24.ll b/test/CodeGen/R600/llvm.AMDGPU.umul24.ll index 5a849c224d2..76624a078b3 100644 --- a/test/CodeGen/R600/llvm.AMDGPU.umul24.ll +++ b/test/CodeGen/R600/llvm.AMDGPU.umul24.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s ; RUN: llc -march=r600 -mcpu=cayman -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s ; RUN: llc -march=r600 -mcpu=redwood -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s ; XUN: llc -march=r600 -mcpu=r600 -verify-machineinstrs < %s | FileCheck -check-prefix=R600 -check-prefix=FUNC %s diff --git a/test/CodeGen/R600/llvm.SI.fs.interp.constant.ll b/test/CodeGen/R600/llvm.SI.fs.interp.constant.ll index a7454ef3493..409d46dad5a 100644 --- a/test/CodeGen/R600/llvm.SI.fs.interp.constant.ll +++ b/test/CodeGen/R600/llvm.SI.fs.interp.constant.ll @@ -1,4 +1,5 @@ ;RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck %s +;RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s ;CHECK: s_mov_b32 ;CHECK-NEXT: v_interp_mov_f32 diff --git a/test/CodeGen/R600/llvm.SI.gather4.ll b/test/CodeGen/R600/llvm.SI.gather4.ll index cdf34ca3e7f..275cb580bc9 100644 --- a/test/CodeGen/R600/llvm.SI.gather4.ll +++ b/test/CodeGen/R600/llvm.SI.gather4.ll @@ -1,4 +1,5 @@ ;RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck %s +;RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s ;CHECK-LABEL: {{^}}gather4_v2: ;CHECK: image_gather4 {{v\[[0-9]+:[0-9]+\]}}, 1, 0, 0, -1, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} diff --git a/test/CodeGen/R600/llvm.SI.getlod.ll b/test/CodeGen/R600/llvm.SI.getlod.ll index 775dd3cd756..06ee98e91b3 100644 --- a/test/CodeGen/R600/llvm.SI.getlod.ll +++ b/test/CodeGen/R600/llvm.SI.getlod.ll @@ -1,4 +1,5 @@ ;RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck %s +;RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s ;CHECK-LABEL: {{^}}getlod: ;CHECK: image_get_lod {{v\[[0-9]+:[0-9]+\]}}, 3, 0, 0, -1, 0, 0, 0, 0, {{v[0-9]+}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} diff --git a/test/CodeGen/R600/llvm.SI.image.ll b/test/CodeGen/R600/llvm.SI.image.ll index 7c9af7b40f6..0fac8d79956 100644 --- a/test/CodeGen/R600/llvm.SI.image.ll +++ b/test/CodeGen/R600/llvm.SI.image.ll @@ -1,4 +1,5 @@ ;RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck %s +;RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s ;CHECK-LABEL: {{^}}image_load: ;CHECK: image_load {{v\[[0-9]+:[0-9]+\]}}, 15, 0, 0, 0, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} diff --git a/test/CodeGen/R600/llvm.SI.image.sample.ll b/test/CodeGen/R600/llvm.SI.image.sample.ll index 779c8cc573b..61e2b6df29c 100644 --- a/test/CodeGen/R600/llvm.SI.image.sample.ll +++ b/test/CodeGen/R600/llvm.SI.image.sample.ll @@ -1,4 +1,5 @@ ;RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck %s +;RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s ;CHECK-LABEL: {{^}}sample: ;CHECK: image_sample {{v\[[0-9]+:[0-9]+\]}}, 15, 0, 0, 0, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} diff --git a/test/CodeGen/R600/llvm.SI.image.sample.o.ll b/test/CodeGen/R600/llvm.SI.image.sample.o.ll index 7bfb5501206..6d9aa5e3346 100644 --- a/test/CodeGen/R600/llvm.SI.image.sample.o.ll +++ b/test/CodeGen/R600/llvm.SI.image.sample.o.ll @@ -1,4 +1,5 @@ ;RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck %s +;RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s ;CHECK-LABEL: {{^}}sample: ;CHECK: image_sample_o {{v\[[0-9]+:[0-9]+\]}}, 15, 0, 0, 0, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} diff --git a/test/CodeGen/R600/llvm.SI.imageload.ll b/test/CodeGen/R600/llvm.SI.imageload.ll index dba6e8f3f0c..35e4591bb1f 100644 --- a/test/CodeGen/R600/llvm.SI.imageload.ll +++ b/test/CodeGen/R600/llvm.SI.imageload.ll @@ -1,4 +1,5 @@ ;RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck %s +;RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s ;CHECK-DAG: image_load {{v\[[0-9]+:[0-9]+\]}}, 15, 0, 0, -1 ;CHECK-DAG: image_load_mip {{v\[[0-9]+:[0-9]+\]}}, 3, 0, 0, 0 diff --git a/test/CodeGen/R600/llvm.SI.load.dword.ll b/test/CodeGen/R600/llvm.SI.load.dword.ll index ebd16e37630..8c8f2eed7d9 100644 --- a/test/CodeGen/R600/llvm.SI.load.dword.ll +++ b/test/CodeGen/R600/llvm.SI.load.dword.ll @@ -1,4 +1,5 @@ ;RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck %s +;RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s ; Example of a simple geometry shader loading vertex attributes from the ; ESGS ring buffer diff --git a/test/CodeGen/R600/llvm.SI.resinfo.ll b/test/CodeGen/R600/llvm.SI.resinfo.ll index 278e05558c6..ac95fd0b83a 100644 --- a/test/CodeGen/R600/llvm.SI.resinfo.ll +++ b/test/CodeGen/R600/llvm.SI.resinfo.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=verde -verify-machineinstrs < %s | FileCheck %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck %s ; CHECK-DAG: image_get_resinfo {{v\[[0-9]+:[0-9]+\]}}, 15, 0, 0, -1 ; CHECK-DAG: image_get_resinfo {{v\[[0-9]+:[0-9]+\]}}, 3, 0, 0, 0 diff --git a/test/CodeGen/R600/llvm.SI.sample-masked.ll b/test/CodeGen/R600/llvm.SI.sample-masked.ll index 071938f2c24..ce9558cbf81 100644 --- a/test/CodeGen/R600/llvm.SI.sample-masked.ll +++ b/test/CodeGen/R600/llvm.SI.sample-masked.ll @@ -1,4 +1,5 @@ ;RUN: llc < %s -march=amdgcn -mcpu=verde | FileCheck %s +;RUN: llc < %s -march=amdgcn -mcpu=tonga | FileCheck %s ; CHECK-LABEL: {{^}}v1: ; CHECK: image_sample {{v\[[0-9]+:[0-9]+\]}}, 13 diff --git a/test/CodeGen/R600/llvm.SI.sample.ll b/test/CodeGen/R600/llvm.SI.sample.ll index 2c2905aaa0c..509c45f588b 100644 --- a/test/CodeGen/R600/llvm.SI.sample.ll +++ b/test/CodeGen/R600/llvm.SI.sample.ll @@ -1,4 +1,5 @@ ;RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck %s +;RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s ;CHECK-DAG: image_sample {{v\[[0-9]+:[0-9]+\]}}, 15 ;CHECK-DAG: image_sample {{v\[[0-9]+:[0-9]+\]}}, 3 diff --git a/test/CodeGen/R600/llvm.SI.sampled.ll b/test/CodeGen/R600/llvm.SI.sampled.ll index e42a48ee785..f2badff2a99 100644 --- a/test/CodeGen/R600/llvm.SI.sampled.ll +++ b/test/CodeGen/R600/llvm.SI.sampled.ll @@ -1,4 +1,5 @@ ;RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck %s +;RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s ;CHECK-DAG: image_sample_d {{v\[[0-9]+:[0-9]+\]}}, 15 ;CHECK-DAG: image_sample_d {{v\[[0-9]+:[0-9]+\]}}, 3 diff --git a/test/CodeGen/R600/llvm.SI.sendmsg.ll b/test/CodeGen/R600/llvm.SI.sendmsg.ll index d94b137bc01..ce380024195 100644 --- a/test/CodeGen/R600/llvm.SI.sendmsg.ll +++ b/test/CodeGen/R600/llvm.SI.sendmsg.ll @@ -1,4 +1,5 @@ ;RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck %s +;RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s ; CHECK-LABEL: {{^}}main: ; CHECK: s_sendmsg Gs(emit stream 0) diff --git a/test/CodeGen/R600/llvm.SI.tbuffer.store.ll b/test/CodeGen/R600/llvm.SI.tbuffer.store.ll index 320597ec847..71f51548a5f 100644 --- a/test/CodeGen/R600/llvm.SI.tbuffer.store.ll +++ b/test/CodeGen/R600/llvm.SI.tbuffer.store.ll @@ -1,4 +1,5 @@ ;RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck %s +;RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s ;CHECK-LABEL: {{^}}test1: ;CHECK: tbuffer_store_format_xyzw {{v\[[0-9]+:[0-9]+\]}}, 0x20, -1, 0, -1, 0, 14, 4, {{v[0-9]+}}, {{s\[[0-9]+:[0-9]+\]}}, -1, 0, 0 diff --git a/test/CodeGen/R600/llvm.amdgpu.kilp.ll b/test/CodeGen/R600/llvm.amdgpu.kilp.ll index cca42bf3539..42df6db1ccf 100644 --- a/test/CodeGen/R600/llvm.amdgpu.kilp.ll +++ b/test/CodeGen/R600/llvm.amdgpu.kilp.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=verde -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s ; SI-LABEL: {{^}}kilp_gs_const: ; SI: s_mov_b64 exec, 0 diff --git a/test/CodeGen/R600/llvm.amdgpu.lrp.ll b/test/CodeGen/R600/llvm.amdgpu.lrp.ll index a1b7bf0ec43..4e4c2ec7791 100644 --- a/test/CodeGen/R600/llvm.amdgpu.lrp.ll +++ b/test/CodeGen/R600/llvm.amdgpu.lrp.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s declare float @llvm.AMDGPU.lrp(float, float, float) nounwind readnone diff --git a/test/CodeGen/R600/llvm.cos.ll b/test/CodeGen/R600/llvm.cos.ll index 9be81807be2..c65df8b3e8d 100644 --- a/test/CodeGen/R600/llvm.cos.ll +++ b/test/CodeGen/R600/llvm.cos.ll @@ -1,5 +1,6 @@ ;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s -check-prefix=EG -check-prefix=FUNC ;RUN: llc < %s -march=amdgcn -mcpu=SI | FileCheck %s -check-prefix=SI -check-prefix=FUNC +;RUN: llc < %s -march=amdgcn -mcpu=tonga | FileCheck %s -check-prefix=SI -check-prefix=FUNC ;FUNC-LABEL: test ;EG: MULADD_IEEE * diff --git a/test/CodeGen/R600/llvm.exp2.ll b/test/CodeGen/R600/llvm.exp2.ll index 9e78134b084..a2aa4f7b85a 100644 --- a/test/CodeGen/R600/llvm.exp2.ll +++ b/test/CodeGen/R600/llvm.exp2.ll @@ -1,6 +1,7 @@ ;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s --check-prefix=EG-CHECK --check-prefix=FUNC ;RUN: llc < %s -march=r600 -mcpu=cayman | FileCheck %s --check-prefix=CM-CHECK --check-prefix=FUNC ;RUN: llc < %s -march=amdgcn -mcpu=SI | FileCheck %s --check-prefix=SI-CHECK --check-prefix=FUNC +;RUN: llc < %s -march=amdgcn -mcpu=tonga | FileCheck %s --check-prefix=SI-CHECK --check-prefix=FUNC ;FUNC-LABEL: {{^}}test: ;EG-CHECK: EXP_IEEE diff --git a/test/CodeGen/R600/llvm.log2.ll b/test/CodeGen/R600/llvm.log2.ll index 2373c6b036d..e4bfab92bf0 100644 --- a/test/CodeGen/R600/llvm.log2.ll +++ b/test/CodeGen/R600/llvm.log2.ll @@ -1,6 +1,7 @@ ;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s --check-prefix=EG-CHECK --check-prefix=FUNC ;RUN: llc < %s -march=r600 -mcpu=cayman | FileCheck %s --check-prefix=CM-CHECK --check-prefix=FUNC ;RUN: llc < %s -march=amdgcn -mcpu=SI | FileCheck %s --check-prefix=SI-CHECK --check-prefix=FUNC +;RUN: llc < %s -march=amdgcn -mcpu=tonga | FileCheck %s --check-prefix=SI-CHECK --check-prefix=FUNC ;FUNC-LABEL: {{^}}test: ;EG-CHECK: LOG_IEEE diff --git a/test/CodeGen/R600/llvm.memcpy.ll b/test/CodeGen/R600/llvm.memcpy.ll index 9771062ed0d..d6f5f6275ac 100644 --- a/test/CodeGen/R600/llvm.memcpy.ll +++ b/test/CodeGen/R600/llvm.memcpy.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s declare void @llvm.memcpy.p3i8.p3i8.i32(i8 addrspace(3)* nocapture, i8 addrspace(3)* nocapture, i32, i32, i1) nounwind declare void @llvm.memcpy.p1i8.p1i8.i64(i8 addrspace(1)* nocapture, i8 addrspace(1)* nocapture, i64, i32, i1) nounwind diff --git a/test/CodeGen/R600/llvm.rint.ll b/test/CodeGen/R600/llvm.rint.ll index 496cf07e7ca..661db51ad03 100644 --- a/test/CodeGen/R600/llvm.rint.ll +++ b/test/CodeGen/R600/llvm.rint.ll @@ -1,5 +1,6 @@ ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck %s -check-prefix=R600 -check-prefix=FUNC ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s ; FUNC-LABEL: {{^}}rint_f32: ; R600: RNDNE diff --git a/test/CodeGen/R600/llvm.sin.ll b/test/CodeGen/R600/llvm.sin.ll index d63d698b555..3bb245c2e24 100644 --- a/test/CodeGen/R600/llvm.sin.ll +++ b/test/CodeGen/R600/llvm.sin.ll @@ -1,6 +1,8 @@ ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s ; RUN: llc -march=amdgcn -mcpu=SI < %s | FileCheck -check-prefix=SI -check-prefix=SI-SAFE -check-prefix=FUNC %s ; RUN: llc -march=amdgcn -mcpu=SI -enable-unsafe-fp-math < %s | FileCheck -check-prefix=SI -check-prefix=SI-UNSAFE -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga < %s | FileCheck -check-prefix=SI -check-prefix=SI-SAFE -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga -enable-unsafe-fp-math < %s | FileCheck -check-prefix=SI -check-prefix=SI-UNSAFE -check-prefix=FUNC %s ; FUNC-LABEL: sin_f32 ; EG: MULADD_IEEE * diff --git a/test/CodeGen/R600/llvm.sqrt.ll b/test/CodeGen/R600/llvm.sqrt.ll index c0392256c20..5888124e6e3 100644 --- a/test/CodeGen/R600/llvm.sqrt.ll +++ b/test/CodeGen/R600/llvm.sqrt.ll @@ -1,5 +1,6 @@ ; RUN: llc < %s -march=r600 --mcpu=redwood | FileCheck %s --check-prefix=R600-CHECK ; RUN: llc < %s -march=r600 --mcpu=SI -verify-machineinstrs| FileCheck %s --check-prefix=SI-CHECK +; RUN: llc < %s -march=r600 --mcpu=tonga -verify-machineinstrs| FileCheck %s --check-prefix=SI-CHECK ; R600-CHECK-LABEL: {{^}}sqrt_f32: ; R600-CHECK: RECIPSQRT_CLAMPED * T{{[0-9]\.[XYZW]}}, KC0[2].Z diff --git a/test/CodeGen/R600/load-i1.ll b/test/CodeGen/R600/load-i1.ll index 85ec5eb9ec8..315c0a37ebf 100644 --- a/test/CodeGen/R600/load-i1.ll +++ b/test/CodeGen/R600/load-i1.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s ; RUN: llc -march=r600 -mcpu=cypress -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s ; FUNC-LABEL: {{^}}global_copy_i1_to_i1: diff --git a/test/CodeGen/R600/load.ll b/test/CodeGen/R600/load.ll index 5d043b42387..8142cae8876 100644 --- a/test/CodeGen/R600/load.ll +++ b/test/CodeGen/R600/load.ll @@ -1,6 +1,7 @@ ; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=R600-CHECK --check-prefix=FUNC %s ; RUN: llc < %s -march=r600 -mcpu=cayman | FileCheck --check-prefix=R600-CHECK --check-prefix=FUNC %s ; RUN: llc < %s -march=amdgcn -mcpu=SI -verify-machineinstrs | FileCheck --check-prefix=SI-CHECK --check-prefix=FUNC %s +; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck --check-prefix=SI-CHECK --check-prefix=FUNC %s ;===------------------------------------------------------------------------===; ; GLOBAL ADDRESS SPACE diff --git a/test/CodeGen/R600/load.vec.ll b/test/CodeGen/R600/load.vec.ll index bdd35d8f2f3..224e043a1bd 100644 --- a/test/CodeGen/R600/load.vec.ll +++ b/test/CodeGen/R600/load.vec.ll @@ -1,5 +1,6 @@ ; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=EG-CHECK %s ; RUN: llc < %s -march=amdgcn -mcpu=SI -verify-machineinstrs | FileCheck --check-prefix=SI-CHECK %s +; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck --check-prefix=SI-CHECK %s ; load a v2i32 value from the global address space. ; EG-CHECK: {{^}}load_v2i32: diff --git a/test/CodeGen/R600/load64.ll b/test/CodeGen/R600/load64.ll index b32d2d56267..cb3d6546606 100644 --- a/test/CodeGen/R600/load64.ll +++ b/test/CodeGen/R600/load64.ll @@ -1,4 +1,5 @@ ; RUN: llc < %s -march=amdgcn -mcpu=tahiti -verify-machineinstrs | FileCheck %s +; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s ; load a f64 value from the global address space. ; CHECK-LABEL: {{^}}load_f64: diff --git a/test/CodeGen/R600/loop-idiom.ll b/test/CodeGen/R600/loop-idiom.ll index 847a34bc4cd..a0b00ab644b 100644 --- a/test/CodeGen/R600/loop-idiom.ll +++ b/test/CodeGen/R600/loop-idiom.ll @@ -1,5 +1,6 @@ ; RUN: opt -basicaa -loop-idiom -S < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=R600 --check-prefix=FUNC %s ; RUN: opt -basicaa -loop-idiom -S < %s -march=amdgcn -mcpu=SI -verify-machineinstrs| FileCheck --check-prefix=SI --check-prefix=FUNC %s +; RUN: opt -basicaa -loop-idiom -S < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs| FileCheck --check-prefix=SI --check-prefix=FUNC %s target datalayout = "e-p:32:32-p1:64:64-p2:64:64-p3:32:32-p4:32:32-p5:64:64-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64" target triple = "r600--" diff --git a/test/CodeGen/R600/lshl.ll b/test/CodeGen/R600/lshl.ll index 66f7cbf1d5a..9ac988d38d1 100644 --- a/test/CodeGen/R600/lshl.ll +++ b/test/CodeGen/R600/lshl.ll @@ -1,4 +1,5 @@ ;RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck %s +;RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s ;CHECK: s_lshl_b32 s{{[0-9]}}, s{{[0-9]}}, 1 diff --git a/test/CodeGen/R600/lshr.ll b/test/CodeGen/R600/lshr.ll index ff6e6fd1489..50e444ac26b 100644 --- a/test/CodeGen/R600/lshr.ll +++ b/test/CodeGen/R600/lshr.ll @@ -1,4 +1,5 @@ ;RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck %s +;RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s ;CHECK: s_lshr_b32 s{{[0-9]}}, s{{[0-9]}}, 1 diff --git a/test/CodeGen/R600/m0-spill.ll b/test/CodeGen/R600/m0-spill.ll index dc9206ed3f9..4dade82325c 100644 --- a/test/CodeGen/R600/m0-spill.ll +++ b/test/CodeGen/R600/m0-spill.ll @@ -1,4 +1,5 @@ ; RUN: llc < %s -march=amdgcn -mcpu=SI -verify-machineinstrs | FileCheck %s +; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s @lds = external addrspace(3) global [64 x float] diff --git a/test/CodeGen/R600/mad_int24.ll b/test/CodeGen/R600/mad_int24.ll index 60f6e15f2f5..86d75a63ca4 100644 --- a/test/CodeGen/R600/mad_int24.ll +++ b/test/CodeGen/R600/mad_int24.ll @@ -1,6 +1,7 @@ ; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s --check-prefix=EG --check-prefix=FUNC ; RUN: llc < %s -march=r600 -mcpu=cayman | FileCheck %s --check-prefix=CM --check-prefix=FUNC ; RUN: llc < %s -march=amdgcn -mcpu=SI -verify-machineinstrs | FileCheck %s --check-prefix=SI --check-prefix=FUNC +; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s --check-prefix=SI --check-prefix=FUNC declare i32 @llvm.AMDGPU.imul24(i32, i32) nounwind readnone diff --git a/test/CodeGen/R600/mad_uint24.ll b/test/CodeGen/R600/mad_uint24.ll index db776521151..95fe3411959 100644 --- a/test/CodeGen/R600/mad_uint24.ll +++ b/test/CodeGen/R600/mad_uint24.ll @@ -1,6 +1,7 @@ ; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s --check-prefix=EG --check-prefix=FUNC ; RUN: llc < %s -march=r600 -mcpu=cayman | FileCheck %s --check-prefix=EG --check-prefix=FUNC ; RUN: llc < %s -march=amdgcn -mcpu=SI -verify-machineinstrs | FileCheck %s --check-prefix=SI --check-prefix=FUNC +; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s --check-prefix=SI --check-prefix=FUNC ; FUNC-LABEL: {{^}}u32_mad24: ; EG: MULADD_UINT24 diff --git a/test/CodeGen/R600/mul.ll b/test/CodeGen/R600/mul.ll index bdf18e3ff9e..6f15e706dff 100644 --- a/test/CodeGen/R600/mul.ll +++ b/test/CodeGen/R600/mul.ll @@ -1,5 +1,6 @@ ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG %s -check-prefix=FUNC ; RUN: llc -march=amdgcn -mcpu=verde -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s ; mul24 and mad24 are affected diff --git a/test/CodeGen/R600/mul_int24.ll b/test/CodeGen/R600/mul_int24.ll index eecde0d73af..7609dcc87af 100644 --- a/test/CodeGen/R600/mul_int24.ll +++ b/test/CodeGen/R600/mul_int24.ll @@ -1,6 +1,7 @@ ; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s --check-prefix=EG --check-prefix=FUNC ; RUN: llc < %s -march=r600 -mcpu=cayman | FileCheck %s --check-prefix=CM --check-prefix=FUNC ; RUN: llc < %s -march=amdgcn -mcpu=SI -verify-machineinstrs | FileCheck %s --check-prefix=SI --check-prefix=FUNC +; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s --check-prefix=SI --check-prefix=FUNC ; FUNC-LABEL: {{^}}i32_mul24: ; Signed 24-bit multiply is not supported on pre-Cayman GPUs. diff --git a/test/CodeGen/R600/mul_uint24.ll b/test/CodeGen/R600/mul_uint24.ll index 6d526c4b5d7..e640a7cd69f 100644 --- a/test/CodeGen/R600/mul_uint24.ll +++ b/test/CodeGen/R600/mul_uint24.ll @@ -1,6 +1,7 @@ ; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s --check-prefix=EG --check-prefix=FUNC ; RUN: llc < %s -march=r600 -mcpu=cayman | FileCheck %s --check-prefix=EG --check-prefix=FUNC ; RUN: llc < %s -march=amdgcn -mcpu=SI -verify-machineinstrs | FileCheck %s --check-prefix=SI --check-prefix=FUNC +; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s --check-prefix=SI --check-prefix=FUNC ; FUNC-LABEL: {{^}}u32_mul24: ; EG: MUL_UINT24 {{[* ]*}}T{{[0-9]\.[XYZW]}}, KC0[2].Z, KC0[2].W diff --git a/test/CodeGen/R600/mulhu.ll b/test/CodeGen/R600/mulhu.ll index 86597171230..29b0944a553 100644 --- a/test/CodeGen/R600/mulhu.ll +++ b/test/CodeGen/R600/mulhu.ll @@ -1,4 +1,5 @@ ;RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck %s +;RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s ;CHECK: v_mov_b32_e32 v{{[0-9]+}}, 0xaaaaaaab ;CHECK: v_mul_hi_u32 v0, {{v[0-9]+}}, {{s[0-9]+}} diff --git a/test/CodeGen/R600/no-initializer-constant-addrspace.ll b/test/CodeGen/R600/no-initializer-constant-addrspace.ll index 3c5e127625d..532edf07c30 100644 --- a/test/CodeGen/R600/no-initializer-constant-addrspace.ll +++ b/test/CodeGen/R600/no-initializer-constant-addrspace.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=SI -o /dev/null %s +; RUN: llc -march=amdgcn -mcpu=tonga -o /dev/null %s ; RUN: llc -march=r600 -mcpu=cypress -o /dev/null %s @extern_const_addrspace = external unnamed_addr addrspace(2) constant [5 x i32], align 4 diff --git a/test/CodeGen/R600/or.ll b/test/CodeGen/R600/or.ll index a23d219825d..c651049afb1 100644 --- a/test/CodeGen/R600/or.ll +++ b/test/CodeGen/R600/or.ll @@ -1,3 +1,4 @@ +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s ; RUN: llc -march=amdgcn -mcpu=verde -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s diff --git a/test/CodeGen/R600/private-memory-atomics.ll b/test/CodeGen/R600/private-memory-atomics.ll index 76556378383..3ceb0c00d11 100644 --- a/test/CodeGen/R600/private-memory-atomics.ll +++ b/test/CodeGen/R600/private-memory-atomics.ll @@ -1,4 +1,5 @@ ; RUN: llc -verify-machineinstrs -march=amdgcn -mcpu=SI < %s +; RUN: llc -verify-machineinstrs -march=amdgcn -mcpu=tonga < %s ; This works because promote allocas pass replaces these with LDS atomics. diff --git a/test/CodeGen/R600/private-memory-broken.ll b/test/CodeGen/R600/private-memory-broken.ll index 17330949613..10590a9802f 100644 --- a/test/CodeGen/R600/private-memory-broken.ll +++ b/test/CodeGen/R600/private-memory-broken.ll @@ -1,4 +1,5 @@ ; RUN: not llc -verify-machineinstrs -march=amdgcn -mcpu=SI %s -o /dev/null 2>&1 | FileCheck %s +; RUN: not llc -verify-machineinstrs -march=amdgcn -mcpu=tonga %s -o /dev/null 2>&1 | FileCheck %s ; Make sure promote alloca pass doesn't crash diff --git a/test/CodeGen/R600/reorder-stores.ll b/test/CodeGen/R600/reorder-stores.ll index 81e424aab21..ea50d5eed4d 100644 --- a/test/CodeGen/R600/reorder-stores.ll +++ b/test/CodeGen/R600/reorder-stores.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=SI < %s | FileCheck -check-prefix=SI %s +; RUN: llc -march=amdgcn -mcpu=tonga < %s | FileCheck -check-prefix=SI %s ; SI-LABEL: {{^}}no_reorder_v2f64_global_load_store: ; SI: buffer_load_dwordx2 diff --git a/test/CodeGen/R600/rotl.i64.ll b/test/CodeGen/R600/rotl.i64.ll index 13f251ee63e..f094ecef98f 100644 --- a/test/CodeGen/R600/rotl.i64.ll +++ b/test/CodeGen/R600/rotl.i64.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s ; FUNC-LABEL: {{^}}s_rotl_i64: ; SI-DAG: s_lshl_b64 diff --git a/test/CodeGen/R600/rotl.ll b/test/CodeGen/R600/rotl.ll index bcf8890beeb..6c144cd56ea 100644 --- a/test/CodeGen/R600/rotl.ll +++ b/test/CodeGen/R600/rotl.ll @@ -1,5 +1,6 @@ ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck --check-prefix=R600 -check-prefix=FUNC %s ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s ; FUNC-LABEL: {{^}}rotl_i32: ; R600: SUB_INT {{\** T[0-9]+\.[XYZW]}}, literal.x diff --git a/test/CodeGen/R600/rotr.i64.ll b/test/CodeGen/R600/rotr.i64.ll index 4568859b1ae..a637f71921e 100644 --- a/test/CodeGen/R600/rotr.i64.ll +++ b/test/CodeGen/R600/rotr.i64.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s ; FUNC-LABEL: {{^}}s_rotr_i64: ; SI-DAG: s_sub_i32 diff --git a/test/CodeGen/R600/rotr.ll b/test/CodeGen/R600/rotr.ll index dcd036e450d..044f9ffe6d6 100644 --- a/test/CodeGen/R600/rotr.ll +++ b/test/CodeGen/R600/rotr.ll @@ -1,5 +1,6 @@ ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck --check-prefix=R600 -check-prefix=FUNC %s ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s ; FUNC-LABEL: {{^}}rotr_i32: ; R600: BIT_ALIGN_INT diff --git a/test/CodeGen/R600/s_movk_i32.ll b/test/CodeGen/R600/s_movk_i32.ll index 469a6ba3a07..8be2d1d923c 100644 --- a/test/CodeGen/R600/s_movk_i32.ll +++ b/test/CodeGen/R600/s_movk_i32.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s ; SI-LABEL: {{^}}s_movk_i32_k0: ; SI-DAG: s_mov_b32 [[LO_S_IMM:s[0-9]+]], 0xffff{{$}} diff --git a/test/CodeGen/R600/saddo.ll b/test/CodeGen/R600/saddo.ll index 2f5f9af838f..8e625c1110a 100644 --- a/test/CodeGen/R600/saddo.ll +++ b/test/CodeGen/R600/saddo.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s ; RUN: llc -march=r600 -mcpu=cypress -verify-machineinstrs< %s declare { i32, i1 } @llvm.sadd.with.overflow.i32(i32, i32) nounwind readnone diff --git a/test/CodeGen/R600/scalar_to_vector.ll b/test/CodeGen/R600/scalar_to_vector.ll index 7ad964eb162..b82e5526f75 100644 --- a/test/CodeGen/R600/scalar_to_vector.ll +++ b/test/CodeGen/R600/scalar_to_vector.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s ; FUNC-LABEL: {{^}}scalar_to_vector_v2i32: diff --git a/test/CodeGen/R600/schedule-vs-if-nested-loop-failure.ll b/test/CodeGen/R600/schedule-vs-if-nested-loop-failure.ll index dee90f311f1..76b655d712d 100644 --- a/test/CodeGen/R600/schedule-vs-if-nested-loop-failure.ll +++ b/test/CodeGen/R600/schedule-vs-if-nested-loop-failure.ll @@ -1,6 +1,7 @@ ; XFAIL: * ; REQUIRES: asserts ; RUN: llc -O0 -march=amdgcn -mcpu=SI -verify-machineinstrs< %s | FileCheck %s -check-prefix=SI +; RUN: llc -O0 -march=amdgcn -mcpu=tonga -verify-machineinstrs< %s | FileCheck %s -check-prefix=SI declare void @llvm.AMDGPU.barrier.local() nounwind noduplicate diff --git a/test/CodeGen/R600/sdiv.ll b/test/CodeGen/R600/sdiv.ll index c635c0569e8..07bb41768ee 100644 --- a/test/CodeGen/R600/sdiv.ll +++ b/test/CodeGen/R600/sdiv.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=SI < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s ; The code generated by sdiv is long and complex and may frequently change. diff --git a/test/CodeGen/R600/sdivrem24.ll b/test/CodeGen/R600/sdivrem24.ll index bb90343dbfe..e8c5c252bd7 100644 --- a/test/CodeGen/R600/sdivrem24.ll +++ b/test/CodeGen/R600/sdivrem24.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=SI < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s ; FUNC-LABEL: {{^}}sdiv24_i8: diff --git a/test/CodeGen/R600/select-i1.ll b/test/CodeGen/R600/select-i1.ll index bb778dd264d..6735394e93a 100644 --- a/test/CodeGen/R600/select-i1.ll +++ b/test/CodeGen/R600/select-i1.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s ; FIXME: This should go in existing select.ll test, except the current testcase there is broken on SI diff --git a/test/CodeGen/R600/select-vectors.ll b/test/CodeGen/R600/select-vectors.ll index d982603335f..59082c65cc8 100644 --- a/test/CodeGen/R600/select-vectors.ll +++ b/test/CodeGen/R600/select-vectors.ll @@ -1,4 +1,5 @@ ; RUN: llc -verify-machineinstrs -march=amdgcn -mcpu=SI < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -verify-machineinstrs -march=amdgcn -mcpu=tonga < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s ; Test expansion of scalar selects on vectors. ; Evergreen not enabled since it seems to be having problems with doubles. diff --git a/test/CodeGen/R600/select64.ll b/test/CodeGen/R600/select64.ll index f48ec2135de..3fd648139fe 100644 --- a/test/CodeGen/R600/select64.ll +++ b/test/CodeGen/R600/select64.ll @@ -1,4 +1,5 @@ ; RUN: llc < %s -march=amdgcn -mcpu=SI -verify-machineinstrs | FileCheck %s +; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s ; CHECK-LABEL: {{^}}select0: ; i64 select should be split into two i32 selects, and we shouldn't need diff --git a/test/CodeGen/R600/selectcc-opt.ll b/test/CodeGen/R600/selectcc-opt.ll index feaea87592b..7780371329c 100644 --- a/test/CodeGen/R600/selectcc-opt.ll +++ b/test/CodeGen/R600/selectcc-opt.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=SI < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s diff --git a/test/CodeGen/R600/selectcc.ll b/test/CodeGen/R600/selectcc.ll index d0ae5bfe91a..f378e15dd76 100644 --- a/test/CodeGen/R600/selectcc.ll +++ b/test/CodeGen/R600/selectcc.ll @@ -1,5 +1,6 @@ ; RUN: llc -verify-machineinstrs -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s ; RUN: llc -verify-machineinstrs -march=amdgcn -mcpu=SI < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -verify-machineinstrs -march=amdgcn -mcpu=tonga < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s ; FUNC-LABEL: {{^}}selectcc_i64: ; EG: XOR_INT diff --git a/test/CodeGen/R600/setcc64.ll b/test/CodeGen/R600/setcc64.ll index c0632198efd..231be7aa3da 100644 --- a/test/CodeGen/R600/setcc64.ll +++ b/test/CodeGen/R600/setcc64.ll @@ -1,4 +1,5 @@ ;RUN: llc < %s -march=amdgcn -mcpu=SI -verify-machineinstrs| FileCheck --check-prefix=SI --check-prefix=FUNC %s +;RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs| FileCheck --check-prefix=SI --check-prefix=FUNC %s ; XXX: Merge this into setcc, once R600 supports 64-bit operations diff --git a/test/CodeGen/R600/seto.ll b/test/CodeGen/R600/seto.ll index c6265a451c5..9b5d6b5dbd6 100644 --- a/test/CodeGen/R600/seto.ll +++ b/test/CodeGen/R600/seto.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=verde -verify-machineinstrs < %s | FileCheck %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck %s ; CHECK-LABEL: {{^}}main: ; CHECK: v_cmp_o_f32_e64 [[CMP:s\[[0-9]+:[0-9]+\]]], [[SREG:s[0-9]+]], [[SREG]] diff --git a/test/CodeGen/R600/setuo.ll b/test/CodeGen/R600/setuo.ll index f2113096e3a..76346c4f624 100644 --- a/test/CodeGen/R600/setuo.ll +++ b/test/CodeGen/R600/setuo.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=verde -verify-machineinstrs < %s | FileCheck %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck %s ; CHECK-LABEL: {{^}}main: ; CHECK: v_cmp_u_f32_e64 [[CMP:s\[[0-9]+:[0-9]+\]]], [[SREG:s[0-9]+]], [[SREG]] diff --git a/test/CodeGen/R600/sgpr-copy-duplicate-operand.ll b/test/CodeGen/R600/sgpr-copy-duplicate-operand.ll index ad5e0a7765a..893f5a3c50d 100644 --- a/test/CodeGen/R600/sgpr-copy-duplicate-operand.ll +++ b/test/CodeGen/R600/sgpr-copy-duplicate-operand.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs< %s | FileCheck -check-prefix=SI %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs< %s | FileCheck -check-prefix=SI %s ; Copy VGPR -> SGPR used twice as an instruction operand, which is then ; used in an REG_SEQUENCE that also needs to be handled. diff --git a/test/CodeGen/R600/sgpr-copy.ll b/test/CodeGen/R600/sgpr-copy.ll index db11af5cdab..57cbadd9239 100644 --- a/test/CodeGen/R600/sgpr-copy.ll +++ b/test/CodeGen/R600/sgpr-copy.ll @@ -1,4 +1,5 @@ ; RUN: llc < %s -march=amdgcn -mcpu=SI -verify-machineinstrs | FileCheck %s +; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s ; This test checks that no VGPR to SGPR copies are created by the register ; allocator. diff --git a/test/CodeGen/R600/shl.ll b/test/CodeGen/R600/shl.ll index 98d9494e4e1..75341a2306f 100644 --- a/test/CodeGen/R600/shl.ll +++ b/test/CodeGen/R600/shl.ll @@ -1,5 +1,6 @@ ;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=EG-CHECK %s ;RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck --check-prefix=SI-CHECK %s +;RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck --check-prefix=SI-CHECK %s ;EG-CHECK: {{^}}shl_v2i32: ;EG-CHECK: LSHL {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} diff --git a/test/CodeGen/R600/shl_add_ptr.ll b/test/CodeGen/R600/shl_add_ptr.ll index cef48e227ef..15602e82060 100644 --- a/test/CodeGen/R600/shl_add_ptr.ll +++ b/test/CodeGen/R600/shl_add_ptr.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=bonaire -verify-machineinstrs -mattr=+load-store-opt -enable-misched < %s | FileCheck -check-prefix=SI %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs -mattr=+load-store-opt -enable-misched < %s | FileCheck -check-prefix=SI %s ; Test that doing a shift of a pointer with a constant add will be ; folded into the constant offset addressing mode even if the add has diff --git a/test/CodeGen/R600/si-annotate-cf-assertion.ll b/test/CodeGen/R600/si-annotate-cf-assertion.ll index 515064f3076..69d719385ac 100644 --- a/test/CodeGen/R600/si-annotate-cf-assertion.ll +++ b/test/CodeGen/R600/si-annotate-cf-assertion.ll @@ -1,6 +1,7 @@ ; REQUIRES: asserts ; XFAIL: * ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs-asm-verbose=false < %s | FileCheck %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs-asm-verbose=false < %s | FileCheck %s define void @test(i32 addrspace(1)* %g, i8 addrspace(3)* %l, i32 %x) nounwind { diff --git a/test/CodeGen/R600/si-lod-bias.ll b/test/CodeGen/R600/si-lod-bias.ll index 2e2f2ce5fec..d6cbd0fd367 100644 --- a/test/CodeGen/R600/si-lod-bias.ll +++ b/test/CodeGen/R600/si-lod-bias.ll @@ -1,4 +1,5 @@ ;RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck %s +;RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s ; This shader has the potential to generated illegal VGPR to SGPR copies if ; the wrong register class is used for the REG_SEQUENCE instructions. diff --git a/test/CodeGen/R600/si-sgpr-spill.ll b/test/CodeGen/R600/si-sgpr-spill.ll index f1c20fe8977..ef3e77928f6 100644 --- a/test/CodeGen/R600/si-sgpr-spill.ll +++ b/test/CodeGen/R600/si-sgpr-spill.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=SI < %s | FileCheck %s +; RUN: llc -march=amdgcn -mcpu=tonga < %s | FileCheck %s ; These tests check that the compiler won't crash when it needs to spill ; SGPRs. diff --git a/test/CodeGen/R600/si-vector-hang.ll b/test/CodeGen/R600/si-vector-hang.ll index 8cbb4914c85..61812c61ba1 100644 --- a/test/CodeGen/R600/si-vector-hang.ll +++ b/test/CodeGen/R600/si-vector-hang.ll @@ -1,4 +1,5 @@ ; RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck %s +; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s ; CHECK: {{^}}test_8_min_char: ; CHECK: buffer_store_byte diff --git a/test/CodeGen/R600/sign_extend.ll b/test/CodeGen/R600/sign_extend.ll index 1d90fdbec85..9550c2a7f06 100644 --- a/test/CodeGen/R600/sign_extend.ll +++ b/test/CodeGen/R600/sign_extend.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s ; SI-LABEL: {{^}}s_sext_i1_to_i32: ; SI: v_cndmask_b32_e64 diff --git a/test/CodeGen/R600/simplify-demanded-bits-build-pair.ll b/test/CodeGen/R600/simplify-demanded-bits-build-pair.ll index e02350cc23f..28a413cd1b3 100644 --- a/test/CodeGen/R600/simplify-demanded-bits-build-pair.ll +++ b/test/CodeGen/R600/simplify-demanded-bits-build-pair.ll @@ -1,5 +1,6 @@ ; XFAIL: * ; RUN: llc -verify-machineinstrs -march=amdgcn -mcpu=SI -mattr=-promote-alloca < %s | FileCheck -check-prefix=SI %s +; RUN: llc -verify-machineinstrs -march=amdgcn -mcpu=tonga -mattr=-promote-alloca < %s | FileCheck -check-prefix=SI %s ; 64-bit select was originally lowered with a build_pair, and this ; could be simplified to 1 cndmask instead of 2, but that broken when diff --git a/test/CodeGen/R600/sint_to_fp.ll b/test/CodeGen/R600/sint_to_fp.ll index dd541bb36a2..6a291cfe926 100644 --- a/test/CodeGen/R600/sint_to_fp.ll +++ b/test/CodeGen/R600/sint_to_fp.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=R600 -check-prefix=FUNC %s diff --git a/test/CodeGen/R600/sra.ll b/test/CodeGen/R600/sra.ll index d463fc20b9c..f062e4c4e6f 100644 --- a/test/CodeGen/R600/sra.ll +++ b/test/CodeGen/R600/sra.ll @@ -1,5 +1,6 @@ ;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=EG-CHECK %s ;RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck --check-prefix=SI-CHECK %s +;RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck --check-prefix=SI-CHECK %s ;EG-CHECK-LABEL: {{^}}ashr_v2i32: ;EG-CHECK: ASHR {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} diff --git a/test/CodeGen/R600/srem.ll b/test/CodeGen/R600/srem.ll index ea96c39fb44..510db0e3448 100644 --- a/test/CodeGen/R600/srem.ll +++ b/test/CodeGen/R600/srem.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=SI < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s ; RUN: llc -march=r600 -mcpu=redwood < %s define void @srem_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %in) { diff --git a/test/CodeGen/R600/ssubo.ll b/test/CodeGen/R600/ssubo.ll index ccf76ca29c7..09d3959b2b3 100644 --- a/test/CodeGen/R600/ssubo.ll +++ b/test/CodeGen/R600/ssubo.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s ; RUN: llc -march=r600 -mcpu=cypress -verify-machineinstrs< %s declare { i32, i1 } @llvm.ssub.with.overflow.i32(i32, i32) nounwind readnone diff --git a/test/CodeGen/R600/store-v3i32.ll b/test/CodeGen/R600/store-v3i32.ll index 42132f6ddba..33617b55ed6 100644 --- a/test/CodeGen/R600/store-v3i32.ll +++ b/test/CodeGen/R600/store-v3i32.ll @@ -1,5 +1,6 @@ ; XFAIL: * ; RUN: llc -verify-machineinstrs -march=amdgcn -mcpu=SI < %s | FileCheck -check-prefix=SI %s +; RUN: llc -verify-machineinstrs -march=amdgcn -mcpu=tonga < %s | FileCheck -check-prefix=SI %s ; 3 vectors have the same size and alignment as 4 vectors, so this ; should be done in a single store. diff --git a/test/CodeGen/R600/store-v3i64.ll b/test/CodeGen/R600/store-v3i64.ll index 82d427e4fa7..4db9b67e011 100644 --- a/test/CodeGen/R600/store-v3i64.ll +++ b/test/CodeGen/R600/store-v3i64.ll @@ -1,5 +1,6 @@ ; XFAIL: * ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs< %s | FileCheck -check-prefix=SI +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs< %s | FileCheck -check-prefix=SI ; SI-LABEL: {{^}}global_store_v3i64: ; SI: buffer_store_dwordx4 diff --git a/test/CodeGen/R600/store-vector-ptrs.ll b/test/CodeGen/R600/store-vector-ptrs.ll index 868b68d10ef..ba4d94f7324 100644 --- a/test/CodeGen/R600/store-vector-ptrs.ll +++ b/test/CodeGen/R600/store-vector-ptrs.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs< %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs< %s ; This tests for a bug that caused a crash in ; AMDGPUDAGToDAGISel::SelectMUBUFScratch() which is used for selecting diff --git a/test/CodeGen/R600/store.ll b/test/CodeGen/R600/store.ll index 8e5cb2a4e6d..49227e9af7d 100644 --- a/test/CodeGen/R600/store.ll +++ b/test/CodeGen/R600/store.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=verde -verify-machineinstrs < %s | FileCheck -check-prefix=SI-CHECK -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI-CHECK -check-prefix=FUNC %s ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG-CHECK -check-prefix=FUNC %s ; RUN: llc -march=r600 -mcpu=cayman < %s | FileCheck -check-prefix=CM-CHECK -check-prefix=FUNC %s diff --git a/test/CodeGen/R600/subreg-coalescer-crash.ll b/test/CodeGen/R600/subreg-coalescer-crash.ll index e841637b504..8a2821fd862 100644 --- a/test/CodeGen/R600/subreg-coalescer-crash.ll +++ b/test/CodeGen/R600/subreg-coalescer-crash.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs -o - %s +; RUN: llc -march=r600 -mcpu=tonga -verify-machineinstrs -o - %s ; ModuleID = 'bugpoint-reduced-simplified.bc' target datalayout = "e-p:32:32-p1:64:64-p2:64:64-p3:32:32-p4:64:64-p5:32:32-p24:64:64-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64" target triple = "r600--" diff --git a/test/CodeGen/R600/trunc-cmp-constant.ll b/test/CodeGen/R600/trunc-cmp-constant.ll index 73c35512d77..67a9aaffb6f 100644 --- a/test/CodeGen/R600/trunc-cmp-constant.ll +++ b/test/CodeGen/R600/trunc-cmp-constant.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=r600 -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s ; FUNC-LABEL {{^}}sextload_i1_to_i32_trunc_cmp_eq_0: ; SI: buffer_load_ubyte [[LOAD:v[0-9]+]] diff --git a/test/CodeGen/R600/trunc-store-i1.ll b/test/CodeGen/R600/trunc-store-i1.ll index 83b546f93a4..b71a838b62c 100644 --- a/test/CodeGen/R600/trunc-store-i1.ll +++ b/test/CodeGen/R600/trunc-store-i1.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs< %s | FileCheck -check-prefix=SI %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs< %s | FileCheck -check-prefix=SI %s ; SI-LABEL: {{^}}global_truncstore_i32_to_i1: diff --git a/test/CodeGen/R600/uaddo.ll b/test/CodeGen/R600/uaddo.ll index ac296041250..57d7835f99f 100644 --- a/test/CodeGen/R600/uaddo.ll +++ b/test/CodeGen/R600/uaddo.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s ; RUN: llc -march=r600 -mcpu=cypress -verify-machineinstrs< %s declare { i32, i1 } @llvm.uadd.with.overflow.i32(i32, i32) nounwind readnone diff --git a/test/CodeGen/R600/udiv.ll b/test/CodeGen/R600/udiv.ll index e9a6155da6f..a6ce5e93ac9 100644 --- a/test/CodeGen/R600/udiv.ll +++ b/test/CodeGen/R600/udiv.ll @@ -1,5 +1,6 @@ ;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=EG-CHECK %s ;RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck --check-prefix=SI-CHECK %s +;RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck --check-prefix=SI-CHECK %s ;EG-CHECK-LABEL: {{^}}test: ;EG-CHECK-NOT: SETGE_INT diff --git a/test/CodeGen/R600/udivrem.ll b/test/CodeGen/R600/udivrem.ll index 2254a2abd5b..b439d7aa892 100644 --- a/test/CodeGen/R600/udivrem.ll +++ b/test/CodeGen/R600/udivrem.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck --check-prefix=SI --check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck --check-prefix=SI --check-prefix=FUNC %s ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck --check-prefix=EG --check-prefix=FUNC %s ; FUNC-LABEL: {{^}}test_udivrem: diff --git a/test/CodeGen/R600/udivrem24.ll b/test/CodeGen/R600/udivrem24.ll index 0e15c0730c0..4b98ac67b22 100644 --- a/test/CodeGen/R600/udivrem24.ll +++ b/test/CodeGen/R600/udivrem24.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=SI < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s ; FUNC-LABEL: {{^}}udiv24_i8: diff --git a/test/CodeGen/R600/udivrem64.ll b/test/CodeGen/R600/udivrem64.ll index a147e81d581..44ac1217295 100644 --- a/test/CodeGen/R600/udivrem64.ll +++ b/test/CodeGen/R600/udivrem64.ll @@ -1,4 +1,5 @@ ;RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck --check-prefix=SI --check-prefix=FUNC %s +;RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck --check-prefix=SI --check-prefix=FUNC %s ;RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck --check-prefix=EG --check-prefix=FUNC %s ;FUNC-LABEL: {{^}}test_udiv: diff --git a/test/CodeGen/R600/uint_to_fp.ll b/test/CodeGen/R600/uint_to_fp.ll index 1c5e487724b..cf14c25759f 100644 --- a/test/CodeGen/R600/uint_to_fp.ll +++ b/test/CodeGen/R600/uint_to_fp.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=R600 -check-prefix=FUNC %s ; FUNC-LABEL: {{^}}uint_to_fp_i32_to_f32: diff --git a/test/CodeGen/R600/unaligned-load-store.ll b/test/CodeGen/R600/unaligned-load-store.ll index 47fba78544d..2c4e02f912d 100644 --- a/test/CodeGen/R600/unaligned-load-store.ll +++ b/test/CodeGen/R600/unaligned-load-store.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs< %s | FileCheck -check-prefix=SI %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs< %s | FileCheck -check-prefix=SI %s ; SI-LABEL: {{^}}unaligned_load_store_i32: ; SI: ds_read_u8 diff --git a/test/CodeGen/R600/unhandled-loop-condition-assertion.ll b/test/CodeGen/R600/unhandled-loop-condition-assertion.ll index 9faeed6d656..c615f0b8491 100644 --- a/test/CodeGen/R600/unhandled-loop-condition-assertion.ll +++ b/test/CodeGen/R600/unhandled-loop-condition-assertion.ll @@ -1,6 +1,7 @@ ; REQUIRES: asserts ; XFAIL: * ; RUN: llc -O0 -verify-machineinstrs -asm-verbose=0 -march=amdgcn -mcpu=SI < %s | FileCheck -check-prefix=SI -check-prefix=COMMON %s +; RUN: llc -O0 -verify-machineinstrs -asm-verbose=0 -march=amdgcn -mcpu=tonga < %s | FileCheck -check-prefix=SI -check-prefix=COMMON %s ; RUN: llc -O0 -verify-machineinstrs -asm-verbose=0 -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG -check-prefix=COMMON %s ; SI hits an assertion at -O0, evergreen hits a not implemented unreachable. diff --git a/test/CodeGen/R600/urecip.ll b/test/CodeGen/R600/urecip.ll index 132f0009cda..daacc771708 100644 --- a/test/CodeGen/R600/urecip.ll +++ b/test/CodeGen/R600/urecip.ll @@ -1,4 +1,5 @@ ;RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck %s +;RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s ;CHECK: v_rcp_iflag_f32_e32 diff --git a/test/CodeGen/R600/urem.ll b/test/CodeGen/R600/urem.ll index a58a550f823..aa2a3eb3aef 100644 --- a/test/CodeGen/R600/urem.ll +++ b/test/CodeGen/R600/urem.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=verde -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s ; The code generated by urem is long and complex and may frequently diff --git a/test/CodeGen/R600/usubo.ll b/test/CodeGen/R600/usubo.ll index 1af595421b8..be1e66673bc 100644 --- a/test/CodeGen/R600/usubo.ll +++ b/test/CodeGen/R600/usubo.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s ; RUN: llc -march=r600 -mcpu=cypress -verify-machineinstrs< %s declare { i32, i1 } @llvm.usub.with.overflow.i32(i32, i32) nounwind readnone diff --git a/test/CodeGen/R600/v_cndmask.ll b/test/CodeGen/R600/v_cndmask.ll index 410e1b5a47a..85936ecda77 100644 --- a/test/CodeGen/R600/v_cndmask.ll +++ b/test/CodeGen/R600/v_cndmask.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s declare i32 @llvm.r600.read.tidig.x() #1 diff --git a/test/CodeGen/R600/vector-alloca.ll b/test/CodeGen/R600/vector-alloca.ll index 8f73f657ccd..228868aa7fe 100644 --- a/test/CodeGen/R600/vector-alloca.ll +++ b/test/CodeGen/R600/vector-alloca.ll @@ -1,6 +1,8 @@ ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck --check-prefix=EG -check-prefix=FUNC %s ; RUN: llc -march=amdgcn -mcpu=verde -mattr=-promote-alloca -verify-machineinstrs < %s | FileCheck -check-prefix=SI-ALLOCA -check-prefix=SI -check-prefix=FUNC %s ; RUN: llc -march=amdgcn -mcpu=verde -mattr=+promote-alloca -verify-machineinstrs < %s | FileCheck -check-prefix=SI-PROMOTE -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-promote-alloca -verify-machineinstrs < %s | FileCheck -check-prefix=SI-ALLOCA -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga -mattr=+promote-alloca -verify-machineinstrs < %s | FileCheck -check-prefix=SI-PROMOTE -check-prefix=SI -check-prefix=FUNC %s ; FUNC-LABEL: {{^}}vector_read: ; EG: MOV diff --git a/test/CodeGen/R600/vop-shrink.ll b/test/CodeGen/R600/vop-shrink.ll index 11d91293c5b..d5a46e38ce2 100644 --- a/test/CodeGen/R600/vop-shrink.ll +++ b/test/CodeGen/R600/vop-shrink.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s ; Test that we correctly commute a sub instruction ; FUNC-LABEL: {{^}}sub_rev: diff --git a/test/CodeGen/R600/vselect.ll b/test/CodeGen/R600/vselect.ll index 1fa8d4a49e1..809ccf8fcc9 100644 --- a/test/CodeGen/R600/vselect.ll +++ b/test/CodeGen/R600/vselect.ll @@ -1,5 +1,6 @@ ;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=EG-CHECK %s ;RUN: llc < %s -march=amdgcn -mcpu=SI -verify-machineinstrs | FileCheck --check-prefix=SI-CHECK %s +;RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck --check-prefix=SI-CHECK %s ;EG-CHECK: {{^}}test_select_v2i32: ;EG-CHECK: CNDE_INT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} diff --git a/test/CodeGen/R600/wait.ll b/test/CodeGen/R600/wait.ll index b30f86ccd0d..93cfdd46093 100644 --- a/test/CodeGen/R600/wait.ll +++ b/test/CodeGen/R600/wait.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -strict-whitespace %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -strict-whitespace %s ; CHECK-LABEL: {{^}}main: ; CHECK: s_load_dwordx4 diff --git a/test/CodeGen/R600/xor.ll b/test/CodeGen/R600/xor.ll index af6196dabe9..b43ff400647 100644 --- a/test/CodeGen/R600/xor.ll +++ b/test/CodeGen/R600/xor.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=verde -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s diff --git a/test/CodeGen/R600/zero_extend.ll b/test/CodeGen/R600/zero_extend.ll index 7df4b48c2b9..4492385ca39 100644 --- a/test/CodeGen/R600/zero_extend.ll +++ b/test/CodeGen/R600/zero_extend.ll @@ -1,5 +1,6 @@ ; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s --check-prefix=R600-CHECK ; RUN: llc < %s -march=amdgcn -mcpu=SI -verify-machineinstrs | FileCheck %s --check-prefix=SI-CHECK +; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s --check-prefix=SI-CHECK ; R600-CHECK: {{^}}test: ; R600-CHECK: MEM_RAT_CACHELESS STORE_RAW -- 2.34.1