From fe8babf689c624c53d03f5629324b049b5327a6e Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Fri, 5 May 2006 22:32:12 +0000 Subject: [PATCH] Implement ComputeMaskedBits/SimplifyDemandedBits for ISD::TRUNCATE git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28135 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/SelectionDAG/TargetLowering.cpp | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/lib/CodeGen/SelectionDAG/TargetLowering.cpp index 041d91ee72a..30ef67256f4 100644 --- a/lib/CodeGen/SelectionDAG/TargetLowering.cpp +++ b/lib/CodeGen/SelectionDAG/TargetLowering.cpp @@ -607,6 +607,16 @@ bool TargetLowering::SimplifyDemandedBits(SDOperand Op, uint64_t DemandedMask, assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); break; } + case ISD::TRUNCATE: { + if (SimplifyDemandedBits(Op.getOperand(0), DemandedMask, + KnownZero, KnownOne, TLO, Depth+1)) + return true; + assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); + uint64_t OutMask = MVT::getIntVTBitMask(Op.getValueType()); + KnownZero &= OutMask; + KnownOne &= OutMask; + break; + } case ISD::AssertZext: { MVT::ValueType VT = cast(Op.getOperand(1))->getVT(); uint64_t InMask = MVT::getIntVTBitMask(VT); @@ -864,6 +874,14 @@ void TargetLowering::ComputeMaskedBits(SDOperand Op, uint64_t Mask, KnownZero, KnownOne, Depth+1); return; } + case ISD::TRUNCATE: { + ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1); + assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); + uint64_t OutMask = MVT::getIntVTBitMask(Op.getValueType()); + KnownZero &= OutMask; + KnownOne &= OutMask; + break; + } case ISD::AssertZext: { MVT::ValueType VT = cast(Op.getOperand(1))->getVT(); uint64_t InMask = MVT::getIntVTBitMask(VT); -- 2.34.1