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AddDiscriminators: Create new MDLocation directly
2015-04-13
Jan Vesely
Revert revisions r234755, r234759, r234760
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2015-04-13
Jan Vesely
R600: Add carry and borrow instructions. Use them to...
Signed-off-by:
Jan Vesely
<jan.vesely@rutgers.edu>
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2015-04-13
Jan Vesely
LegalizeDAG: Try to use Overflow operations when expanding...
Signed-off-by:
Jan Vesely
<jan.vesely@rutgers.edu>
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2015-04-12
Jan Vesely
R600: Make FMIN/MAXNUM legal on all asics
Signed-off-by:
Jan Vesely
<jan.vesely@rutgers.edu>
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2015-04-12
Jan Vesely
R600: remove manual BFE optimization
Signed-off-by:
Jan Vesely
<jan.vesely@rutgers.edu>
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2015-03-13
Jan Vesely
r600: Clear visited structure before running.
Signed-off-by:
Jan Vesely
<jan.vesely@rutgers.edu>
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2015-03-13
Jan Vesely
r600: Use deque and simplify loops in AMDGPUCFGStructurizer
Signed-off-by:
Jan Vesely
<jan.vesely@rutgers.edu>
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2015-03-02
Jan Vesely
Support: Use const pointers for reads.
Signed-off-by:
Jan Vesely
<jan.vesely@rutgers.edu>
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2015-03-02
Jan Vesely
R600: Use c++11 style for loop
Signed-off-by:
Jan Vesely
<jan.vesely@rutgers.edu>
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2015-01-22
Jan Vesely
R600: Try to use lower types for 64bit division if...
Signed-off-by:
Jan Vesely
<jan.vesely@rutgers.edu>
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2015-01-22
Jan Vesely
SelectionDAG: Add KnownBits and SignBits computation...
Signed-off-by:
Jan Vesely
<jan.vesely@rutgers.edu>
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2015-01-22
Jan Vesely
R600: Simplify LowerUDIVREM
Signed-off-by:
Jan Vesely
<jan.vesely@rutgers.edu>
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2014-10-17
Jan Vesely
Mips: Only set divrem i64 to custom on 64bit
Signed-off-by:
Jan Vesely
<jan.vesely@rutgers.edu>
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2014-10-17
Jan Vesely
R600: Add EG to FMA test
Signed-off-by:
Jan Vesely
<jan.vesely@rutgers.edu>
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2014-10-17
Jan Vesely
SelectionDAG: Add sext_inreg optimizations
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Jan Vesely
<jan.vesely@rutgers.edu>
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2014-10-14
Jan Vesely
Reapply "R600: Add new intrinsic to read work dimensions"
Signed-off-by:
Jan Vesely
<jan.vesely@rutgers.edu>
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2014-10-14
Jan Vesely
R600: Add new intrinsic to read work dimensions
Signed-off-by:
Jan Vesely
<jan.vesely@rutgers.edu>
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2014-10-14
Jan Vesely
R600: FMA is VecALU only instruction
Signed-off-by:
Jan Vesely
<jan.vesely@rutgers.edu>
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2014-09-05
Jan Vesely
R600: Fix FROUND
Signed-off-by:
Jan Vesely
<jan.vesely@rutgers.edu>
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2014-09-04
Jan Vesely
build/cmake: Fix CMP0023 warning with libffi
Signed-off-by:
Jan Vesely
<jan.vesely@rutgers.edu>
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2014-08-13
Jan Vesely
utils: Fix segfault in flattencfg
Signed-off-by:
Jan Vesely
<jan.vesely@rutgers.edu>
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2014-08-13
Jan Vesely
Initialize FlattenCFG pass
Signed-off-by:
Jan Vesely
<jan.vesely@rutgers.edu>
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2014-08-12
Jan Vesely
R600: Use optimized 24bit path in udivrem
Signed-off-by:
Jan Vesely
<jan.vesely@rutgers.edu>
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2014-08-12
Jan Vesely
R600: Remove unused code.
Signed-off-by:
Jan Vesely
<jan.vesely@rutgers.edu>
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2014-08-12
Jan Vesely
R600: Use i24 optimized path for SREM
Signed-off-by:
Jan Vesely
<jan.vesely@rutgers.edu>
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2014-07-31
Jan Vesely
R600: Modernize work item intrinsics test
Signed-off-by:
Jan Vesely
<jan.vesely@rutgers.edu>
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2014-07-15
Jan Vesely
R600: Implement zero undef variants of ctlz/cttz
Signed-off-by:
Jan Vesely
<jan.vesely@rutgers.edu>
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2014-07-10
Jan Vesely
R600: Implement float to long/ulong
Signed-off-by:
Jan Vesely
<jan.vesely@rutgers.edu>
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2014-07-10
Jan Vesely
SelectionDAG: Factor FP_TO_SINT lower code out of DAGLegalizer
Signed-off-by:
Jan Vesely
<jan.vesely@rutgers.edu>
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2014-06-22
Jan Vesely
R600: Use LowerSDIVREM for i64 node replace
Signed-off-by:
Jan Vesely
<jan.vesely@rutgers.edu>
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2014-06-22
Jan Vesely
R600: Implement custom SDIVREM.
Signed-off-by:
Jan Vesely
<jan.vesely@rutgers.edu>
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2014-06-22
Jan Vesely
R600: Add udivrem test
Signed-off-by:
Jan Vesely
<jan.vesely@rutgers.edu>
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2014-06-18
Jan Vesely
R600: Expand vector fceil
Signed-off-by:
Jan Vesely
<jan.vesely@rutgers.edu>
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2014-06-18
Jan Vesely
R600: Implement 64bit SRA
Signed-off-by:
Jan Vesely
<jan.vesely@rutgers.edu>
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2014-06-18
Jan Vesely
R600: Implement 64bit SRL
Signed-off-by:
Jan Vesely
<jan.vesely@rutgers.edu>
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2014-06-18
Jan Vesely
R600: Implement 64bit SHL
Signed-off-by:
Jan Vesely
<jan.vesely@rutgers.edu>
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