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drm/i915: Eliminate plane control register RMW from sprite code
2015-03-20 Ville Syrjälädrm/i915: Eliminate plane control register RMW from...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-20 Ville Syrjälädrm/i915: Eliminate the RMW sprite colorkey management
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-20 Matt Roperdrm/i915: Move vblank wait determination to 'check...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-20 Imre Deakdrm/i915/chv: use vlv_PLL_is_optimal in chv_find_best_dpll
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-20 Imre Deakdrm/i915: check for div-by-zero in vlv_PLL_is_optimal
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-20 Imre Deakdrm/i915: factor out vlv_PLL_is_optimal
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-20 Ville Syrjälädrm/i915: Kill intel_plane->obj
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-20 Ben Widawskydrm/i915: Initialize all contexts
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-20 Ben Widawskydrm/i915: Track page table reload need
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-20 Ben Widawskydrm/i915: Track GEN6 page table usage
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-20 Ben Widawskydrm/i915: Extract context switch skip and add pd load...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-20 Michel Thierrydrm/i915: page table generalizations
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-20 Ville Syrjälädrm/i915: Send out the full AUX address
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-20 Daniel Vetterdrm/i915: kerneldoc for i915_gem_shrinker.c
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-20 Daniel Vetterdrm/i915: Extract i915_gem_shrinker.c
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-20 Chris Wilsondrm/i915: Use down ei for manual Baytrail RPS calculations
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-20 Chris Wilsondrm/i915: Improved w/a for rps on Baytrail
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-20 Chris Wilsondrm/i915: Relax RPS contraints to allows setting minfreq...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-20 Chris Wilsondrm/i915: Fallback to using CPU relocations for large...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-20 Tvrtko Ursulindrm/i915: Turn on PIN_GLOBAL in i915_gem_object_ggtt_pin
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-20 Dan Carpenterdrm/i915: memory leak in __i915_gem_vma_create()
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-20 Jani Nikuladrm/i915/dp: return number of bytes written for short...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-20 Ville Syrjälädrm/i915: Unconfuse DP link rate array names
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-20 Ville Syrjälädrm/i915: Include the sink/source/supported rates in...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-20 Ville Syrjälädrm/i915: Add eDP intermediate frequencies for CHV
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-20 Ville Syrjälädrm/i915: Avoid overflowing the DP link rate arrays
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-20 Ville Syrjälädrm/i915: Fix MST link rate handling
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-20 Ville Syrjälädrm/i915: Use DP_LINK_RATE_SET whenever possible
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-20 Ville Syrjälädrm/i915: Fix max link rate in intel_dp_mode_valid()
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-20 Ville Syrjälädrm/i915: Hide the source vs. sink rate handling from...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-20 Ville Syrjälädrm/i915: Fully separate source vs. sink rates
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-20 Ville Syrjälädrm/i915: Remove special case from intel_supported_rates()
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-20 Ville Syrjälädrm/i915: Don't copy sink rates either
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-20 Ville Syrjälädrm/i915: Don't copy the DP source rates arrays
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-20 Ville Syrjälädrm/i915: Store the converted link rates in intel_dp...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-20 Ville Syrjälädrm/i915: Make the DP rates int instead of uint32_t
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-20 Joonas Lahtinendrm/i915: Do not use ggtt_view with (aliasing) PPGTT
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-20 Rodrigo Vividrm/i915: Fix sink crc connector iteration
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-20 Daniel VetterMerge tag 'drm-intel-fixes-2015-03-19' into drm-intel...
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2015-03-17 Daniel Vetterdrm/i915: Update DRIVER_DATE to 20150313
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-17 Mika Kuoppaladrm/i915: Fix vmap_batch page iterator overrun
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-17 Jeff McGeedrm/i915: Export total subslice and EU counts
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-17 Jani Nikuladrm/i915: redefine WARN_ON_ONCE to include the condition
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-17 Damien Lespiaudrm/i915/skl: Implement WaDisableHBR2
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-17 Ville Syrjälädrm/i915: Remove the preliminary_hw_support shackles...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-17 Ville Syrjälädrm/i915: Read CHV_PLL_DW8 from the correct offset
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-17 Ville Syrjälädrm/i915: Rewrite IVB FDI bifurcation conflict checks
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-17 Ville Syrjälädrm/i915: Rewrite some some of the FDI lane checks
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-17 Akash Goeldrm/i915/skl: Enable the RPS interrupts programming
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-17 Akash Goeldrm/i915/skl: Enabling processing of Turbo interrupts
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-17 Akash Goeldrm/i915/skl: Updated the i915_frequency_info debugfs...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-17 Ander Conselvan... drm/i915: Simplify the way BC bifurcation state consistency...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-17 Akash Goeldrm/i915/skl: Updated the act_freq_mhz_show sysfs function
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-17 Akash Goeldrm/i915/skl: Updated the gen9_enable_rps function
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-17 Akash Goeldrm/i915/skl: Updated the gen6_rps_limits function
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-17 Akash Goeldrm/i915/skl: Restructured the gen6_set_rps_thresholds...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-17 Akash Goeldrm/i915/skl: Updated the gen6_set_rps function
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-17 Akash Goeldrm/i915/skl: Updated the gen6_init_rps_frequencies...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-17 Akash Goeldrm/i915/skl: Updated intel_gpu_freq() and intel_freq_opcode()
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-17 Akash Goeldrm/i915/skl: Added new macros
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-17 Jani Nikuladrm/i915: remove indirection in the PCI ID macros
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-17 Ville Syrjälädrm/i915: Use FW_WM() macro for older gmch platforms too
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-17 Ville Syrjälädrm/i915: Add polish to VLV WM shift+mask operations
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-17 Ville Syrjälädrm/i915: Use plane->state->fb instead of plane->fb...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-17 Ville Syrjälädrm/i915: Reduce clutter by using the local plane pointer
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-17 Ville Syrjälädrm/i915: Remove debug prints from primary plane update...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-17 Daniel Vetterdrm/i915: Add ULL postfix to VGT_MAGIC constant
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2015-03-17 Daniel Vetterdrm/fourcc: 64 #defines need ULL postfix
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2015-03-17 Matt Roperdrm/i915: Don't assume primary & cursor are always...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-17 Chris Wilsondrm/i915: Move drm_framebuffer_unreference out of struct_mut...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-17 Ville Syrjälädrm/i915: Disable DDR DVFS on CHV
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-17 Ville Syrjälädrm/i915: Enable the maxfifo PM5 mode when appropriate...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-17 Vidya Srinivasdrm/i915: Program PFI credits for VLV
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-17 Ville Syrjälädrm/i915: Rewrite VLV/CHV watermark code
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-17 Rodrigo Vividrm/i915: Make sure we invalidate frontbuffer on fbcon.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-17 Vijay Purushothamandrm/i915: Update prop, int co-eff and gain threshold...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-17 Vijay Purushothamandrm/i915: Initialize CHV digital lock detect threshold
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-17 Vijay Purushothamandrm/i915: Disable M2 frac division for integer case
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-17 Geert Uytterhoevendrm/i915: Spelling s/auxilliary/auxiliary/
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-17 Matt Roperdrm/i915: Use crtc->state->active in ilk/skl watermark...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-17 Matt Roperdrm/i915: Update intel_crtc_active() to use state values...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-17 Damien Lespiaudrm/i915: Exit early from psr_status if PSR is not...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-17 Ville Syrjälädrm/i915: Fix chv cdclk support
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-17 Ville Syrjälädrm/i915: Allow pixel clock up to 95% of cdclk on CHV
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-17 Jesse Barnesdrm/i915/skl: port A fuse straps don't work on early...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-17 Damien Lespiaudrm/i915/skl: Restore the DDI translation tables when...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-17 Damien Lespiaudrm/i915: Remove unused condition in hsw_power_well_post_ena...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-17 Damien Lespiaudrm/i915/skl: Restore pipe interrupt registers after...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-17 Damien Lespiaudrm/i915/skl: Mirror what we do on HSW for the power...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-17 Damien Lespiaudrm/i915/skl: Introduce enable_requested and is_enabled...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-17 Damien Lespiaudrm/i915/skl: Make gen8_irq_power_well_post_enable...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-17 Jeff McGeedrm/i915/chv: Add CHV HW status to SSEU status
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-17 Jeff McGeedrm/i915/chv: Determine CHV slice/subslice/EU info
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-17 Ville Syrjälädrm/i915: Make sure PND deadline mode is enabled on...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-17 Ville Syrjälädrm/i915: Read out display FIFO size on VLV/CHV
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-17 Ville Syrjälädrm/i915: Pass plane to vlv_compute_drain_latency()
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-17 Ville Syrjälädrm/i915: Reorganize VLV DDL setup
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-17 Ville Syrjälädrm/i915: Hide VLV DDL precision handling
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-17 Ville Syrjälädrm/i915: Simplify VLV drain latency computation
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2015-03-17 Ville Syrjälädrm/i915: Kill DRAIN_LATENCY_PRECISION_* defines
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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