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[block-freq] Rename getEntryFrequency() -> getEntryFreq() to match getBlockFreq(...
2013-12-11 Tom StellardR600: Re-format Processors.td
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2013-12-11 Tom StellardR600: Register AMDGPUCFGStructurizer pass
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2013-12-11 Tom StellardR600: Register R600EmitClauseMarkers pass
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2013-11-27 Tom StellardR600: Expand vector FABS
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2013-11-27 Tom StellardR600/SI: Implement spilling of SGPRs v5
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2013-11-27 Tom StellardR600/SI: Use SGPR_32 register class for 32-bit SMRD...
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2013-11-27 Tom StellardR600: Add support for ISD::FROUND
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2013-11-22 Tom StellardR600/SI: Fixing handling of condition codes
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2013-11-22 Tom StellardR600: Implement TargetInstrInfo::isLegalToSplitMBBAt()
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2013-11-22 Tom StellardSelectionDAG: Optimize expansion of vec_type = BITCAST...
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2013-11-22 Tom StellardSplit SETCC if VSELECT requires splitting too.
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2013-11-18 Tom StellardR600: Enable the IR structurizer by default
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2013-11-18 Tom StellardR600: Fix a crash in the AMDILCFGStrucurizer
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2013-11-18 Tom StellardR600: Add a SubtargetFeatture for disabling the ifcvt...
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2013-11-18 Tom StellardR600: Use lower-case for EnableIRStructurizer feature
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2013-11-18 Tom StellardR600/SI: Fix illegal VGPR->SGPR copy inside of loop
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2013-11-18 Tom StellardR600/SI: Fix another case of illegal VGPR->SGPR copy
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2013-11-15 Tom StellardR600/SI: Add VReg_96 register class to SIRegisterInfo...
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2013-11-15 Tom StellardR600: Fix scheduling of instructions that use the LDS...
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2013-11-14 Tom StellardR600/SI: Add processor type for Hawaii
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
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2013-11-13 Tom StellardR600: Fix uninitialized variable usage
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2013-11-13 Tom StellardR600/SI: Add support for private address space load...
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2013-11-13 Tom StellardR600/SI: Prefer SALU instructions for bit shift operations
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2013-10-30 Tom StellardR600: Custom lower f32 = uint_to_fp i64
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2013-10-29 Tom StellardR600/SI: Add compute support for CI v2
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2013-10-29 Tom StellardR600: Expand vector FSQRT ops
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2013-10-24 Tom StellardInliner: Handle readonly attribute per argument when...
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2013-10-23 Tom StellardR600/SI: Replace ffs(x) - 1 with countTrailingZeros(x)
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2013-10-23 Tom StellardR600/SI: fix MIMG writemask adjustement
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
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2013-10-23 Tom StellardR600: Fix handling of vector kernel arguments
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2013-10-23 Tom StellardSelectionDAG: Pass along the original argument/element...
Tom Stellard:
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2013-10-23 Tom StellardR600/SI: Add support for i64 bitwise or
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2013-10-23 Tom StellardR600/SI: Use S_LOAD_DWORD instructions for v8i32 and...
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2013-10-22 Tom StellardR600/SI: Use llvm_unreachable() for an always false...
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2013-10-22 Tom StellardR600/SI: Fix warning on non-asserts build
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2013-10-22 Tom StellardR600: Simplify handling of private address space
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2013-10-22 Tom StellardR600: Remove unused InstrInfo::getMovImmInstr() function
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2013-10-21 Tom StellardSimplifyCFG: Don't duplicate calls to functions marked...
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2013-10-16 Tom StellardR600: Fix a crash in the AMDILCFGStructurizer
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2013-10-16 Tom StellardR600: Remove some dead code from the AMDILCFGStructurizer
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2013-10-12 Tom StellardR600: Store disassembly in a special ELF section when...
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
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2013-10-10 Tom StellardR600/SI: Implement SIInstrInfo::verifyInstruction(...
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2013-10-10 Tom StellardR600/SI: Use -verify-machineinstrs for most tests
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2013-10-10 Tom StellardR600/SI: Define a separate MIMG instruction for each...
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2013-10-10 Tom StellardR600/SI: Mark the EXEC register as reserved
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2013-10-10 Tom StellardR600: Use StructurizeCFGPass for non SI targets
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
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2013-10-02 Tom StellardStructurizeCFG: Add dependency on LowerSwitch pass
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2013-10-01 Tom StellardSelectionDAG: Clarify comments from r191600
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2013-09-28 Tom StellardSelectionDAG: Silence unused variable warning on release...
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2013-09-28 Tom StellardR600: Fix handling of NAN in comparison instructions
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2013-09-28 Tom StellardSelectionDAG: Improve legalization of SELECT_CC with...
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2013-09-28 Tom StellardSelectionDAG: Try to expand all condition codes using...
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2013-09-28 Tom StellardSelectionDAG: Clean up LegalizeSetCCCondCode() function
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2013-09-12 Tom StellardR600/SI: expose TBUFFER_STORE_FORMAT_* for OpenGL transform...
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
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2013-09-12 Tom StellardR600: Don't use trans slot for instructions that read...
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2013-09-05 Tom StellardR600: Coding style
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2013-09-05 Tom StellardR600: Add support for local memory atomic add
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2013-09-05 Tom StellardR600: Expand SELECT nodes rather than custom lowering...
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2013-09-05 Tom StellardR600: Fix incorrect LDS size calculation
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2013-09-05 Tom StellardR600/SI: Don't emit S_WQM_B64 instruction for compute...
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2013-09-05 Tom StellardR600: Fix segfault in R600TextureIntrinsicReplacer
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2013-08-26 Tom StellardSelectionDAG: Remove unnecessary uses of TargetLowering...
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2013-08-26 Tom StellardR600: Add support for vector local memory loads
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2013-08-26 Tom StellardR600: Add support for i8 and i16 local memory loads
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2013-08-26 Tom StellardSelectionDAG: Use correct pointer size when splitting...
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2013-08-26 Tom StellardR600: Add support for i8 and i16 local memory stores
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2013-08-26 Tom StellardR600: Add support for v4i32 and v2i32 local stores
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2013-08-26 Tom StellardSelectionDAG: Use correct pointer size when lowering...
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2013-08-22 Tom StellardR600/SI: Fix another case of illegal VGPR to SGPR copy
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2013-08-21 Tom StellardSelectionDAG: Make sure stores are always added to...
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2013-08-21 Tom StellardR600: Remove unnecessary casts
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2013-08-17 Tom StellardR600: Fix possible use of an uninitialized variable
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2013-08-16 Tom StellardR600: Expand vector FRINT ops
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2013-08-16 Tom StellardR600: Expand vector FFLOOR ops
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2013-08-16 Tom StellardR600: Expand vector float operations for both SI and...
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2013-08-16 Tom StellardRevert "R600/SI: Fix incorrect encoding of DS_WRITE_B32...
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2013-08-16 Tom StellardR600/SI: Fix incorrect encoding of DS_WRITE_B32 instructions
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2013-08-16 Tom StellardR600: Add support for global vector loads with element...
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2013-08-16 Tom StellardR600: Add support for global vector stores with elements...
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2013-08-16 Tom StellardR600: Add support for i16 and i8 global stores
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2013-08-16 Tom StellardR600: Add support for v4i32 stores on Cayman
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2013-08-16 Tom StellardR600: Enable folding of inline literals into REQ_SEQUENCE...
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2013-08-16 Tom StellardR600: Add IsExport bit to TableGen instruction definitions
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2013-08-16 Tom StellardR600: Change the RAT instruction assembly names so...
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2013-08-14 Tom StellardR600/SI: Improve legalization of vector operations
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2013-08-14 Tom StellardR600/SI: Replace v1i32 type with i32 in imageload and...
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2013-08-14 Tom StellardR600/SI: Convert v16i8 resource descriptors to i128
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2013-08-14 Tom StellardR600/SI: Use i8 types for resource descriptors in tests
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2013-08-14 Tom StellardR600/SI: Lower BUILD_VECTOR to REG_SEQUENCE v2
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2013-08-14 Tom StellardR600/SI: Choose the correct MOV instruction for copying...
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2013-08-14 Tom StellardR600/SI: Assign a register class to the $vaddr operand...
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2013-08-14 Tom StellardR600/SI: Handle MSAA texture targets
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2013-08-14 Tom StellardR600/SI: Allow conversion between v32i8 and v8i32
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2013-08-14 Tom StellardR600/SI: Fix an obvious typo
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2013-08-14 Tom StellardR600/SI: Add pattern for fp_to_uint
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2013-08-12 Tom StellardR600: Set scheduling preference to Sched::Source
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2013-08-06 Tom StellardR600: Add new file from r187831 to CMakeLists.txt
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2013-08-06 Tom StellardR600/SI: Use VSrc_* register classes as the default...
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2013-08-06 Tom StellardR600/SI: Add more special cases for opcodes to ensureSRegLimit()
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2013-08-06 Tom StellardFactor FlattenCFG out from SimplifyCFG
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C/C++ LLVM-based compilers that forbids OOTA behaviors