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Merge remote branch 'airlied/drm-next' into drm-intel-next
2009-09-04
Ma Ling
drm/i915: select TV format according to connector type
Signed-off-by:
Ma Ling
<ling.ma@intel.com>
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2009-08-25
Ma Ling
drm/i915: Set crtc/clone mask in different output devices
Signed-off-by:
Ma Ling
<ling.ma@intel.com>
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2009-08-24
Ma Ling
drm/i915: Always use SDVO_B detect bit for SDVO output...
Signed-off-by:
Ma Ling
<ling.ma@intel.com>
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2009-06-05
Ma Ling
drm/i915: Set correct TV detection voltage level override...
Signed-off-by:
Ma Ling
<ling.ma@intel.com>
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2009-05-26
Ma Ling
drm/i915: Add support for VGA load detection (pre-945).
Signed-off-by:
Ma Ling
<ling.ma@intel.com>
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2009-05-22
Ma Ling
drm/i915: Use an I2C algo to do the flip to SDVO DDC...
Signed-off-by:
Ma Ling
<ling.ma@intel.com>
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2009-05-22
Ma Ling
drm/i915: Return SDVO LVDS VBT mode if no EDID modes...
Signed-off-by:
Ma Ling
<ling.ma@intel.com>
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2009-05-22
Ma Ling
drm/i915: Fetch SDVO LVDS mode lines from VBT, then...
Signed-off-by:
Ma Ling
<ling.ma@intel.com>
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2009-05-14
Ma Ling
drm/i915: Set HDMI hot plug interrupt enable for only...
Signed-off-by:
Ma Ling
<ling.ma@intel.com>
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2009-05-14
Ma Ling
drm/i915: Include 965GME pci ID in IS_I965GM(dev) to...
Signed-off-by:
Ma Ling
<ling.ma@intel.com>
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2009-05-14
Ma Ling
drm/i915: Use the GM45 VGA hotplug workaround on G45...
Signed-off-by:
Ma Ling
<ling.ma@intel.com>
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2009-04-20
Ma Ling
drm: clean dirty memory after device release
Signed-off-by:
Ma Ling
<ling.ma@intel.com>
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2009-04-08
Ma Ling
drm/i915: sync hdmi detection by hdmi identifier with 2D
Signed-off-by:
Ma Ling
<ling.ma@intel.com>
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2009-04-01
Ma Ling
drm/i915: avoid hanging on to a stale pointer to raw_edid.
Signed-off-by:
Ma Ling
<ling.ma@intel.com>
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2009-03-29
Ma Ling
drm: detect hdmi monitor by hdmi identifier (v3)
Signed-off-by:
Ma Ling
<ling.ma@intel.com>
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2009-03-29
Ma Ling
drm: read EDID extensions from monitor
Signed-off-by:
Ma Ling
<ling.ma@intel.com>
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2009-03-27
Ma Ling
drm/i915: Use a different PLL timing search function...
Signed-off-by:
Ma Ling
<ling.ma@intel.com>
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2009-03-27
Ma Ling
drm/i915: Use documented PLL timing limits for G4X...
Signed-off-by:
Ma Ling
<ling.ma@intel.com>
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