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[Hexagon] Adding a number of additional multiply forms with tests.
2014-12-12
Andrea Di Biagio
Reapply "[MachineScheduler] Fix for PR21807: minor...
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2014-12-12
Andrea Di Biagio
Revert: [MachineScheduler] Fix for PR21807: minor code...
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2014-12-12
Andrea Di Biagio
[MachineScheduler] Fix for PR21807: minor code difference...
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2014-12-11
Andrea Di Biagio
[InstCombine][X86] Improved folding of calls to Intrinsic...
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2014-12-08
Andrea Di Biagio
[X86] Improved tablegen patters for matching TZCNT...
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2014-12-08
Andrea Di Biagio
[X86] Improved lowering of packed v8i16 vector shifts...
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2014-12-05
Andrea Di Biagio
[X86] Improved lowering of packed vector shifts to...
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2014-12-05
Andrea Di Biagio
[X86] Avoid introducing extra shuffles when lowering...
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2014-12-04
Andrea Di Biagio
[X86] Simplify code. NFC.
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2014-11-24
Andrea Di Biagio
[X86] Improved target specific combine on VSELECT dag...
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2014-11-21
Andrea Di Biagio
[DAG] Teach how to turn a build_vector into a shuffle...
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2014-11-21
Andrea Di Biagio
[DAG] Refactor the shuffle combining logic in DAGCombiner...
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2014-11-19
Andrea Di Biagio
[X86] Improved lowering of v4x32 build_vector dag nodes.
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2014-11-15
Andrea Di Biagio
[DAG] Improved target independent vector shuffle folding...
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2014-11-11
Andrea Di Biagio
[X86] Add missing check for 'isINSERTPSMask' in method...
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2014-11-06
Andrea Di Biagio
[X86] When commuting SSE immediate blend, make sure...
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2014-11-05
Andrea Di Biagio
[X86] Teach method 'isVectorClearMaskLegal' how to...
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2014-11-04
Andrea Di Biagio
[X86] Add 'FeatureSlowSHLD' to cpu 'bdver3'. Also explicit...
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2014-10-17
Andrea Di Biagio
[X86] Fix missed selection of non-temporal store of...
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2014-10-09
Andrea Di Biagio
[InstCombine] Fix wrong folding of constant comparisons...
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2014-09-30
Andrea Di Biagio
[DAG] Check in advance if a build_vector has a legal...
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2014-09-26
Andrea Di Biagio
[X86][SchedModel] SSE reciprocal square root instruction...
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2014-09-17
Andrea Di Biagio
[InstCombine] Fix wrong folding of constant comparison...
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2014-09-02
Andrea Di Biagio
Revert: [APFloat] Fixed a bug in method 'fusedMultiplyAdd'.
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2014-09-02
Andrea Di Biagio
[APFloat] Fixed a bug in method 'fusedMultiplyAdd'.
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2014-08-16
Andrea Di Biagio
[DAGCombiner] Improve the folding of target independet...
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2014-08-13
Andrea Di Biagio
[DAGCombiner] Improved target independent vector shuffle...
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2014-07-23
Andrea Di Biagio
Revert r211771. It was: "[X86] Improve the selection...
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2014-07-21
Andrea Di Biagio
[DAGCombiner] Improve the shuffle-vector folding logic.
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2014-07-21
Andrea Di Biagio
[DAG] Refactor some logic. No functional change.
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2014-07-19
Andrea Di Biagio
[x86] Fix wrong shuffle mask in test 'combine-vec-shuffle...
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2014-07-16
Andrea Di Biagio
[X86] Add a check for 'isMOVHLPSMask' within method...
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2014-07-15
Andrea Di Biagio
[DAGCombiner] Add more rules to fold shuffles.
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2014-07-15
Andrea Di Biagio
Silence a warning in conditional expression.
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2014-07-15
Andrea Di Biagio
Improve test 'CodeGen/X86/combine-vec-shuffle-3.ll'.
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2014-07-15
Andrea Di Biagio
[DAGCombiner] Avoid calling method 'isShuffleMaskLegal...
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2014-07-14
Andrea Di Biagio
[DAGCombiner] Add more rules to combine shuffle vector...
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2014-07-13
Andrea Di Biagio
[DAGCombiner] Fix a crash caused by a missing check...
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2014-07-10
Andrea Di Biagio
Extend the test coverage in combine-vec-shuffle-2.ll...
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2014-07-10
Andrea Di Biagio
[DAG] Further improve the logic in DAGCombiner that...
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2014-07-08
Andrea Di Biagio
[DAG] Teach how to combine a pair of shuffles into...
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2014-07-07
Andrea Di Biagio
[x86] Fix assertion failure caused by a wrong combine...
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2014-07-03
Andrea Di Biagio
[CostModel][x86] Improved cost model for alternate...
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2014-07-03
Andrea Di Biagio
[X86] Add ISel patterns to select 'f32_to_f16' and...
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2014-06-30
Andrea Di Biagio
[X86] Add support for builtin to read performance monitoring...
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2014-06-26
Andrea Di Biagio
Silence a warning due to a comparison between signed...
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2014-06-26
Andrea Di Biagio
[X86] Improve the selection of SSE3/AVX addsub instructions.
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2014-06-25
Andrea Di Biagio
[X86] Always prefer to lower a VECTOR_SHUFFLE into...
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2014-06-25
Andrea Di Biagio
[X86] Add target combine rule to select ADDSUB instructions...
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2014-06-21
Andrea Di Biagio
[X86] Add ISel patterns to select SSE3/AVX ADDSUB instructions.
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2014-06-19
Andrea Di Biagio
[X86] Teach how to combine horizontal binop even in...
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2014-06-12
Andrea Di Biagio
[X86] Teach how to dump the name of target node RDTSCP_DAG.
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2014-06-12
Andrea Di Biagio
[X86] Teach how to combine AVX and AVX2 horizontal...
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2014-06-11
Andrea Di Biagio
[X86] Refactor the logic to select horizontal adds...
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2014-06-10
Andrea Di Biagio
[X86] Improved target combine rules for selecting horizontal...
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2014-06-09
Andrea Di Biagio
[X86] Add target combine rules for horizontal add/sub.
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2014-06-09
Andrea Di Biagio
[X86] Avoid emitting unnecessary test instructions.
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2014-06-09
Andrea Di Biagio
[DAG] Expose NoSignedWrap, NoUnsignedWrap and Exact...
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2014-06-02
Andrea Di Biagio
[X86] Fix checked arithmetic for i8 on X86.
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2014-05-30
Andrea Di Biagio
[X86] Add two combine rules to simplify dag nodes introduced...
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2014-05-22
Andrea Di Biagio
[X86] Improve the lowering of BITCAST from MVT::f64...
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2014-05-19
Andrea Di Biagio
[X86] Add ISel patterns to improve the selection of...
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2014-05-15
Andrea Di Biagio
[X86] Teach the backend how to fold SSE4.1/AVX/AVX2...
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2014-05-09
Andrea Di Biagio
Fix 80 col violation.
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2014-05-08
Andrea Di Biagio
[X86] Add target specific combine rules to fold SSE2...
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2014-05-06
Andrea Di Biagio
[X86] Improve the lowering of BITCAST dag nodes from...
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2014-04-29
Andrea Di Biagio
[Windows] Fix assertion failure when passing 'nul'...
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2014-04-26
Andrea Di Biagio
[InstCombine][X86] Teach how to fold calls to SSE2...
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2014-04-24
Andrea Di Biagio
[X86] Add support for Read Time Stamp Counter x86 builtin...
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2014-04-15
Andrea Di Biagio
[X86] Improve the lowering of packed shifts by constant...
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2014-03-22
Andrea Di Biagio
[DAG] Fix an assertion failure caused by an invalid...
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2014-03-18
Andrea Di Biagio
[DAGCombiner] teach how to simplify xor/and/or nodes...
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2014-03-06
Andrea Di Biagio
[X86] Teach the DAGCombiner how to fold a OR of two...
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2014-02-12
Andrea Di Biagio
[Vectorizer] Add a new 'OperandValueKind' in TargetTransform...
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2014-02-12
Andrea Di Biagio
[X86] Teach the backend how to lower vector shift left...
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2014-01-28
Andrea Di Biagio
[X86] Add extra rules for combining vselect dag nodes...
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2014-01-28
Andrea Di Biagio
[DAGCombiner] Avoid introducing an illegal build_vector...
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2014-01-27
Andrea Di Biagio
[DAGCombiner] Teach how to fold sext/aext/zext of constant...
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2014-01-20
Andrea Di Biagio
[X86] Teach how to combine a vselect into a movss/movsd
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2014-01-15
Andrea Di Biagio
Update test/CodeGen/X86/vbinop-simplify-bug.ll.
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2014-01-15
Andrea Di Biagio
[DAGCombiner] Fix a wrong check in method SimplifyVBinOp.
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2014-01-14
Andrea Di Biagio
[X86] Fix assertion failure caused by a wrong folding...
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2014-01-13
Andrea Di Biagio
[AArch64] Fix assertion failure caused by an invalid...
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2014-01-08
Andrea Di Biagio
Teach the DAGCombiner how to fold 'vselect' dag nodes...
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2013-12-28
Andrea Di Biagio
[X86] Teach the backend how to fold target specific...
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2013-12-27
Andrea Di Biagio
Teach DAGCombiner how to fold a SIGN_EXTEND_INREG of...
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2013-12-12
Andrea Di Biagio
Added new X86 patterns to select SSE scalar fp arithmetic...
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2013-12-10
Andrea Di Biagio
Ensure that the backend no longer emits unnecessary...
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2013-10-17
Andrea Di Biagio
Fix edge condition in DAGCombiner to improve codegen...
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2013-09-27
Andrea Di Biagio
Remove superfluous comment accidentally checked-in.
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2013-09-27
Andrea Di Biagio
Re-apply the change from r191393 with fix for pr17380.
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2013-09-26
Andrea Di Biagio
Revert r191393 since it caused pr17380.
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2013-09-25
Andrea Di Biagio
Teach DAGCombiner how to canonicalize dags according...
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2013-09-18
Andrea Di Biagio
Re-add tests from r179291 which were accidentally removed...
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2013-08-23
Andrea Di Biagio
Add function attribute 'optnone'.
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2013-08-09
Andrea Di Biagio
Add description of function attribute 'minsize' in...
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2013-08-08
Andrea Di Biagio
test commit.
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