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drm/radeon: Use write-combined CPU mappings of IBs on >= CIK
2014-08-05 Michel Dänzerdrm/radeon: Use write-combined CPU mappings of IBs...
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
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2014-08-05 Michel Dänzerdrm/radeon: Use write-combined CPU mappings of ring...
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
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2014-08-05 Michel Dänzerdrm/radeon: Allow write-combined CPU mappings of BOs...
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
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2014-08-05 Michel Dänzerdrm/radeon: Pass GART page flags to radeon_gart_set_page...
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
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2014-08-05 Michel Dänzerdrm/radeon: Remove radeon_gart_restore()
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
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2014-08-05 Michel Dänzerdrm/radeon: Demote 'BO allocation size too large' message...
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
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2014-07-17 Michel Dänzerdrm/radeon: Complete page flip even if waiting on the...
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
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2014-07-17 Michel Dänzerdrm/radeon: Move pinning the BO back to radeon_crtc_page_flip()
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
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2014-07-01 Michel Dänzerdrm/radeon: Track the status of a page flip more explicitly
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
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2014-06-18 Michel Dänzerdrm/radeon: Fix radeon_irq_kms_pflip_irq_get/put()...
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
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2014-06-18 Michel DänzerRevert "drm/radeon: remove drm_vblank_get|put from...
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
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2014-06-10 Michel Dänzerdrm/radeon: Move fb update from radeon_flip_work_func...
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
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2014-05-06 Michel Dänzerdrm/radeon: Fix num_banks calculation for SI
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
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2014-04-04 Michel Dänzerdrm/mm: Fix search for smallest hole satisfying constraints
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
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2014-01-08 Michel Dänzerradeon/pm: Guard access to rdev->pm.power_state array
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
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2013-11-18 Michel Dänzerdrm/radeon/cik: Add macrotile mode array query
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
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2013-11-18 Michel Dänzerdrm/radeon/cik: Return backend map information to userspace
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
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2013-09-20 Michel Dänzerdrm/radeon/cik: Add tiling mode index for 1D tiled...
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
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2013-09-20 Michel Dänzerdrm/radeon/cik: Fix encoding of number of banks in...
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
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2013-09-20 Michel Dänzerdrm/radeon/cik: Fix printing of client name on VM protection...
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
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2013-08-07 Michel Dänzerdrm: Don't pass negative delta to ktime_sub_ns()
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
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2013-01-24 Michel Dänzerdrm/radeon: Enable DMA_IB_SWAP_ENABLE on big endian...
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
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2012-09-27 Michel Dänzerdrm/radeon: Fix scratch register leak in IB test.
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
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2012-07-20 Michel Dänzerdrm/radeon: Try harder to avoid HW cursor ending on...
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
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2012-05-17 Michel Dänzerdrm/radeon: Also reset BCI on SI GPU reset.
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
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2012-05-03 Michel Dänzerdrm/radeon: Original Radeons had PCI GART, not PCIe...
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
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2012-04-02 Michel Dänzerdrm/radeon: Don't dereference possibly-NULL pointer.
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
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2012-03-28 Michel Dänzerdrm/radeon: Only warn if the intra-domain offset actually...
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
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2012-03-21 Michel Dänzerdrm/radeon: Update radeon_info_ioctl for SI. (v2)
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
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2012-03-20 Michel Dänzerdrm/radeon: Drop radeon_gem_object_(un)pin.
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
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2012-03-20 Michel Dänzerdrm/radeon: Restrict offset for legacy display engine.
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
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2012-03-20 Michel Dänzerdrm/radeon: Restrict offset for legacy hardware cursor.
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
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2012-02-22 Michel Dänzerdrm/radeon: Only create additional ring debugfs files...
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
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2012-02-01 Michel Dänzerdrm/radeon: Set DESKTOP_HEIGHT register to the framebuffer...
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
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2012-01-13 Michel Dänzerradeon: Call pci_clear_master() instead of open-coding it.
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
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2012-01-06 Michel Dänzerradeon: Fix disabling PCI bus mastering on big endian...
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
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2011-11-11 Michel Dänzerdrm/radeon: Make sure CS mutex is held across GPU reset.
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
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2011-10-03 Michel Dänzerdrm/radeon: Set cursor x/y to 0 when x/yorigin > 0.
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
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2011-10-03 Michel Dänzerdrm/radeon: Update AVIVO cursor coordinate origin before...
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
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2011-10-03 Michel Dänzerdrm/radeon: Simplify cursor x/yorigin calculation.
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
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2011-09-14 Michel Dänzerdrm/radeon: Don't read from CP ring write pointer registers.
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
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2011-08-22 Michel Dänzerdrm/radeon: Make vramlimit parameter actually work.
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
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2011-08-22 Michel Dänzerdrm/radeon: Explicitly print GTT/VRAM offsets on test...
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
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2011-08-22 Michel Dänzerdrm/radeon: Take IH ring into account for test size...
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
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2011-07-14 Michel Dänzerdrm/radeon: Don't clobber error return value in page...
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
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2011-07-14 Michel Dänzerdrm/radeon: Don't generate new fence for page flip.
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
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