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fix minsize detection: minsize attribute implies optimizing for size
2015-08-08
Matt Arsenault
Remove unnecessary includes
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2015-08-08
Matt Arsenault
AMDGPU: Implement AMDGPUOperand::print()
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2015-08-08
Matt Arsenault
AMDGPU/SI: Remove VCCReg
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2015-08-08
Matt Arsenault
AMDGPU/SI: Remove source uses of VCCReg
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2015-08-07
Matt Arsenault
AMDGPU: Assume SMRD access for constant address space
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2015-08-05
Matt Arsenault
AMDGPU/SI: Remove EXECReg
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2015-08-05
Matt Arsenault
AMDGPU: Remove SCCReg.
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2015-07-31
Matt Arsenault
AMDGPU: Fix v16i32 to v16i8 truncstore
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2015-07-31
Matt Arsenault
AMDGPU/SI: Set DwarfRegNum
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2015-07-31
Matt Arsenault
TableGen: Support folding casts from bits to int
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2015-07-30
Matt Arsenault
AMDGPU: Set SubRegIndex size and offset
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2015-07-30
Matt Arsenault
AMDGPU: Fix unreachable when emitting binary debug...
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2015-07-30
Matt Arsenault
Add amdopencl environment to triple
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2015-07-28
Matt Arsenault
AMDGPU: Don't try to use LDS/vector for private if...
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2015-07-28
Matt Arsenault
AMDGPU: Fix crash if called function is a bitcast
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2015-07-28
Matt Arsenault
AMDGPU: Fix return type of getImplicitParameterOffset.
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2015-07-27
Matt Arsenault
Fix assert when inlining a constantexpr addrspacecast
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2015-07-21
Matt Arsenault
AMDGPU: Set isMoveImm on s_movk_i32
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2015-07-17
Matt Arsenault
Only do fmul (fadd x, x), c combine if the fadd only...
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2015-07-14
Matt Arsenault
AMDGPU: Avoid using 64-bit shift for i64 (shl x, 32)
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2015-07-14
Matt Arsenault
AMDGPU/SI: Fix read2 merging into a super register.
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2015-07-13
Matt Arsenault
AMDGPU: Minor cleanups to always inline pass
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2015-07-10
Matt Arsenault
AMDGPU: Fix chains for memory ops dependent on argument...
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2015-07-10
Matt Arsenault
AMDGPU: Use requested chain when lowering arguments
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2015-07-10
Matt Arsenault
DAGCombiner: Assume invariant load cannot alias a store
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2015-07-09
Matt Arsenault
AMDGPU/R600: Return correct chain when lowering loads
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2015-07-06
Matt Arsenault
AMDGPU: Run SIInsertWaits as pre-emit pass
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2015-07-06
Matt Arsenault
AMDGPU/SI: Add debugging subtarget feature for DS offsets
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2015-07-03
Matt Arsenault
AMDGPU: Fix indentation of switch
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2015-06-28
Matt Arsenault
AMDGPU/SI: Fix extra space when printing v_div_fmas_*
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2015-06-26
Matt Arsenault
Show invariant loads in MMO dumping
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2015-06-25
Matt Arsenault
DAGCombiner: Use pop_back_val()
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2015-06-25
Matt Arsenault
DAGCombiner: Remove redundant check
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2015-06-23
Matt Arsenault
AMDGPU: Use getAsInteger instead of atoi
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2015-06-19
Matt Arsenault
AMDGPU: Fix filename in comment
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2015-06-19
Matt Arsenault
AMDGPU: Fix some places missed in rename
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2015-06-17
Matt Arsenault
AMDGPU: Change unreachable into reported error
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2015-06-16
Matt Arsenault
Revert "Revert "Fix merges of non-zero vector stores""
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2015-06-11
Matt Arsenault
SLSR: Pass address space to isLegalAddressingMode
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2015-06-11
Matt Arsenault
Fix merges of non-zero vector stores
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2015-06-09
Matt Arsenault
Implement computeKnownBits for min/max nodes
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2015-06-09
Matt Arsenault
R600: Switch to using generic min / max nodes.
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2015-06-09
Matt Arsenault
MC: Add target hook to control symbol quoting
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2015-06-07
Matt Arsenault
SeparateConstOffsetFromGEP: Pass address space to isLegalAdd...
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2015-06-07
Matt Arsenault
Make NaryReassociate pass the address space to isLegalAddres...
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2015-06-07
Matt Arsenault
Add isLegalAddressingMode address space argument to TTI
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2015-06-04
Matt Arsenault
R600/SI: Reimplement isLegalAddressingMode
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2015-06-04
Matt Arsenault
CodeGenPrepare: Provide address space to isLegalAddressingMode
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2015-06-04
Matt Arsenault
Pass address space to isLegalAddressingMode in DAGCombiner
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2015-06-04
Matt Arsenault
R600/SI: Fix some cases for load / store of half
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2015-06-03
Matt Arsenault
R600/SI: Fix tests with triples in them
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2015-06-01
Matt Arsenault
R600/SI: Don't hardcode pointer type
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2015-06-01
Matt Arsenault
Add address space argument to isLegalAddressingMode
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2015-05-26
Matt Arsenault
Make EmitFunctionHeader virtual
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2015-05-26
Matt Arsenault
Forgot to add lit.local.cfg for new R600 directory
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2015-05-26
Matt Arsenault
CodeGenPrepare: Don't match addressing modes through...
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2015-05-24
Matt Arsenault
Add target hook to allow merging stores of nonzero...
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2015-05-07
Matt Arsenault
R600: Fix comment that mentions AMDIL
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2015-05-06
Matt Arsenault
Add ChangeTo* to MachineOperand for symbols
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2015-04-30
Matt Arsenault
Fix typo
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2015-04-30
Matt Arsenault
Mips: Remove dead declaration
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2015-04-30
Matt Arsenault
MachineVerifier: Don't crash if MachineOperand has...
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2015-04-26
Matt Arsenault
R600: Remove / merge redundant testcases
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2015-04-24
Matt Arsenault
R600/SI: Fix verifier error when producing v_madmk_f32
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2015-04-23
Matt Arsenault
Revert accidentally committed "MC: Allow targets to...
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2015-04-23
Matt Arsenault
R600/SI: Special case v_mov_b32 as really rematerializable
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2015-04-23
Matt Arsenault
MC: Allow targets to stop symbol name quoting
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2015-04-22
Matt Arsenault
R600: Fix always inline pass breaking noinline functions
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2015-03-23
Matt Arsenault
R600/SI: Merge tables for commuting
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2015-03-23
Matt Arsenault
R600/SI: Only use one range of isCommutable for compares
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2015-03-23
Matt Arsenault
R600/SI: Remove redundant unsetting of hasSideEffects
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2015-03-23
Matt Arsenault
R600/SI: Move hasSideEffects setting into VOPCX classes
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2015-03-23
Matt Arsenault
R600/SI: Allow commuting compares
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2015-03-23
Matt Arsenault
R600/SI: Use right class for cmpsx f64 instructions
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2015-03-23
Matt Arsenault
R600/SI: Remove cond operand to VOPCX classes
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2015-03-21
Matt Arsenault
R600: Cleanup test with multiple check prefixes
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2015-03-13
Matt Arsenault
R600/SI: Add test for min / max with immediate
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2015-02-21
Matt Arsenault
R600/SI: Use v_madmk_f32
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2015-02-21
Matt Arsenault
R600/SI: Try to use v_madak_f32
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2015-02-21
Matt Arsenault
R600/SI: Don't crash when getting immediate operand...
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2015-02-21
Matt Arsenault
R600/SI: Fix mad*k definitions
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2015-02-20
Matt Arsenault
R600/SI: Remove v_sub_f64 pseudo
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2015-02-20
Matt Arsenault
R600: Use new fmad node.
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2015-02-20
Matt Arsenault
Add generic fmad DAG node.
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2015-02-18
Matt Arsenault
R600/SI: Rename dst encoding field to be consistent...
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2015-02-18
Matt Arsenault
R600/SI: Consistently capitalize encoding field names
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2015-02-18
Matt Arsenault
R600/SI: Set noNamedPositionallyEncodedOperands
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2015-02-18
Matt Arsenault
R600/SI: Fix src1_modifiers for class instructions
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2015-02-18
Matt Arsenault
R600/SI: Fix not setting clamp / omod for v_cndmask_b32_e64
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2015-02-18
Matt Arsenault
R600: Fix operand encoding error
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2015-02-18
Matt Arsenault
R600/SI: Fix encoding error from glc bit on VI SMRD...
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2015-02-18
Matt Arsenault
R600/SI: Fix operand encoding for flat instructions
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2015-02-18
Matt Arsenault
R600/SI: Fix error from vdst on no return atomics
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2015-02-18
Matt Arsenault
R600/SI: Add missing offset operand to buffer bothen
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2015-02-18
Matt Arsenault
R600/SI: Add missing soffset operand to global atomics
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2015-02-18
Matt Arsenault
R600/SI: Fix brace identation
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2015-02-14
Matt Arsenault
R600/SI: Implement correct f64 fdiv
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2015-02-14
Matt Arsenault
R600/SI: Use complex operand folding for div_scale
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2015-02-14
Matt Arsenault
R600/SI: Add tests for div_fmas with inline immediate...
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2015-02-14
Matt Arsenault
R600/SI: Fix implicit vcc operand to v_div_fmas_*
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