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MIPS: SPRAM: Clean up support code a little
2009-11-02 Chris DearmanMIPS: SPRAM: Clean up support code a little
Signed-off-by: Chris Dearman <chris@mips.com>
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2009-11-02 Chris DearmanMIPS: MTI: Fix accesses to device registers on MIPS...
Signed-off-by: Chris Dearman <chris@mips.com>
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2009-03-23 Chris DearmanMIPS: R2: Fix problem with code that incorrectly modifies...
Signed-off-by: Chris Dearman <chris@mips.com>
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2008-06-16 Chris Dearman[MIPS] vpe_id is required for VSMP and SMTC builds
Signed-off-by: Chris Dearman <chris@mips.com>
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2008-04-28 Chris Dearman[MIPS] Add CoreFPGA5 support; distinguish between SOCit...
Signed-off-by: Chris Dearman <chris@mips.com>
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2008-04-28 Chris Dearman[MIPS] Add noulri kernel argument to disable "rdhwr...
Signed-off-by: Chris Dearman <chris@mips.com>
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2008-04-28 Chris Dearman[MIPS] Allow setting of the cache attribute at run...
Signed-off-by: Chris Dearman <chris@mips.com>
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2008-04-28 Chris Dearman[MIPS] Tidy up cache attributes
Signed-off-by: Chris Dearman <chris@mips.com>
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2008-04-28 Chris Dearman[MIPS] All MIPS32 processors support64-bit physical...
Signed-off-by: Chris Dearman <chris@mips.com>
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2008-04-28 Chris Dearman[MIPS] Remove TLB sanitation code
Signed-off-by: Chris Dearman <chris@mips.com>
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2008-04-28 Chris Dearman[MIPS] Basic SPRAM support
Signed-off-by: Chris Dearman <chris@mips.com>
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2008-04-28 Chris Dearmanmm: try both endianess when checking for endianess
Signed-off-by: Chris Dearman <chris@mips.com>
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2008-03-12 Chris Dearman[MIPS] Added missing cases for rdhwr emulation
Signed-off-by: Chris Dearman <chris@mips.com>
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2008-03-05 Chris Dearman.gitignore: ignore emacs backup and temporary files.
Signed-off-by: Chris Dearman <chris@mips.com>
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2007-12-14 Chris Dearman[MIPS] Ensure that ST0_FR is never set on a 32 bit...
Signed-off-by: Chris Dearman <chris@mips.com>
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2007-12-09 Chris Dearman[MIPS] Don't byteswap writes to display when running...
Signed-off-by: Chris Dearman <chris@mips.com>
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2007-07-31 Chris Dearman[MIPS] MTI: Add CoreFPGA4 ID.
Signed-off-by: Chris Dearman <chris@mips.com>
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2007-07-10 Chris Dearman[MIPS] Early check for SMTC kernel on non-MT processor
Signed-off-by: Chris Dearman <chris@mips.com>
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2007-07-06 Chris Dearman[MIPS] Fix timer/performance interrupt detection
Signed-off-by: Chris Dearman <chris@mips.com>
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2007-06-26 Chris Dearman[MIPS] Count timer interrupts correctly.
Signed-off-by: Chris Dearman <chris@mips.com>
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2007-06-14 Chris Dearman[MIPS] Fix builds where MSC01E_xxx is undefined.
Signed-off-by: Chris Dearman <chris@mips.com>
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2007-06-14 Chris Dearman[MIPS] Separate performance counter interrupts
Signed-off-by: Chris Dearman <chris@mips.com>
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2007-06-14 Chris Dearman[MIPS] Malta: Fix for SOCitSC based Maltas
Signed-off-by: Chris Dearman <chris@mips.com>
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2007-06-11 Chris Dearman[MIPS] SMTC: Fix build error caused by nonsense code.
Signed-off-by: Chris Dearman <chris@mips.com>
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2007-06-11 Chris Dearman[MIPS] Always install the DSP exception handler.
Signed-off-by: Chris Dearman <chris@mips.com>
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2007-06-06 Chris Dearman[MIPS] Remove duplicate fpu enable hazard code.
Signed-off-by: Chris Dearman <chris@mips.com>
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2007-05-11 Chris Dearman[MIPS] FPU hazard handling
Signed-off-by: Chris Dearman <chris@mips.com>
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2007-05-11 Chris Dearman[MIPS] MT: Reenable EIC support and add support for...
Signed-off-by: Chris Dearman <chris@mips.com>
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2007-03-29 Chris Dearman[MIPS] lockdep: Deal with interrupt disable hazard...
Signed-off-by: Chris Dearman <chris@mips.com>
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2007-03-29 Chris Dearman[MIPS] lockdep: Handle interrupts in R3000 style c0_status...
Signed-off-by: Chris Dearman <chris@mips.com>
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2007-03-13 Chris Dearman[MIPS] Oprofile: Reset all performance registers for...
Signed-off-by: Chris Dearman <chris@mips.com>
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2007-02-06 Chris Dearman[MIPS] Comment fix
Signed-off-by: Chris Dearman <chris@mips.com>
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2007-02-06 Chris Dearman[MIPS] Move .set reorder out of conditional code
Signed-off-by: Chris Dearman <chris@mips.com>
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2007-02-06 Chris Dearman[MIPS] Check FCSR for pending interrupts before restoring...
Signed-off-by: Chris Dearman <chris@mips.com>
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2006-09-27 Chris Dearman[MIPS] MT: Initialise all writable bits in Cause register...
Signed-off-by: Chris Dearman <chris@mips.com>
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2006-07-13 Chris Dearman[MIPS] Panic on fp exception in kernel mode.
Signed-off-by: Chris Dearman <chris@mips.com>
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2006-07-13 Chris Dearman[MIPS] Default cpu_has_mipsmt to a runtime check
Signed-off-by: Chris Dearman <chris@mips.com>
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2006-07-13 Chris Dearman[MIPS] Use KERN_DEBUG to log the SDBBP messages
Signed-off-by: Chris Dearman <chris@mips.com>
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2006-07-13 Chris Dearman[MIPS] Less noise on multithreading exceptions.
Signed-off-by: Chris Dearman <chris@mips.com>
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2006-06-29 Chris Dearman[MIPS] Fix handling of 0 length I & D caches.
Signed-off-by: Chris Dearman <chris@mips.com>
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2006-06-29 Chris Dearman[MIPS] Typo fixes.
Signed-off-by: Chris Dearman <chris@mips.com>
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2006-06-29 Chris Dearman[MIPS] MIPS32/MIPS64 secondary cache management
Signed-off-by: Chris Dearman <chris@mips.com>
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2006-05-31 Chris Dearman[MIPS] Fix detection and handling of the 74K processor.
Signed-off-by: Chris Dearman <chris@mips.com>
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2006-04-27 Chris Dearman[MIPS] 24K LV: Add core card id.
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