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[FastISel][X86] Add support for the frameaddress intrinsic.
2014-06-11
Tom Stellard
R600: Set correct InstrItinClass for instructions using...
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2014-06-11
Tom Stellard
R600: BCNT_INT is a vector only instruction
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2014-06-10
Tom Stellard
R600/SI: Emit an error when attempting to spill VGPRs v4
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2014-06-10
Tom Stellard
R600/SI: Fix a crash when spilling SGPRs
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2014-06-10
Tom Stellard
Hexagon: Expand i1 SELECT_CC
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2014-06-10
Tom Stellard
SelectionDAG: Don't use MVT::Other to determine legality...
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2014-06-10
Tom Stellard
SelectionDAG: Enable (and (setcc x), (setcc y)) ->...
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2014-06-10
Tom Stellard
SelectionDAG: Expand SELECT_CC to SELECT + SETCC
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2014-05-16
Tom Stellard
R600/SI: Refactor the VOP3_32 tablegen class
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2014-05-16
Tom Stellard
R600/SI: Add a PredicateControl class for managing...
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2014-05-16
Tom Stellard
R600/SI: Move tablegen patterns away from instruction...
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2014-05-16
Tom Stellard
R600/SI: Remove unused instruction
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2014-05-16
Tom Stellard
R600/SI: Promote f32 SELECT to i32
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2014-05-16
Tom Stellard
R600/SI: Remove duplicate pattern
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2014-05-15
Tom Stellard
autoconf: Fix libLLVM-Major-Minor-Patch.so symlink
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2014-05-15
Tom Stellard
R600/SI: Stop using VSrc_* as the default register...
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2014-05-15
Tom Stellard
R600/SI: Fix a bug with handling of INSERT_SUBREG in...
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2014-05-15
Tom Stellard
R600/SI: Only use SALU instructions for 64-bit add...
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2014-05-15
Tom Stellard
R600/SI: Use VALU instructions for i1 ops
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2014-05-13
Tom Stellard
autoconf: Fix soname for libLLVM-Major.Minor.so (2nd...
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2014-05-13
Tom Stellard
Revert "autoconf: Fix soname for libLLVM-Major.Minor.so"
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2014-05-13
Tom Stellard
autoconf: Fix soname for libLLVM-Major.Minor.so
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2014-05-09
Tom Stellard
R600/SI: Teach SIInstrInfo::moveToVALU() how to move...
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2014-05-09
Tom Stellard
R600/SI: Fix SMRD pattern for offsets > 32 bits
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2014-05-09
Tom Stellard
R600: Expand i64 SELECT_CC
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2014-05-09
Tom Stellard
R600: Move MIN/MAX matching from LowerOperation() to...
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2014-05-05
Tom Stellard
R600: Expand i64 ISD:SUB
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2014-05-02
Tom Stellard
R600/SI: Add processor type for Mullins.
Reviewed-by:
Tom Stellard
<thomas.stellard@amd.com>
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2014-05-02
Tom Stellard
R600: Expand vector sin and cos.
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2014-05-02
Tom Stellard
R600: Expand TruncStore i64 -> {i16,i8}
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2014-05-02
Tom Stellard
R600/SI: Only create one instruction when spilling...
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2014-04-30
Tom Stellard
R600/SI: Use VALU instructions for copying i1 values
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2014-04-30
Tom Stellard
R600/SI: Teach moveToVALU how to handle some SMRD instructions
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2014-04-30
Tom Stellard
R600: Remove unused function AMDGPUSubtarget::getDefaultSize()
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2014-04-29
Tom Stellard
R600: Remove duplicate setting of SELECT expansion.
Reviewed-by:
Tom Stellard
<thomas.stellard@amd.com>
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2014-04-29
Tom Stellard
R600/SI: Custom lower SI_IF and SI_ELSE to avoid machine...
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2014-04-29
Tom Stellard
R600/SI: Only select SALU instructions in the entry...
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2014-04-29
Tom Stellard
R600: optimize the UDIVREM 64 algorithm
Reviewed-by:
Tom Stellard
<thomas.stellard@amd.com>
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2014-04-29
Tom Stellard
R600: Implement iterative algorithm for udivrem
Reviewed-by:
Tom Stellard
<thomas.stellard@amd.com>
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2014-04-29
Tom Stellard
R600: Change UDIV/UREM to UDIVREM when legalizing types
Reviewed-by:
Tom Stellard
<thomas.stellard@amd.com>
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2014-04-29
Tom Stellard
R600: remove unused variable
Reviewed-by:
Tom Stellard
<thomas.stellard@amd.com>
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2014-04-22
Tom Stellard
R600/SI: Reorganize SIInstructions.td
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2014-04-18
Tom Stellard
R600/SI: Use SReg_64 instead of VSrc_64 when selecting...
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2014-04-17
Tom Stellard
R600: Add comment clariying use of sext for result...
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2014-04-17
Tom Stellard
R600/SI: Stop using i128 as the resource descriptor...
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2014-04-17
Tom Stellard
R600/SI: Change default register class for i32 to SReg_32
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2014-04-17
Tom Stellard
R600/SI: Teach SIInstrInfo::moveToVALU() how to handle...
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2014-04-17
Tom Stellard
R600/SI: Legalize operands after changing dst reg in...
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2014-04-16
Tom Stellard
Added new functionality to LLVM C API to use DiagnosticInfo...
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2014-04-11
Tom Stellard
SelectionDAG: Use helper function to improve legalization...
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2014-04-11
Tom Stellard
SelectionDAG: Factor ISD::MUL lowering code out of...
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2014-04-07
Tom Stellard
R600/SI: Handle INSERT_SUBREG in SIFixSGPRCopies
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2014-04-07
Tom Stellard
R600: Match 24-bit arithmetic patterns in a Target...
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2014-04-07
Tom Stellard
R600: Replace dyn_cast + assert with cast
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2014-04-03
Tom Stellard
R600: Correct opcode for BFE_INT
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2014-04-03
Tom Stellard
R600/SI: Lower 64-bit immediates using REG_SEQUENCE
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2014-04-02
Tom Stellard
TargetLibraryInfo: Disable memcpy and memset on R600
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2014-03-31
Tom Stellard
R600/SI: Implement SIInstrInfo::isTriviallyRematerializable()
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2014-03-31
Tom Stellard
R600/SI: Lower i64 SELECT by bitcasting to a vector...
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2014-03-31
Tom Stellard
R600/SI: Return the correct index for VGPRs in getHWRegIndex()
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2014-03-24
Tom Stellard
R600/SI: Fix warning with gcc 4.8.2
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2014-03-24
Tom Stellard
R600/SI: Promote fp64 SELECT to i64
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2014-03-24
Tom Stellard
SelectionDAG: Allow promotion of SELECT nodes from...
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2014-03-24
Tom Stellard
R600: Reorganize tablegen instruction definitions
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2014-03-21
Tom Stellard
R600/SI: Handle MUBUF instructions in SIInstrInfo:...
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2014-03-21
Tom Stellard
R600/SI: Handle S_MOV_B64 in SIInstrInfo::moveToVALU()
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2014-03-21
Tom Stellard
R600/SI: Use SGPR_(32|64) reg clases when lowering...
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2014-03-21
Tom Stellard
Sink: Don't sink static allocas from the entry block
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2014-03-17
Tom Stellard
R600/SI: Fix implementation of isInlineConstant() used...
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2014-03-17
Tom Stellard
R600/SI: Use correct dest register class for V_READFIRSTLANE_B32
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2014-03-17
Tom Stellard
R600/SI: Add generic checks to SIInstrInfo::verifyInstruction()
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2014-03-13
Tom Stellard
R600: LDS instructions shouldn't implicitly define...
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2014-03-07
Tom Stellard
R600/SI: Using SGPRs is illegal for instructions that...
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2014-03-07
Tom Stellard
R600/SI: Custom lower i1 stores
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2014-03-03
Tom Stellard
Add patch level to llvm version in CMake and Autoconf
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2014-02-28
Tom Stellard
R600: Verify all instructions in the AsmPrinter on...
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2014-02-28
Tom Stellard
R600/SI: Expand all v16[if]32 operations
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2014-02-25
Tom Stellard
R600: Don't unconditionally unroll loops with private...
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2014-02-25
Tom Stellard
R600/SI: Custom select 64-bit ADD
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2014-02-14
Tom Stellard
TargetLowering: n * r where n > 2 should be an illegal...
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2014-02-13
Tom Stellard
R600/SI: Expand all v8[if]32 operations
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2014-02-13
Tom Stellard
R600/SI: Add a pattern for i32 anyext
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2014-02-13
Tom Stellard
R600/SI: Completely Disable TypeRewriter on compute
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2014-02-13
Tom Stellard
R600/SI: Split global vector loads with more than 4...
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2014-02-13
Tom Stellard
R600/SI: Add ShaderType attribute to some tests
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2014-02-10
Tom Stellard
R600/SI: Initialize M0 and emit S_WQM_B64 whenever...
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2014-02-10
Tom Stellard
R600/SI: Only use S_WQM_B64 in pixel shaders
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2014-02-06
Tom Stellard
R600/SI: Add a MUBUF store pattern for Reg+Imm offsets
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2014-02-06
Tom Stellard
R600/SI: Add a MUBUF store pattern for Imm offsets
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2014-02-06
Tom Stellard
R600/SI: Add a MUBUF load pattern for Reg+Imm offsets
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2014-02-06
Tom Stellard
R600/SI: Use immediates offsets for SMRD instructions...
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2014-02-04
Tom Stellard
R600/SI: Expand i1 BR_CC
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2014-02-04
Tom Stellard
R600/SI: Don't assume copies will be coalesced in SIFixSGPRC...
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2014-02-04
Tom Stellard
R600/SI: Custom lower i64 ISD::SELECT
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2014-02-04
Tom Stellard
R600: Enable vector fpow.
Reviewed-by:
Tom Stellard
<thomas.stellard@amd.com>
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2014-02-04
Tom Stellard
HowToReleaseLLVM: Add information about dot releases
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2014-01-23
Tom Stellard
R600: Remove successive JUMP in AnalyzeBranch when...
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2014-01-23
Tom Stellard
R600: Disable the BFE pattern
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2014-01-23
Tom Stellard
R600: Correctly handle vertex fetch clauses the precede...
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2014-01-23
Tom Stellard
R600: Unconditionally unroll loops that contain GEPs...
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