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drm/i915: vma/ppgtt lifetime rules
2014-08-12 Michel Thierrydrm/i915: vma/ppgtt lifetime rules
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-11 Oscar Mateodrm/i915/bdw: Always use MMIO flips with Execlists
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-11 Oscar Mateodrm/i915/bdw: Workload submission mechanism for Execlists
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-11 Oscar Mateodrm/i915/bdw: GEN-specific logical ring emit batchbuffer...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-11 Oscar Mateodrm/i915/bdw: Interrupts with logical rings
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-11 Oscar Mateodrm/i915/bdw: Ring idle and stop with logical rings
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-11 Oscar Mateodrm/i915/bdw: GEN-specific logical ring emit flush
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-11 Oscar Mateodrm/i915/bdw: GEN-specific logical ring emit request
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-11 Oscar Mateodrm/i915/bdw: New logical ring submission mechanism
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-11 Ville Syrjälädrm/i915: Make hpd debug messages less cryptic
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-11 Oscar Mateodrm/i915/bdw: GEN-specific logical ring set/get seqno
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-11 Oscar Mateodrm/i915/bdw: GEN-specific logical ring init
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-11 Oscar Mateodrm/i915/bdw: Generic logical ring init and cleanup
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-11 Oscar Mateodrm/i915/bdw: Skeleton for the new logical rings submission...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-11 Oscar Mateodrm/i915: Abstract the legacy workload submission mechanism...
As suggested by Daniel Vetter. The idea, in subsequent patches...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-11 Oscar Mateodrm/i915/bdw: Deferred creation of user-created LRCs
requested by Daniel Vetter.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-11 Oscar Mateodrm/i915/bdw: Populate LR contexts (somewhat)
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-11 Daniel Vetterdrm/i915/bdw: Add a context and an engine pointers...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-11 Oscar Mateodrm/i915/bdw: Allocate ringbuffers for Logical Ring...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-11 Oscar Mateodrm/i915/bdw: A bit more advanced LR context alloc...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-11 Oscar Mateodrm/i915/bdw: Introduce one context backing object...
...backing object pointer behind. Daniel Vetter suggested
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-11 Oscar Mateodrm/i915/bdw: Initialization for Logical Ring Contexts
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-11 Daniel Vetterdrm/i915: WARN if module opt sanitization goes out...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-11 Oscar Mateodrm/i915/bdw: Macro for LRCs and module option for...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-11 Oscar Mateodrm/i915/bdw: New source and header file for LRs, LRCs...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-11 Chris Wilsondrm/i915: Simplify relocate_entry_gtt() and make 64...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-11 Chris Wilsondrm/i915: Remove redundant list_empty(eb->vmas) tests...
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-11 Chris Wilsondrm/i915: Pre-validate the NEED_GTTS flag for execbuffer
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-11 Daniel Vetterdrm/i915: Fix secure dispatch with full ppgtt
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-11 Chris Wilsondrm/i915: Agnostic INTEL_INFO
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-11 Chris Wilsondrm/i915: Double check ring is idle before declaring...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-11 Damien Lespiaudrm/i915: Remove set but unused 'gt_perf_status'
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-11 Damien Lespiaudrm/i915: Make intel_disable_shared_dpll() static
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-11 Chris Wilsondrm/i915: Copy PCI device id into the device info block
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-11 Chris Wilsondrm/i915: Remove fenced_gpu_access and pending_fenced_gpu_access
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-11 Chris Wilsondrm/i915: Force CPU relocations if not GTT mapped
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-11 Chris Wilsondrm/i915: Only perform set-to-gtt domain for objects...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-11 Damien Lespiaudrm/i915: Fix wrong number of HDMI translation entries
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-11 Sonika Jindaldrm/i915: Continuation of future readiness series
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-09 Paulo Zanonidrm/i915: fix i915_interrupt_info on BDW
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-08 Ville Syrjälädrm/i915: Call .update_primary_plane in intel_{enable...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-08 Ville Syrjälädrm/i915: Eliminate rmw from .update_primary_plane()
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-08 Damien Lespiaudrm/i915: Fix erroneous conversion to u8
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-08 Daniel Vetterdrm/i915: Update DRIVER_DATE to 20140808
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-08 Daniel Vetterdrm/i915: No busy-loop wait_for in the ring init code
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-08 Gajanan Bhatdrm/i915: Add sprite watermark programming for VLV...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-08 Gajanan Bhatdrm/i915: Round-up clock and limit drain latency
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-08 Gajanan Bhatdrm/i915: Generalize drain latency computation
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-08 Ville Syrjälädrm/i915: Free pending page flip events at .preclose()
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-08 Jesse Barnesdrm/i915: clean up PPGTT checking logic
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-08 Ville Syrjälädrm/i915: Polish the chv cmnlane resrt macros
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-08 Ville Syrjälädrm/i915: Hack to tie both common lanes together on chv
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-08 Ville Syrjälädrm/i915: Add cherryview_update_wm()
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-08 Gajanan Bhatdrm/i915: Update DDL only for current CRTC
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-08 Ville Syrjälädrm/i915: Parametrize VLV_DDL registers
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-08 Ville Syrjälädrm/i915: Fill out the FWx watermark register defines
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-08 Sonika Jindaldrm: Resetting rotation property
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-08 Ville Syrjälädrm/i915: Add rotation property for sprites
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-08 Sonika Jindaldrm: Add rotation_property to mode_config
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-08 Ville Syrjälädrm/i915: Make intel_plane_restore() return an error
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-08 Ville Syrjälädrm/i915: Add 180 degree sprite rotation support
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-08 Damien Lespiaudrm/i915: Introduce a for_each_intel_encoder() macro
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-08 Damien Lespiaudrm/i915: Demote the DRRS messages to debug messages
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-08 Paulo Zanonidrm/i915: remove duplicate register defines
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-08 Damien Lespiaudrm/i915: Remove now useless comments about the translation...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-08 Damien Lespiaudrm/i915/bdw: Remove the HDMI/DVI entry from the DP...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-08 Damien Lespiaudrm/i915/bdw: Provide the BDW specific HDMI buffer...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-08 Damien Lespiaudrm/i915: Gather the HDMI level shifter logic into...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-08 Rodrigo Vividrm/i915: Introduce FBC False Color for debug purposes.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-08 Daniel Vetterdrm/i915: Align intel_dsi*.c files a bit
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-08 Shobhit Kumardrm/i915: Add support for Video Burst Mode for MIPI DSI
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-08 Ville Syrjälädrm/i915: Clarify CHV swing margin/deemph bits
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-08 Ville Syrjälädrm/i915: Call intel_{dp, hdmi}_prepare for chv
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-08 Ville Syrjälädrm/i915: Split chv_update_pll() apart
 Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-08 Ville Syrjälädrm/i915: Leave DPLL ref clocks on
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-08 Ville Syrjälädrm/i915: Disable cdclk changes for chv until Punit...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-08 Ville Syrjälädrm/i915: Add cdclk change support for chv
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-08 Paulo Zanonid rm/i915: freeze display before the interrupts and GT
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-08 Daniel Vetterdrm/i915: Make ddi_clock_gate() HSW/BDW specific
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-08 Damien Lespiaudrm/i915: Split the CDCLK retrieval per-platform
Suggested-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-08 Damien Lespiaudrm/i915: Make intel_ddi_calculate_wrpll() HSW/BDW...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-08 Damien Lespiaudrm/i915: Split the BDW/HSW specific shared pll selection
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-08 Damien Lespiaudrm/i915: Fix stale comment for intel_ddi_pll_select()
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-08 Damien Lespiaudrm/i915: Restrict hsw_dp_set_ddi_pll_sel() to HSW/BDW
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-08 Damien Lespiaudrm/i915: Extract the HSW/BDW shared dpll init code
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-08 Damien Lespiaudrm/i915: Extract the HSW DDI selection code into its...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-08 Damien Lespiaudrm/i915: Add a space to the shared DPLL debug message
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-08 Damien Lespiaudrm/i915: Specify when the PLL hw state fields are...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-08 Ville Syrjälädrm/i915: Add DP training pattern 3 for CHV
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-08 Ville Syrjälädrm/i915: Split a few long debug prints
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-08 Rafael Barbalhodrm/i915: Fix read back of plane stride register
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-08 Ville Syrjälädrm/i915: Add chv port D TX wells
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-08 Ville Syrjälädrm/i915: Add chv port B and C TX wells
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-08 Ville Syrjälädrm/i915: Add per-pipe power wells for chv
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-08 Ville Syrjälädrm/i915: Add disp2d power well for chv
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-08 Ville Syrjälädrm/i915: Kill intel_reset_dpio()
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-08 Ville Syrjälädrm/i915: Add chv cmnlane power wells
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-08 Ville Syrjälädrm/i915: Add chv_power_wells[]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-08 Ville Syrjälädrm/i915: Kill intel_crtc->vbl_wait
Suggested-by: Daniel Vetter <daniel@ffwll.ch>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2014-08-08 Ville Syrjälädrm: Add drm_crtc_vblank_waitqueue()
Suggested-by: Daniel Vetter <daniel@ffwll.ch>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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