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[mips][microMIPS] Implement LB, LBE, LBU and LBUE instructions
2015-10-13
Matt Arsenault
DAGCombiner: Don't stop finding better chain on 2 aliases
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2015-10-13
Matt Arsenault
AMDGPU: Refactor isVGPRToSGPRCopy
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2015-10-12
Matt Arsenault
DAGCombiner: Combine extract_vector_elt from build_vector
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2015-10-12
Matt Arsenault
AMDGPU: Register some more passes so -print-before...
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2015-10-12
Matt Arsenault
Enable verifier after PeepholeOptimizer
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2015-10-07
Matt Arsenault
AMDGPU: Fix missing implicit m0 uses on movrel instructions
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2015-10-07
Matt Arsenault
AMDGPU: Add comment for VOP2b operand class
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2015-10-07
Matt Arsenault
AMDGPU: Properly register passes
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2015-10-07
Matt Arsenault
AMDGPU: Use explicit register size indirect pseudos
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2015-10-07
Matt Arsenault
AMDGPU: Remove inferRegClassFromUses / inferRegClassFromDefs
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2015-10-02
Matt Arsenault
AMDGPU/SI: Add verifier check for exec reads
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2015-10-02
Matt Arsenault
Add way to test for generic TargetOpcodes
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2015-10-01
Matt Arsenault
AMDGPU: Fix unused variable warning in release build
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2015-10-01
Matt Arsenault
AMDGPU: Move SIFixSGPRLiveRanges to be a regalloc pass
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2015-10-01
Matt Arsenault
AMDGPU: Merge if and switch
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2015-10-01
Matt Arsenault
AMDGPU: Remove dead code
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2015-10-01
Matt Arsenault
AMDGPU: Make SIInsertWaits about a factor of 4 faster
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2015-09-28
Matt Arsenault
AMDGPU: Factor switch into separate function
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2015-09-28
Matt Arsenault
AMDGPU: Fix splitting x16 SMRD loads
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2015-09-28
Matt Arsenault
AMDGPU: Fix moving SMRD loads with literal offsets...
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2015-09-28
Matt Arsenault
AMDGPU: Fix splitting SMRD with large offset
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2015-09-28
Matt Arsenault
AMDGPU: Add testcases
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2015-09-28
Matt Arsenault
AMDGPU: Cleanup test
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2015-09-26
Matt Arsenault
AMDGPU: Remove hasPostISelHook from most instructions
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2015-09-26
Matt Arsenault
AMDGPU: Switch over reg class size instead of checking...
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2015-09-26
Matt Arsenault
AMDGPU: Don't handle invalid reg classes in helper...
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2015-09-26
Matt Arsenault
AMDGPU: Set CopyCost of register classes
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2015-09-26
Matt Arsenault
AMDGPU: VOP3b definition cleanups
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2015-09-26
Matt Arsenault
AMDGPU: Fix sched model for VOP2b instructions
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2015-09-25
Matt Arsenault
AMDGPU: Construct new buffer instruction when moving...
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2015-09-25
Matt Arsenault
DAGCombiner: Check if store is volatile first
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2015-09-25
Matt Arsenault
PeepholeOptimizer: Remove redundant copies
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2015-09-25
Matt Arsenault
AMDGPU: Add some more tests for literal operands
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2015-09-25
Matt Arsenault
AMDGPU: Make getNamedOperandIdx declaration readonly
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2015-09-25
Matt Arsenault
AMDGPU: Disable some passes that are not meaningful
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2015-09-25
Matt Arsenault
AMDGPU: Handle i64->v2i32 loads/stores in PreprocessISelDAG
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2015-09-25
Matt Arsenault
AMDGPU: Fix recomputing dominator tree unnecessarily
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2015-09-25
Matt Arsenault
AMDGPU: Re-justify workaround and fix worked around...
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2015-09-25
Matt Arsenault
AMDGPU: Don't create REG_SEQUENCE with SGPR dest and...
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2015-09-25
Matt Arsenault
AMDGPU: Fix not adding exec to defs of cmpx instruction...
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2015-09-25
Matt Arsenault
AMDGPU: Improve accuracy of instruction rates for VOPC
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2015-09-25
Matt Arsenault
AMDGPU: Remove unused includes
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2015-09-24
Matt Arsenault
Fix typo
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2015-09-24
Matt Arsenault
AMDGPU: Add s_dcache_* instructions
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2015-09-24
Matt Arsenault
AMDGPU: Add cache invalidation instructions.
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2015-09-24
Matt Arsenault
AMDGPU: Run mubuf assembler test for CI
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2015-09-24
Matt Arsenault
Introduce target hook for optimizing register copies
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2015-09-24
Matt Arsenault
AMDGPU: Return after instruction is processed.
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2015-09-24
Matt Arsenault
AMDGPU: Remove another unnecessary check from commuteInstruction
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2015-09-24
Matt Arsenault
AMDGPU: Add readonly to InstrMapping functions
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2015-09-24
Matt Arsenault
TableGen: Add LLVM_READONLY to generated InstrMapping...
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2015-09-24
Matt Arsenault
AMDGPU: Fix printing trailing whitespace for mubuf...
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2015-09-24
Matt Arsenault
Remove dead declaration
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2015-09-24
Matt Arsenault
Use new TokenFactor chain when merging stores
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2015-09-24
Matt Arsenault
AMDGPU: Reduce number of copies emitted
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2015-09-22
Matt Arsenault
AMDGPU: Remove unnecessary check
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2015-09-21
Matt Arsenault
Fix accidentally committed debug printing
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2015-09-21
Matt Arsenault
AMDGPU: Move copy handling under switch like other...
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2015-09-21
Matt Arsenault
DAGCombiner: Replace store of FP constant after attemping...
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2015-09-21
Matt Arsenault
Factor replacement of stores of FP constants into new...
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2015-09-21
Matt Arsenault
Fix missing C++ mode comment
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2015-09-19
Matt Arsenault
AMDGPU: Remove dead code
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2015-09-19
Matt Arsenault
AMDGPU: Add failing testcase for live interval construction
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2015-09-10
Matt Arsenault
AMDGPU: Simplify debug printing
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2015-09-10
Matt Arsenault
AMDGPU: Use StringRef value
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2015-09-10
Matt Arsenault
AMDGPU/SI: Fix more cases of losing exec operands
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2015-09-10
Matt Arsenault
AMDGPU/SI: Fix creating v_mov_b32s without exec uses
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2015-09-09
Matt Arsenault
AMDGPU: Extract full 64-bit subregister and use subregs
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2015-09-09
Matt Arsenault
AMDGPU: Remove unused multiclass argument
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2015-09-09
Matt Arsenault
AMDGPU: Fix not encoding src2 of VOP3b instructions
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2015-09-09
Matt Arsenault
SelectionDAG: Support Expand of f16 extloads
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2015-09-09
Matt Arsenault
Fix typos / grammar
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2015-09-08
Matt Arsenault
AMDGPU/SI: Fix input vcc operand for VOP2b instructions
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2015-09-08
Matt Arsenault
Add const overload of findRegisterUseOperand
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2015-09-08
Matt Arsenault
AMDGPU: Mark s_barrier as a high latency instruction
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2015-09-08
Matt Arsenault
AMDGPU: Fix s_barrier flags
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2015-09-08
Matt Arsenault
AMDGPU: Handle sub of constant for DS offset folding
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2015-09-01
Matt Arsenault
AMDGPU: Fix adding redundant implicit operands
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2015-08-29
Matt Arsenault
AMDGPU: Add sdst operand to VOP2b instructions
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2015-08-29
Matt Arsenault
AMDGPU: Set mem operands for spill instructions
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2015-08-29
Matt Arsenault
AMDGPU: Fix dropping mem operands when moving to VALU
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2015-08-28
Matt Arsenault
Make MergeConsecutiveStores look at other stores on...
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2015-08-27
Matt Arsenault
AMDGPU/SI: Add test for folding constants into operands
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2015-08-26
Matt Arsenault
AMDGPU: Delete dead code
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2015-08-26
Matt Arsenault
AMDGPU: Don't reprocess instructions when splitting...
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2015-08-26
Matt Arsenault
AMDGPU: Fix not moving users of s_bfe_i64 to VALU
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2015-08-26
Matt Arsenault
AMDGPU: Don't create intermediate SALU instructions
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2015-08-26
Matt Arsenault
AMDGPU/SI: Report SIFixSGPRLiveRanges changed function
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2015-08-26
Matt Arsenault
AMDGPU: Make sure to reserve super registers
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2015-08-26
Matt Arsenault
AMDGPU: Produce error on dynamic_stackalloc
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2015-08-22
Matt Arsenault
AMDGPU: Allow specifying different opcode on VI for...
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2015-08-22
Matt Arsenault
AMDGPU: Improve accuracy of instruction rates for some...
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2015-08-22
Matt Arsenault
AMDGPU: Use DFS to avoid second loop over function
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2015-08-22
Matt Arsenault
AMDGPU: Make sure to run verifier after SIFixSGPRLiveRanges
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2015-08-22
Matt Arsenault
AMDGPU: Improve debug printing in SIFixSGPRLiveRanges
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2015-08-22
Matt Arsenault
AMDGPU: Move CI instructions into CIInstructions.td
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2015-08-21
Matt Arsenault
AMDGPU: Minor cleanups to help with f16 support
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2015-08-15
Matt Arsenault
AMDGPU/SI: Only look at live out SGPR defs
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2015-08-15
Matt Arsenault
LoopStrengthReduce: Try to pass address space to isLegalAddr...
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2015-08-15
Matt Arsenault
AMDGPU/SI: Fix printing useless info with amdhsa
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