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drm/i915: Workaround CHV pipe C cursor fail
2015-10-27
Thomas Daniel
drm/i915: Fix maxfifo watermark calc on vlv cursor...
Signed-off-by:
Thomas Daniel
<thomas.daniel@intel.com>
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2015-02-24
Thomas Daniel
drm/i915: Shift driver's HWSP usage out of reserved...
Signed-off-by:
Thomas Daniel
<thomas.daniel@intel.com>
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2015-02-23
Thomas Daniel
drm/i915: Reset logical ring contexts' head and tail...
Signed-off-by:
Thomas Daniel
<thomas.daniel@intel.com>
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2015-01-12
Thomas Daniel
drm/i915: Reset CSB read pointer in ring init
Signed-off-by:
Thomas Daniel
<thomas.daniel@intel.com>
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2014-12-15
Thomas Daniel
drm/i915/bdw: Enable execlists by default where supported
Signed-off-by:
Thomas Daniel
<thomas.daniel@intel.com>
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2014-12-03
Thomas Daniel
drm/i915: Fix startup failure in LRC mode after recent...
Signed-off-by:
Thomas Daniel
<thomas.daniel@intel.com>
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2014-12-03
Thomas Daniel
drm/i915: Fix context object leak for legacy contexts
Signed-off-by:
Thomas Daniel
<thomas.daniel@intel.com>
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2014-12-02
Thomas Daniel
drm/i915: Don't pin LRC in GGTT when dumping in debugfs
Signed-off-by:
Thomas Daniel
<thomas.daniel@intel.com>
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2014-11-19
Thomas Daniel
drm/i915/bdw: Pin the ringbuffer backing object to...
Signed-off-by:
Thomas Daniel
<thomas.daniel@intel.com>
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2014-11-19
Thomas Daniel
drm/i915/bdw: Clean up execlist queue items in retire_work
Signed-off-by:
Thomas Daniel
<thomas.daniel@intel.com>
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2014-11-07
Thomas Daniel
drm/i915/bdw: Setup global hardware status page in...
Signed-off-by:
Thomas Daniel
<thomas.daniel@intel.com>
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2014-09-03
Thomas Daniel
drm/i915/bdw: Don't execute context reset and switch...
Signed-off-by:
Thomas Daniel
<thomas.daniel@intel.com>
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2014-09-03
Thomas Daniel
drm/i915/bdw: Do not initialize PPGTT in the legacy...
Signed-off-by:
Thomas Daniel
<thomas.daniel@intel.com>
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2014-09-03
Thomas Daniel
drm/i915/bdw: Populate lrc with aliasing ppgtt if required
Signed-off-by:
Thomas Daniel
<thomas.daniel@intel.com>
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2014-08-14
Thomas Daniel
drm/i915/bdw: Handle context switch events
Signed-off-by:
Thomas Daniel
<thomas.daniel@intel.com>
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