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oota-llvm.git
2013-06-06 Arnold SchwaighoferCodeGenSchedule: smallvector.push_back(smallvector... commit | commitdiff | tree | snapshot
2013-06-06 Vincent LejeuneR600: Rewrite an awkward loop in R600MachineScheduler commit | commitdiff | tree | snapshot
2013-06-06 Nadav RotemJeffrey Yasskin volunteered to benchmark the vectorizer... commit | commitdiff | tree | snapshot
2013-06-06 David BlaikieFix break in r183446 - helps to increment the iterator... commit | commitdiff | tree | snapshot
2013-06-06 Arnold SchwaighoferRevert "ARM sched model: Add SIMD/VFP load/store instru... commit | commitdiff | tree | snapshot
2013-06-06 David BlaikieDebug Info: simplify parameter ordering preservation commit | commitdiff | tree | snapshot
2013-06-06 Arnold SchwaighoferARM sched model: Add SIMD/VFP load/store instructions... commit | commitdiff | tree | snapshot
2013-06-06 Kevin EnderbyMove the test for the data in code into the ARM directo... commit | commitdiff | tree | snapshot
2013-06-06 Arnold SchwaighoferARM sched model: Add integer VFP/SIMD instructions... commit | commitdiff | tree | snapshot
2013-06-06 Jakub StaszakRe-apply "Use IRBuilder instead of ConstantInt methods... commit | commitdiff | tree | snapshot
2013-06-06 Arnold SchwaighoferARM sched model: Add integer load/store instructions... commit | commitdiff | tree | snapshot
2013-06-06 Arnold SchwaighoferARM sched model: Add integer arithmetic instructions... commit | commitdiff | tree | snapshot
2013-06-06 Arnold SchwaighoferARM sched model: Cortex A9 - More InstRW sched resources commit | commitdiff | tree | snapshot
2013-06-06 Rafael EspindolaAdd a testcase from pr16244. commit | commitdiff | tree | snapshot
2013-06-06 Arnold SchwaighoferARM sched model: Add branch thumb instructions commit | commitdiff | tree | snapshot
2013-06-06 Arnold SchwaighoferARM sched model: Add branch thumb2 instructions commit | commitdiff | tree | snapshot
2013-06-06 Arnold SchwaighoferARM sched model: Add branch instructions commit | commitdiff | tree | snapshot
2013-06-06 Arnold SchwaighoferARM sched model: Add preload thumb2 instructions commit | commitdiff | tree | snapshot
2013-06-06 Jakub StaszakRemove unimplemented definition. Found using [-Wunused... commit | commitdiff | tree | snapshot
2013-06-06 Arnold SchwaighoferARM sched model: Add preload instructions commit | commitdiff | tree | snapshot
2013-06-06 Kevin EnderbyTeach llvm-objdump with the -macho parser how to use... commit | commitdiff | tree | snapshot
2013-06-06 Arnold SchwaighoferARM sched model: Add more ALU and CMP thumb instructions commit | commitdiff | tree | snapshot
2013-06-06 Rafael EspindolaRevert "Use IRBuilder instead of ConstantInt methods... commit | commitdiff | tree | snapshot
2013-06-06 Arnold SchwaighoferARM sched model: Add more ALU and CMP thumb2 instructions commit | commitdiff | tree | snapshot
2013-06-06 Vincent LejeuneR600: Remove leftover code in R600MachineScheduler.cpp commit | commitdiff | tree | snapshot
2013-06-06 Rafael EspindolaPrint symbol names in relocations when dumping COFF... commit | commitdiff | tree | snapshot
2013-06-06 Bill WendlingCast to the correct type. Pointer, not reference. commit | commitdiff | tree | snapshot
2013-06-06 NAKAMURA TakumiR600OptimizeVectorRegisters.cpp: Tweak a warning. ... commit | commitdiff | tree | snapshot
2013-06-06 NAKAMURA TakumiR600OptimizeVectorRegisters.cpp: Suppress a warning... commit | commitdiff | tree | snapshot
2013-06-06 NAKAMURA TakumiTrailing linefeed. commit | commitdiff | tree | snapshot
2013-06-06 Bill WendlingCast to the proper type. commit | commitdiff | tree | snapshot
2013-06-06 Jakub StaszakRemove unneeded cast<>. commit | commitdiff | tree | snapshot
2013-06-06 Sean SilvaAdd some class documentation to BinaryRef. commit | commitdiff | tree | snapshot
2013-06-06 Bill WendlingCache the TargetLowering info object as a pointer. commit | commitdiff | tree | snapshot
2013-06-06 Jakub StaszakUse IRBuilder instead of ConstantInt methods. commit | commitdiff | tree | snapshot
2013-06-06 Bill WendlingDon't cache the TargetLoweringInfo object inside of... commit | commitdiff | tree | snapshot
2013-06-05 Sean SilvaRename operator== parameter to `RHS`. commit | commitdiff | tree | snapshot
2013-06-05 Sean SilvaRemove error-prone methods of BinaryRef. commit | commitdiff | tree | snapshot
2013-06-05 Sean SilvaAdd writeAsHex(raw_ostream &) method to BinaryRef. commit | commitdiff | tree | snapshot
2013-06-05 Tom StellardR600: Replace predicate loop with predicate function commit | commitdiff | tree | snapshot
2013-06-05 Sean SilvaRename BinaryRef::isBinary to more descriptive DataIsHe... commit | commitdiff | tree | snapshot
2013-06-05 Sean SilvaAdd BinaryRef binary_size() method. commit | commitdiff | tree | snapshot
2013-06-05 Sean SilvaComment BinaryRef::Data. commit | commitdiff | tree | snapshot
2013-06-05 Bill WendlingAdd space to assert message. commit | commitdiff | tree | snapshot
2013-06-05 Sean SilvaAdd writeAsBinary(raw_ostream &) method to BinaryRef. commit | commitdiff | tree | snapshot
2013-06-05 Vincent LejeuneR600: Add a pass that merge Vector Register commit | commitdiff | tree | snapshot
2013-06-05 Sean Silva[docs] Add link to C++ ABI document. commit | commitdiff | tree | snapshot
2013-06-05 Sean Silva[docs] Add link to SysV ABI document. commit | commitdiff | tree | snapshot
2013-06-05 Sean Silva[ELF] Add ELFOSABI_GNU. commit | commitdiff | tree | snapshot
2013-06-05 Rafael EspindolaDon't hide the first ELF symbol. commit | commitdiff | tree | snapshot
2013-06-05 Vincent LejeuneR600: Schedule copy from phys register at beginning... commit | commitdiff | tree | snapshot
2013-06-05 Sean Silvayaml2obj: split out COFF logic into separate file commit | commitdiff | tree | snapshot
2013-06-05 Akira Hatanaka[mips] brcond + setgt/setugt instruction selection... commit | commitdiff | tree | snapshot
2013-06-05 Sean Silvayaml2obj: add -format=<fmt> to choose input YAML interp... commit | commitdiff | tree | snapshot
2013-06-05 Jakub StaszakUse IRBuilder instead of ConstantInt methods. It simpli... commit | commitdiff | tree | snapshot
2013-06-05 Michael Liao[PATCH] Fix VGATHER* operand constraints commit | commitdiff | tree | snapshot
2013-06-05 Rafael EspindolaRepresent symbols with a SymbolIndex,SectionIndex pair. commit | commitdiff | tree | snapshot
2013-06-05 Arnold SchwaighoferARM sched model: Add more ALU and CMP instructions commit | commitdiff | tree | snapshot
2013-06-05 Arnold SchwaighoferARM sched model: Add divsion, loads, branches, vfp cvt commit | commitdiff | tree | snapshot
2013-06-05 Arnold SchwaighoferARMInstrInfo: Improve isSwiftFastImmShift commit | commitdiff | tree | snapshot
2013-06-05 Arnold SchwaighoferSubtargetEmitter fix commit | commitdiff | tree | snapshot
2013-06-05 Mihai PopaThis is a simple patch that changes RRX and RRXS to... commit | commitdiff | tree | snapshot
2013-06-05 Sylvestre LedruThe GNU/HURD is also using the libc. Therefor, endian... commit | commitdiff | tree | snapshot
2013-06-05 Andrew TrickFix a tblgen subtargetemitter bug, for future Swift... commit | commitdiff | tree | snapshot
2013-06-05 David BlaikiePR15662: Optimized debug info produces out of order... commit | commitdiff | tree | snapshot
2013-06-05 Tom StellardR600: Make sure to schedule AR register uses and defs... commit | commitdiff | tree | snapshot
2013-06-05 Rafael EspindolaDon't print default values for NumberOfAuxSymbols and... commit | commitdiff | tree | snapshot
2013-06-05 Rafael EspindolaHandle (at least don't crash on) relocations with no... commit | commitdiff | tree | snapshot
2013-06-05 Rafael EspindolaMove BinaryRef to a new include/llvm/Object/YAML.h... commit | commitdiff | tree | snapshot
2013-06-05 Rafael EspindolaRevert "R600: Add a pass that merge Vector Register" commit | commitdiff | tree | snapshot
2013-06-05 Rafael EspindolaHandle relocations that don't point to symbols. commit | commitdiff | tree | snapshot
2013-06-04 Sean Silva[docs] Replace non-existent LLVM_YAML_UNIQUE_TYPE(... commit | commitdiff | tree | snapshot
2013-06-04 Vincent LejeuneR600: Add a pass that merge Vector Register commit | commitdiff | tree | snapshot
2013-06-04 Vincent LejeuneR600: Const/Neg/Abs can be folded to dot4 commit | commitdiff | tree | snapshot
2013-06-04 Evan ChengCortex-R5 can issue Thumb2 integer division instructions. commit | commitdiff | tree | snapshot
2013-06-04 Arnold SchwaighoferRevert series of sched model patches until I figure... commit | commitdiff | tree | snapshot
2013-06-04 Arnold SchwaighoferARM sched model: Add VFP div instruction on Swift commit | commitdiff | tree | snapshot
2013-06-04 Arnold SchwaighoferARM sched model: Add SIMD/VFP load/store instructions... commit | commitdiff | tree | snapshot
2013-06-04 Arnold SchwaighoferARM sched model: Add integer VFP/SIMD instructions... commit | commitdiff | tree | snapshot
2013-06-04 Arnold SchwaighoferARM sched model: Add integer load/store instructions... commit | commitdiff | tree | snapshot
2013-06-04 Arnold SchwaighoferARM sched model: Add integer arithmetic instructions... commit | commitdiff | tree | snapshot
2013-06-04 Arnold SchwaighoferARM sched model: Cortex A9 - More InstRW sched resources commit | commitdiff | tree | snapshot
2013-06-04 Arnold SchwaighoferARM sched model: Add branch thumb instructions commit | commitdiff | tree | snapshot
2013-06-04 Arnold SchwaighoferARM sched model: Add branch thumb2 instructions commit | commitdiff | tree | snapshot
2013-06-04 Arnold SchwaighoferARM sched model: Add branch instructions commit | commitdiff | tree | snapshot
2013-06-04 Arnold SchwaighoferARM sched model: Add preload thumb2 instructions commit | commitdiff | tree | snapshot
2013-06-04 Arnold SchwaighoferARM sched model: Add preload instructions commit | commitdiff | tree | snapshot
2013-06-04 Arnold SchwaighoferARM sched model: Add more ALU and CMP thumb instructions commit | commitdiff | tree | snapshot
2013-06-04 Arnold Schwaighofer ARM sched model: Add more ALU and CMP thumb2 instructions commit | commitdiff | tree | snapshot
2013-06-04 Arnold SchwaighoferARM sched model: Add more ALU and CMP instructions commit | commitdiff | tree | snapshot
2013-06-04 Arnold SchwaighoferARM sched model: Add divsion, loads, branches, vfp cvt commit | commitdiff | tree | snapshot
2013-06-04 Arnold SchwaighoferARMInstrInfo: Improve isSwiftFastImmShift commit | commitdiff | tree | snapshot
2013-06-04 Arnold SchwaighoferSubtargetEmitter fix commit | commitdiff | tree | snapshot
2013-06-04 Richard SmithFix link. commit | commitdiff | tree | snapshot
2013-06-04 Venkatraman... Sparc: No functionality change. Cleanup whitespaces... commit | commitdiff | tree | snapshot
2013-06-04 David MajnemerIndVarSimplify: check if loop invariant expansion can... commit | commitdiff | tree | snapshot
2013-06-04 David MajnemerARM: Fix crash in ARM backend inside of ARMConstantIsla... commit | commitdiff | tree | snapshot
2013-06-04 Bob WilsonRemove "-Wl,-seg1addr -Wl,0xE0000000" from link options. commit | commitdiff | tree | snapshot
2013-06-04 Vincent LejeuneR600: Swizzle texture/export instructions commit | commitdiff | tree | snapshot
2013-06-04 Vincent LejeuneR600: Add a test for r183108 commit | commitdiff | tree | snapshot
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