oota-llvm.git
2014-08-07 Pete CooperTableGen: Change { } to only accept bits<n> entries...
2014-08-07 Pete CooperFix a whole bunch of binary literals which were the...
2014-08-07 Chandler CarruthAdd an option to the shuffle fuzzer that lets you fuzz...
2014-08-07 Bill WendlingUse the minor number for the revision numbers.
2014-08-07 Chandler CarruthAdd a vector shuffle fuzzer.
2014-08-07 Justin BognerDebugInfo: Make a test more portable
2014-08-07 Saleem AbdulrasoolMC: split Win64EHUnwindEmitter into a shared streamer
2014-08-07 Quentin Colombet[X86][SchedModel] Fixed missing/wrong scheduling model...
2014-08-06 Kevin EnderbyAdd the -mcpu= option to llvm-objdump for use with...
2014-08-06 Reid KlecknerMC X86: Accept ".att_syntax prefix" and diagnose noprefix
2014-08-06 David BlaikieRevert "Reapply "DebugInfo: Ensure that all debug locat...
2014-08-06 Sanjay Patelfix typo
2014-08-06 Yaron KerengetNewMemBuffer memsets the buffer to zeros,
2014-08-06 Sanjay PatelFix a test that has no checks.
2014-08-06 Matt ArsenaultR600: Cleanup fadd and fsub tests
2014-08-06 Rui UeyamaRevert "r214897 - Remove dead zero store to calloc...
2014-08-06 Eric ChristopherRemove the target machine from CCState. Previously...
2014-08-06 Adrian PrantlImprove performance of calculateDbgValueHistory.
2014-08-06 Adrian PrantlCleanup collectChangingRegs
2014-08-06 David BlaikieDebugInfo: Fix ranges+gmlt test case to actually exerci...
2014-08-06 Reid KlecknerAdd a triple to this test to get the right IR mangling
2014-08-06 Reid KlecknerDon't count inreg params when mangling fastcall functions
2014-08-06 Reid KlecknerRound up the size of byval arguments to MinAlign
2014-08-06 Duncan P. N... UseListOrder: Use std::vector
2014-08-06 Chad Rosier[AArch64] Add a few isTarget* API to AArch64 Subtarget.
2014-08-06 Chad RosierAdd test case omitted in r214974.
2014-08-06 Chad Rosier[AArch64] Fix OS ABI flag for aarch64-linux-gnu target.
2014-08-06 Sanjay Pateluse register iterators that include self to reduce...
2014-08-06 Robert Khasanov[AVX512] Added load/store instructions to Register2Memo...
2014-08-06 James Molloy[AArch64] Add a testcase for r214957.
2014-08-06 James MolloyAdd a new option -run-slp-after-loop-vectorization.
2014-08-06 Tim NorthoverARM: do not generate BLX instructions on Cortex-M CPUs.
2014-08-06 Tim NorthoverARM-MachO: materialize callee address correctly on...
2014-08-06 James Molloy[AArch64] Conditional selects are expensive on out...
2014-08-06 Chandler Carruth[x86] Fix two independent miscompiles in the process...
2014-08-06 Chandler Carruth[x86] Switch to a formulation of a for loop that is...
2014-08-06 Adam Nemet[X86] Fixes commit r214890 to match the posted patch
2014-08-06 Matt ArsenaultCorrect comment
2014-08-06 Peter Collingbourne[dfsan] Try not to create too many additional basic...
2014-08-06 Matt ArsenaultR600: Increase nearby load scheduling threshold.
2014-08-06 Matt ArsenaultR600/SI: Implement areLoadsFromSameBasePtr
2014-08-06 Quentin Colombet[X86][SchedModel] Fixed some wrong scheduling model...
2014-08-06 David BlaikieDebugInfo: Assert that any CU for which debug_loc lists...
2014-08-05 David BlaikieDebugInfo: Fix a bunch of tests that, owing to their...
2014-08-05 Matt ArsenaultR600/SI: Add definitions for ds_read2st64_ / ds_write2st64_
2014-08-05 JF BastienFix typos in comments and doc
2014-08-05 David BlaikieDebugInfo: Move the reference to the CU from the locati...
2014-08-05 Rafael EspindolaRemove a virtual function from TargetMachine. NFC.
2014-08-05 Jonathan RoelofsRe-apply r214881: Fix return sequence on armv4 thumb
2014-08-05 Lang Hames[MCJIT] Make llvm-rtdyld check RuntimeDyld's error...
2014-08-05 Bill Schmidt[PowerPC] Swap arguments and adjust shift count for...
2014-08-05 Sanjay PatelImproved test cases that were added with r214892.
2014-08-05 Rafael EspindolaDon't internalize all but main by default.
2014-08-05 Rafael EspindolaAdd a test showing the interaction of linker scripts...
2014-08-05 Chandler Carruth[x86] Fix a crasher due to shuffles which cancel each...
2014-08-05 Duncan P. N... Remove dead code in condition
2014-08-05 NAKAMURA TakumiX86CodeEmitter.cpp: Add SEH_Epilogue to ignored list...
2014-08-05 Adam Nemet[X86] Improve comments for r214888
2014-08-05 Matt ArsenaultR600/SI: Use register class instead of list of registers
2014-08-05 Matt ArsenaultR600/SI: Add exec_lo and exec_hi subregisters.
2014-08-05 Duncan P. N... BitcodeReader: Fix non-determinism in use-list order
2014-08-05 Philip ReamesRemove dead zero store to calloc initialized memory
2014-08-05 Jonathan RoelofsRevert r214881 because it broke lots of build-bots
2014-08-05 Sanjay PatelOptimize vector fabs of bitcasted constant integer...
2014-08-05 Adam Nemet[AVX512] Add masking variant and intrinsics for valignd/q
2014-08-05 Adam Nemet[X86] Increase X86_MAX_OPERANDS from 5 to 6
2014-08-05 Adam Nemet[X86] Add lowering to VALIGN
2014-08-05 Adam Nemet[X86] Separate DAG node for valign and palignr
2014-08-05 Adam Nemet[AVX512] alignr: Use suffix rather than name argument...
2014-08-05 Adam Nemet[AVX512] Pull everything alignr-related into the multiclass
2014-08-05 Adam NemetWrap long lines
2014-08-05 Jonathan RoelofsFix return sequence on armv4 thumb
2014-08-05 David BlaikiePartially revert r214761 that asserted that all concret...
2014-08-05 David BlaikieImprove test for merged global debug info by using...
2014-08-05 Joerg SonnenbergerAdd accessors for the PPC 403 bank registers.
2014-08-05 Renato GolinAdd tests for cp10/cp11 on ARMv5/6
2014-08-05 Keith WalkerSpecify that the thumb setend and blx <immed> instructi...
2014-08-05 Keith WalkerDefine stc2/stc2l/ldc2/ldc2l as thumb2 instructions
2014-08-05 Joerg SonnenbergerAccessors for SSR2 and SSR3 on PPC 403.
2014-08-05 Tom StellardR600/SI: Update MUBUF assembly string to match AMD...
2014-08-05 Tom StellardR600/SI: Avoid generating REGISTER_LOAD instructions.
2014-08-05 Joerg SonnenbergerAdd dci/ici instructions for PPC 476 and friends.
2014-08-05 Joerg SonnenbergerAdd mftblo and mftbhi for PPC 4xx.
2014-08-05 Joerg SonnenbergerAdd lswi / stswi for assembler use with a warning to...
2014-08-05 Yi KongAArch64: Add support for instruction prefetch intrinsic
2014-08-05 James MolloyTeach the SLP Vectorizer that keeping some values live...
2014-08-05 Chandler Carruth[x86] Reformat some code I moved around in a prior...
2014-08-05 Joerg SonnenbergerAllow binary and for tblgen math.
2014-08-05 Chandler Carruth[x86] Fix a crash and wrong-code bug in the new vector...
2014-08-05 Juergen Ributzka[FastIsel][AArch64] Fix previous commit r214844 (Don...
2014-08-05 Juergen Ributzka[FastISel][AArch64] Implement the FastLowerArguments...
2014-08-05 Kevin QinRevert "r214832 - MachineCombiner Pass for selecting...
2014-08-05 Juergen Ributzka[FastISel][AArch64] Don't perform sign-/zero-extension...
2014-08-05 Juergen RibutzkaProvide convenient access to the zext/sext attributes...
2014-08-05 Eric ChristopherHave MachineFunction cache a pointer to the subtarget...
2014-08-05 Gerolf HoflehnerMachineCombiner Pass for selecting faster instruction
2014-08-04 Joerg SonnenbergerAdd TCR register access
2014-08-04 Joerg SonnenbergerAdd PPC 603's tlbld and tlbli instructions.
2014-08-04 Renato GolinAllow CP10/CP11 operations on ARMv5/v6
2014-08-04 Bill Schmidt[PPC64LE] Fix wrong IR for vec_sld and vec_vsldoi
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