[Hexagon] Updating mux_ir/ri/ii/rr with encoding bits
[oota-llvm.git] / test / MC / Disassembler / Hexagon /
drwxr-xr-x   ..
-rw-r--r-- 564 alu32_alu.txt
-rw-r--r-- 652 alu32_perm.txt
-rw-r--r-- 842 alu32_pred.txt
-rw-r--r-- 75 lit.local.cfg