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[AArch64][FastISel] Variant of the logical instructions that use two input
authorQuentin Colombet <qcolombet@apple.com>
Fri, 1 May 2015 21:34:57 +0000 (21:34 +0000)
committerQuentin Colombet <qcolombet@apple.com>
Fri, 1 May 2015 21:34:57 +0000 (21:34 +0000)
commit32675bbfd0c79f67865c0999d8c90a31848ee648
treecb230b6de31673895c31228f5a53563e421cd12atree | snapshot
parent204bccaa244e72f650445c04159f3a805885b2b1commit | diff
[AArch64][FastISel] Variant of the logical instructions that use two input
registers cannot write on SP.

rdar://problem/20748715

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236352 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/AArch64/AArch64FastISel.cpp diff | blob | history
test/CodeGen/AArch64/arm64-fast-isel.ll diff | blob | history
C/C++ LLVM-based compilers that forbids OOTA behaviors