ARM: simplify and extend byval handling
authorTim Northover <tnorthover@apple.com>
Wed, 11 Mar 2015 18:54:22 +0000 (18:54 +0000)
committerTim Northover <tnorthover@apple.com>
Wed, 11 Mar 2015 18:54:22 +0000 (18:54 +0000)
commit52f83a9ab3a02b523035044f04702a430570771a
tree153cbc9d05ef71f919d5646a9f0f90600d727433
parentfb149691974a4d3ba47062c7bbdf648834b9001d
ARM: simplify and extend byval handling

The main issue being fixed here is that APCS targets handling a "byval align N"
parameter with N > 4 were miscounting what objects were where on the stack,
leading to FrameLowering setting the frame pointer incorrectly and clobbering
the stack.

But byval handling had grown over many years, and had multiple layers of cruft
trying to compensate for each other and calculate padding correctly. This only
really needs to be done once, in the HandleByVal function. Elsewhere should
just do what it's told by that call.

I also stripped out unnecessary APCS/AAPCS distinctions (now that Clang emits
byvals with the correct C ABI alignment), which simplified HandleByVal.

rdar://20095672

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231959 91177308-0d34-0410-b5e6-96231b3b80d8
16 files changed:
lib/Target/ARM/ARMFrameLowering.cpp
lib/Target/ARM/ARMISelLowering.cpp
lib/Target/ARM/ARMISelLowering.h
lib/Target/ARM/ARMMachineFunctionInfo.h
lib/Target/ARM/Thumb1FrameLowering.cpp
test/CodeGen/ARM/2012-10-04-AAPCS-byval-align8.ll
test/CodeGen/ARM/2012-10-18-PR14099-ByvalFrameAddress.ll
test/CodeGen/ARM/2013-04-05-Small-ByVal-Structs-PR15293.ll
test/CodeGen/ARM/2013-05-02-AAPCS-ByVal-Structs-C4-C5-VFP.ll
test/CodeGen/ARM/2013-05-13-AAPCS-byval-padding.ll
test/CodeGen/ARM/2014-02-21-byval-reg-split-alignment.ll
test/CodeGen/ARM/byval-align.ll [new file with mode: 0644]
test/CodeGen/ARM/debug-frame-vararg.ll
test/CodeGen/ARM/ssp-data-layout.ll
test/CodeGen/ARM/varargs-spill-stack-align-nacl.ll
test/CodeGen/ARM/vargs_align.ll