ARM: do not relax Thumb1 -> Thumb2 if only Thumb1 is available.
authorTim Northover <tnorthover@apple.com>
Mon, 6 Apr 2015 18:44:42 +0000 (18:44 +0000)
committerTim Northover <tnorthover@apple.com>
Mon, 6 Apr 2015 18:44:42 +0000 (18:44 +0000)
commit8af3f965e08414c95165d9014c2f5397932aad23
treecf785ec2abf14af8cfdce66a5dd92b01b94a1e64
parent2ec72426009ce0462398fb7b370cd7ed58213db5
ARM: do not relax Thumb1 -> Thumb2 if only Thumb1 is available.

After recognising that a certain narrow instruction might need a relocation to
be represented, we used to unconditionally relax it to a Thumb2 instruction to
permit this. Unfortunately, some CPUs (e.g. v6m) don't even have most Thumb2
instructions, so we end up emitting a completely invalid instruction.

Theoretically, ELF does have relocations for these situations; but they are
fairly unusable with such short ranges and the ABI document even says they're
documented "for completeness". So an error is probably better there too.

rdar://20391953

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234195 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
lib/Target/ARM/MCTargetDesc/ARMAsmBackend.h
lib/Target/ARM/MCTargetDesc/ARMELFObjectWriter.cpp
lib/Target/ARM/MCTargetDesc/ARMMachObjectWriter.cpp
test/MC/ARM/thumb1-relax-adr.s [new file with mode: 0644]
test/MC/ARM/thumb1-relax-bcc.s [new file with mode: 0644]
test/MC/ARM/thumb1-relax-br.s [new file with mode: 0644]
test/MC/ARM/thumb1-relax-ldrlit.s [new file with mode: 0644]