clk: rockchip: rk3368: use the clock IDs for DPHY clocks
[firefly-linux-kernel-4.4.55.git] / drivers / media / tuners / it913x.c
1 /*
2  * ITE IT913X silicon tuner driver
3  *
4  *  Copyright (C) 2011 Malcolm Priestley (tvboxspy@gmail.com)
5  *  IT9137 Copyright (C) ITE Tech Inc.
6  *
7  *  This program is free software; you can redistribute it and/or modify
8  *  it under the terms of the GNU General Public License as published by
9  *  the Free Software Foundation; either version 2 of the License, or
10  *  (at your option) any later version.
11  *
12  *  This program is distributed in the hope that it will be useful,
13  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
14  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15  *
16  *  GNU General Public License for more details.
17  *
18  *  You should have received a copy of the GNU General Public License
19  *  along with this program; if not, write to the Free Software
20  *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.=
21  */
22
23 #include "it913x.h"
24 #include <linux/regmap.h>
25
26 struct it913x_dev {
27         struct i2c_client *client;
28         struct regmap *regmap;
29         struct dvb_frontend *fe;
30         u8 chip_ver:2;
31         u8 role:2;
32         u16 xtal;
33         u8 fdiv;
34         u8 clk_mode;
35         u32 fn_min;
36         bool active;
37 };
38
39 static int it913x_init(struct dvb_frontend *fe)
40 {
41         struct it913x_dev *dev = fe->tuner_priv;
42         int ret;
43         unsigned int utmp;
44         u8 iqik_m_cal, nv_val, buf[2];
45         static const u8 nv[] = {48, 32, 24, 16, 12, 8, 6, 4, 2};
46         unsigned long timeout;
47
48         dev_dbg(&dev->client->dev, "role %u\n", dev->role);
49
50         ret = regmap_write(dev->regmap, 0x80ec4c, 0x68);
51         if (ret)
52                 goto err;
53
54         usleep_range(10000, 100000);
55
56         ret = regmap_read(dev->regmap, 0x80ec86, &utmp);
57         if (ret)
58                 goto err;
59
60         switch (utmp) {
61         case 0:
62                 /* 12.000 MHz */
63                 dev->clk_mode = utmp;
64                 dev->xtal = 2000;
65                 dev->fdiv = 3;
66                 iqik_m_cal = 16;
67                 break;
68         case 1:
69                 /* 20.480 MHz */
70                 dev->clk_mode = utmp;
71                 dev->xtal = 640;
72                 dev->fdiv = 1;
73                 iqik_m_cal = 6;
74                 break;
75         default:
76                 dev_err(&dev->client->dev, "unknown clock identifier %d\n", utmp);
77                 goto err;
78         }
79
80         ret = regmap_read(dev->regmap, 0x80ed03,  &utmp);
81         if (ret)
82                 goto err;
83
84         else if (utmp < ARRAY_SIZE(nv))
85                 nv_val = nv[utmp];
86         else
87                 nv_val = 2;
88
89         #define TIMEOUT 50
90         timeout = jiffies + msecs_to_jiffies(TIMEOUT);
91         while (!time_after(jiffies, timeout)) {
92                 ret = regmap_bulk_read(dev->regmap, 0x80ed23, buf, 2);
93                 if (ret)
94                         goto err;
95
96                 utmp = (buf[1] << 8) | (buf[0] << 0);
97                 if (utmp)
98                         break;
99         }
100
101         dev_dbg(&dev->client->dev, "r_fbc_m_bdry took %u ms, val %u\n",
102                         jiffies_to_msecs(jiffies) -
103                         (jiffies_to_msecs(timeout) - TIMEOUT), utmp);
104
105         dev->fn_min = dev->xtal * utmp;
106         dev->fn_min /= (dev->fdiv * nv_val);
107         dev->fn_min *= 1000;
108         dev_dbg(&dev->client->dev, "fn_min %u\n", dev->fn_min);
109
110         /*
111          * Chip version BX never sets that flag so we just wait 50ms in that
112          * case. It is possible poll BX similarly than AX and then timeout in
113          * order to get 50ms delay, but that causes about 120 extra I2C
114          * messages. As for now, we just wait and reduce IO.
115          */
116         if (dev->chip_ver == 1) {
117                 #define TIMEOUT 50
118                 timeout = jiffies + msecs_to_jiffies(TIMEOUT);
119                 while (!time_after(jiffies, timeout)) {
120                         ret = regmap_read(dev->regmap, 0x80ec82, &utmp);
121                         if (ret)
122                                 goto err;
123
124                         if (utmp)
125                                 break;
126                 }
127
128                 dev_dbg(&dev->client->dev, "p_tsm_init_mode took %u ms, val %u\n",
129                                 jiffies_to_msecs(jiffies) -
130                                 (jiffies_to_msecs(timeout) - TIMEOUT), utmp);
131         } else {
132                 msleep(50);
133         }
134
135         ret = regmap_write(dev->regmap, 0x80ed81, iqik_m_cal);
136         if (ret)
137                 goto err;
138
139         ret = regmap_write(dev->regmap, 0x80ec57, 0x00);
140         if (ret)
141                 goto err;
142
143         ret = regmap_write(dev->regmap, 0x80ec58, 0x00);
144         if (ret)
145                 goto err;
146
147         ret = regmap_write(dev->regmap, 0x80ec40, 0x01);
148         if (ret)
149                 goto err;
150
151         dev->active = true;
152
153         return 0;
154 err:
155         dev_dbg(&dev->client->dev, "failed %d\n", ret);
156         return ret;
157 }
158
159 static int it913x_sleep(struct dvb_frontend *fe)
160 {
161         struct it913x_dev *dev = fe->tuner_priv;
162         int ret, len;
163
164         dev_dbg(&dev->client->dev, "role %u\n", dev->role);
165
166         dev->active = false;
167
168         ret  = regmap_bulk_write(dev->regmap, 0x80ec40, "\x00", 1);
169         if (ret)
170                 goto err;
171
172         /*
173          * Writing '0x00' to master tuner register '0x80ec08' causes slave tuner
174          * communication lost. Due to that, we cannot put master full sleep.
175          */
176         if (dev->role == IT913X_ROLE_DUAL_MASTER)
177                 len = 4;
178         else
179                 len = 15;
180
181         dev_dbg(&dev->client->dev, "role %u, len %d\n", dev->role, len);
182
183         ret = regmap_bulk_write(dev->regmap, 0x80ec02,
184                         "\x3f\x1f\x3f\x3e\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00",
185                         len);
186         if (ret)
187                 goto err;
188
189         ret = regmap_bulk_write(dev->regmap, 0x80ec12, "\x00\x00\x00\x00", 4);
190         if (ret)
191                 goto err;
192
193         ret = regmap_bulk_write(dev->regmap, 0x80ec17,
194                         "\x00\x00\x00\x00\x00\x00\x00\x00\x00", 9);
195         if (ret)
196                 goto err;
197
198         ret = regmap_bulk_write(dev->regmap, 0x80ec22,
199                         "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00", 10);
200         if (ret)
201                 goto err;
202
203         ret = regmap_bulk_write(dev->regmap, 0x80ec20, "\x00", 1);
204         if (ret)
205                 goto err;
206
207         ret = regmap_bulk_write(dev->regmap, 0x80ec3f, "\x01", 1);
208         if (ret)
209                 goto err;
210
211         return 0;
212 err:
213         dev_dbg(&dev->client->dev, "failed %d\n", ret);
214         return ret;
215 }
216
217 static int it913x_set_params(struct dvb_frontend *fe)
218 {
219         struct it913x_dev *dev = fe->tuner_priv;
220         struct dtv_frontend_properties *c = &fe->dtv_property_cache;
221         int ret;
222         unsigned int utmp;
223         u32 pre_lo_freq, t_cal_freq;
224         u16 iqik_m_cal, n_div;
225         u8 u8tmp, n, l_band, lna_band;
226
227         dev_dbg(&dev->client->dev, "role=%u, frequency %u, bandwidth_hz %u\n",
228                         dev->role, c->frequency, c->bandwidth_hz);
229
230         if (!dev->active) {
231                 ret = -EINVAL;
232                 goto err;
233         }
234
235         if (c->frequency <=         74000000) {
236                 n_div = 48;
237                 n = 0;
238         } else if (c->frequency <= 111000000) {
239                 n_div = 32;
240                 n = 1;
241         } else if (c->frequency <= 148000000) {
242                 n_div = 24;
243                 n = 2;
244         } else if (c->frequency <= 222000000) {
245                 n_div = 16;
246                 n = 3;
247         } else if (c->frequency <= 296000000) {
248                 n_div = 12;
249                 n = 4;
250         } else if (c->frequency <= 445000000) {
251                 n_div = 8;
252                 n = 5;
253         } else if (c->frequency <= dev->fn_min) {
254                 n_div = 6;
255                 n = 6;
256         } else if (c->frequency <= 950000000) {
257                 n_div = 4;
258                 n = 7;
259         } else {
260                 n_div = 2;
261                 n = 0;
262         }
263
264         ret = regmap_read(dev->regmap, 0x80ed81, &utmp);
265         if (ret)
266                 goto err;
267
268         iqik_m_cal = utmp * n_div;
269
270         if (utmp < 0x20) {
271                 if (dev->clk_mode == 0)
272                         iqik_m_cal = (iqik_m_cal * 9) >> 5;
273                 else
274                         iqik_m_cal >>= 1;
275         } else {
276                 iqik_m_cal = 0x40 - iqik_m_cal;
277                 if (dev->clk_mode == 0)
278                         iqik_m_cal = ~((iqik_m_cal * 9) >> 5);
279                 else
280                         iqik_m_cal = ~(iqik_m_cal >> 1);
281         }
282
283         t_cal_freq = (c->frequency / 1000) * n_div * dev->fdiv;
284         pre_lo_freq = t_cal_freq / dev->xtal;
285         utmp = pre_lo_freq * dev->xtal;
286
287         if ((t_cal_freq - utmp) >= (dev->xtal >> 1))
288                 pre_lo_freq++;
289
290         pre_lo_freq += (u32) n << 13;
291         /* Frequency OMEGA_IQIK_M_CAL_MID*/
292         t_cal_freq = pre_lo_freq + (u32)iqik_m_cal;
293         dev_dbg(&dev->client->dev, "t_cal_freq %u, pre_lo_freq %u\n",
294                         t_cal_freq, pre_lo_freq);
295
296         if (c->frequency <=         440000000) {
297                 l_band = 0;
298                 lna_band = 0;
299         } else if (c->frequency <=  484000000) {
300                 l_band = 1;
301                 lna_band = 1;
302         } else if (c->frequency <=  533000000) {
303                 l_band = 1;
304                 lna_band = 2;
305         } else if (c->frequency <=  587000000) {
306                 l_band = 1;
307                 lna_band = 3;
308         } else if (c->frequency <=  645000000) {
309                 l_band = 1;
310                 lna_band = 4;
311         } else if (c->frequency <=  710000000) {
312                 l_band = 1;
313                 lna_band = 5;
314         } else if (c->frequency <=  782000000) {
315                 l_band = 1;
316                 lna_band = 6;
317         } else if (c->frequency <=  860000000) {
318                 l_band = 1;
319                 lna_band = 7;
320         } else if (c->frequency <= 1492000000) {
321                 l_band = 1;
322                 lna_band = 0;
323         } else if (c->frequency <= 1685000000) {
324                 l_band = 1;
325                 lna_band = 1;
326         } else {
327                 ret = -EINVAL;
328                 goto err;
329         }
330
331         /* XXX: latest windows driver does not set that at all */
332         ret = regmap_write(dev->regmap, 0x80ee06, lna_band);
333         if (ret)
334                 goto err;
335
336         if (c->bandwidth_hz <=      5000000)
337                 u8tmp = 0;
338         else if (c->bandwidth_hz <= 6000000)
339                 u8tmp = 2;
340         else if (c->bandwidth_hz <= 7000000)
341                 u8tmp = 4;
342         else
343                 u8tmp = 6;       /* 8000000 */
344
345         ret = regmap_write(dev->regmap, 0x80ec56, u8tmp);
346         if (ret)
347                 goto err;
348
349         /* XXX: latest windows driver sets different value (a8 != 68) */
350         ret = regmap_write(dev->regmap, 0x80ec4c, 0xa0 | (l_band << 3));
351         if (ret)
352                 goto err;
353
354         ret = regmap_write(dev->regmap, 0x80ec4d, (t_cal_freq >> 0) & 0xff);
355         if (ret)
356                 goto err;
357
358         ret = regmap_write(dev->regmap, 0x80ec4e, (t_cal_freq >> 8) & 0xff);
359         if (ret)
360                 goto err;
361
362         ret = regmap_write(dev->regmap, 0x80011e, (pre_lo_freq >> 0) & 0xff);
363         if (ret)
364                 goto err;
365
366         ret = regmap_write(dev->regmap, 0x80011f, (pre_lo_freq >> 8) & 0xff);
367         if (ret)
368                 goto err;
369
370         return 0;
371 err:
372         dev_dbg(&dev->client->dev, "failed %d\n", ret);
373         return ret;
374 }
375
376 static const struct dvb_tuner_ops it913x_tuner_ops = {
377         .info = {
378                 .name           = "ITE IT913X",
379                 .frequency_min  = 174000000,
380                 .frequency_max  = 862000000,
381         },
382
383         .init = it913x_init,
384         .sleep = it913x_sleep,
385         .set_params = it913x_set_params,
386 };
387
388 static int it913x_probe(struct i2c_client *client,
389                 const struct i2c_device_id *id)
390 {
391         struct it913x_config *cfg = client->dev.platform_data;
392         struct dvb_frontend *fe = cfg->fe;
393         struct it913x_dev *dev;
394         int ret;
395         char *chip_ver_str;
396         static const struct regmap_config regmap_config = {
397                 .reg_bits = 24,
398                 .val_bits = 8,
399         };
400
401         dev = kzalloc(sizeof(struct it913x_dev), GFP_KERNEL);
402         if (dev == NULL) {
403                 ret = -ENOMEM;
404                 dev_err(&client->dev, "kzalloc() failed\n");
405                 goto err;
406         }
407
408         dev->client = client;
409         dev->fe = cfg->fe;
410         dev->chip_ver = cfg->chip_ver;
411         dev->role = cfg->role;
412         dev->regmap = regmap_init_i2c(client, &regmap_config);
413         if (IS_ERR(dev->regmap)) {
414                 ret = PTR_ERR(dev->regmap);
415                 goto err_kfree;
416         }
417
418         fe->tuner_priv = dev;
419         memcpy(&fe->ops.tuner_ops, &it913x_tuner_ops,
420                         sizeof(struct dvb_tuner_ops));
421         i2c_set_clientdata(client, dev);
422
423         if (dev->chip_ver == 1)
424                 chip_ver_str = "AX";
425         else if (dev->chip_ver == 2)
426                 chip_ver_str = "BX";
427         else
428                 chip_ver_str = "??";
429
430         dev_info(&dev->client->dev, "ITE IT913X %s successfully attached\n",
431                         chip_ver_str);
432         dev_dbg(&dev->client->dev, "chip_ver %u, role %u\n",
433                         dev->chip_ver, dev->role);
434         return 0;
435
436 err_kfree:
437         kfree(dev);
438 err:
439         dev_dbg(&client->dev, "failed %d\n", ret);
440         return ret;
441 }
442
443 static int it913x_remove(struct i2c_client *client)
444 {
445         struct it913x_dev *dev = i2c_get_clientdata(client);
446         struct dvb_frontend *fe = dev->fe;
447
448         dev_dbg(&client->dev, "\n");
449
450         memset(&fe->ops.tuner_ops, 0, sizeof(struct dvb_tuner_ops));
451         fe->tuner_priv = NULL;
452         regmap_exit(dev->regmap);
453         kfree(dev);
454
455         return 0;
456 }
457
458 static const struct i2c_device_id it913x_id_table[] = {
459         {"it913x", 0},
460         {}
461 };
462 MODULE_DEVICE_TABLE(i2c, it913x_id_table);
463
464 static struct i2c_driver it913x_driver = {
465         .driver = {
466                 .name   = "it913x",
467         },
468         .probe          = it913x_probe,
469         .remove         = it913x_remove,
470         .id_table       = it913x_id_table,
471 };
472
473 module_i2c_driver(it913x_driver);
474
475 MODULE_DESCRIPTION("ITE IT913X silicon tuner driver");
476 MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
477 MODULE_LICENSE("GPL");