clk: rockchip: fix up the pll-type for rk3328
authorElaine Zhang <zhangqing@rock-chips.com>
Thu, 5 Jan 2017 06:39:36 +0000 (14:39 +0800)
committerHuang, Tao <huangtao@rock-chips.com>
Fri, 6 Jan 2017 02:48:53 +0000 (10:48 +0800)
commit0536f308d8a988615ce2a1ae0e845deda13882b2
treefd1196ad7bc98f5bb8387f52ac51b3f8bcd76b12
parent58e23d3e43bd9ffc408f057858570f8f731460fd
clk: rockchip: fix up the pll-type for rk3328

fix up the pll type pll_rk3328 description and use.
add the other parts handling parents,like num_parents check
and the init.num_parents parameter.
add ctx->grf.

Change-Id: I17f1b0dc4b8286817f587e02fdea39f2d886f3d0
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
drivers/clk/rockchip/clk-pll.c
drivers/clk/rockchip/clk.c